Index: trunk/src/VBox/VMM/VMMAll/EMAll.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMAll/EMAll.cpp	(revision 22474)
+++ trunk/src/VBox/VMM/VMMAll/EMAll.cpp	(revision 22493)
@@ -361,5 +361,5 @@
  * @remark  This may raise exceptions.
  */
-VMMDECL(int) EMInterpretPortIO(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, PDISCPUSTATE pDis, uint32_t cbOp)
+VMMDECL(VBOXSTRICTRC) EMInterpretPortIO(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, PDISCPUSTATE pDis, uint32_t cbOp)
 {
     /*
@@ -367,8 +367,8 @@
      */
 #ifdef IN_RC
-    int rc = IOMGCIOPortHandler(pVM, pCtxCore, pDis);
-    if (IOM_SUCCESS(rc))
+    VBOXSTRICTRC rcStrict = IOMGCIOPortHandler(pVM, pCtxCore, pDis);
+    if (IOM_SUCCESS(rcStrict))
         pCtxCore->rip += cbOp;
-    return rc;
+    return rcStrict;
 #else
     AssertReleaseMsgFailed(("not implemented\n"));
Index: trunk/src/VBox/VMM/VMMAll/IOMAll.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IOMAll.cpp	(revision 22474)
+++ trunk/src/VBox/VMM/VMMAll/IOMAll.cpp	(revision 22493)
@@ -259,14 +259,13 @@
  * @param   cbValue     The size of the register to read in bytes. 1, 2 or 4 bytes.
  */
-VMMDECL(int) IOMIOPortRead(PVM pVM, RTIOPORT Port, uint32_t *pu32Value, size_t cbValue)
+VMMDECL(VBOXSTRICTRC) IOMIOPortRead(PVM pVM, RTIOPORT Port, uint32_t *pu32Value, size_t cbValue)
 {
     /* Take the IOM lock before performing any device I/O. */
-    int rc = iomLock(pVM);
-#ifndef IN_RING3
-    if (rc == VERR_SEM_BUSY)
+    int rc2 = iomLock(pVM);
+#ifndef IN_RING3
+    if (rc2 == VERR_SEM_BUSY)
         return VINF_IOM_HC_IOPORT_READ;
-#else
-    AssertRC(rc);
-#endif
+#endif
+    AssertRC(rc2);
 
 #ifdef VBOX_WITH_STATISTICS
@@ -316,19 +315,19 @@
             STAM_PROFILE_ADV_START(&pStats->CTX_SUFF_Z(ProfIn), a);
 #endif
-        rc = pRange->pfnInCallback(pRange->pDevIns, pRange->pvUser, Port, pu32Value, (unsigned)cbValue);
+        VBOXSTRICTRC rcStrict = pRange->pfnInCallback(pRange->pDevIns, pRange->pvUser, Port, pu32Value, (unsigned)cbValue);
 #ifdef VBOX_WITH_STATISTICS
         if (pStats)
             STAM_PROFILE_ADV_STOP(&pStats->CTX_SUFF_Z(ProfIn), a);
-        if (rc == VINF_SUCCESS && pStats)
+        if (rcStrict == VINF_SUCCESS && pStats)
             STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(In));
 # ifndef IN_RING3
-        else if (rc == VINF_IOM_HC_IOPORT_READ && pStats)
+        else if (rcStrict == VINF_IOM_HC_IOPORT_READ && pStats)
             STAM_COUNTER_INC(&pStats->CTX_MID_Z(In,ToR3));
 # endif
 #endif
-        if (rc == VERR_IOM_IOPORT_UNUSED)
+        if (rcStrict == VERR_IOM_IOPORT_UNUSED)
         {
             /* make return value */
-            rc = VINF_SUCCESS;
+            rcStrict = VINF_SUCCESS;
             switch (cbValue)
             {
@@ -342,7 +341,7 @@
             }
         }
-        Log3(("IOMIOPortRead: Port=%RTiop *pu32=%08RX32 cb=%d rc=%Rrc\n", Port, *pu32Value, cbValue, rc));
-        iomUnlock(pVM);
-        return rc;
+        Log3(("IOMIOPortRead: Port=%RTiop *pu32=%08RX32 cb=%d rc=%Rrc\n", Port, *pu32Value, cbValue, VBOXSTRICTRC_VAL(rcStrict)));
+        iomUnlock(pVM);
+        return rcStrict;
     }
 
@@ -415,14 +414,14 @@
  * @param   pcTransfers Pointer to the number of transfer units to read, on return remaining transfer units.
  * @param   cb          Size of the transfer unit (1, 2 or 4 bytes).
- *   */
-VMMDECL(int) IOMIOPortReadString(PVM pVM, RTIOPORT Port, PRTGCPTR pGCPtrDst, PRTGCUINTREG pcTransfers, unsigned cb)
+ */
+VMMDECL(VBOXSTRICTRC) IOMIOPortReadString(PVM pVM, RTIOPORT Port, PRTGCPTR pGCPtrDst, PRTGCUINTREG pcTransfers, unsigned cb)
 {
     /* Take the IOM lock before performing any device I/O. */
-    int rc = iomLock(pVM);
-#ifndef IN_RING3
-    if (rc == VERR_SEM_BUSY)
+    int rc2 = iomLock(pVM);
+#ifndef IN_RING3
+    if (rc2 == VERR_SEM_BUSY)
         return VINF_IOM_HC_IOPORT_READ;
 #endif
-    AssertRC(rc);
+    AssertRC(rc2);
 
 #ifdef LOG_ENABLED
@@ -476,19 +475,19 @@
 #endif
 
-        int rc = pRange->pfnInStrCallback(pRange->pDevIns, pRange->pvUser, Port, pGCPtrDst, pcTransfers, cb);
+        VBOXSTRICTRC rcStrict = pRange->pfnInStrCallback(pRange->pDevIns, pRange->pvUser, Port, pGCPtrDst, pcTransfers, cb);
 #ifdef VBOX_WITH_STATISTICS
         if (pStats)
             STAM_PROFILE_ADV_STOP(&pStats->CTX_SUFF_Z(ProfIn), a);
-        if (rc == VINF_SUCCESS && pStats)
+        if (rcStrict == VINF_SUCCESS && pStats)
             STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(In));
 # ifndef IN_RING3
-        else if (rc == VINF_IOM_HC_IOPORT_READ && pStats)
+        else if (rcStrict == VINF_IOM_HC_IOPORT_READ && pStats)
             STAM_COUNTER_INC(&pStats->CTX_MID_Z(In, ToR3));
 # endif
 #endif
         Log3(("IOMIOPortReadStr: Port=%RTiop pGCPtrDst=%p pcTransfer=%p:{%#x->%#x} cb=%d rc=%Rrc\n",
-              Port, pGCPtrDst, pcTransfers, cTransfers, *pcTransfers, cb, rc));
-        iomUnlock(pVM);
-        return rc;
+              Port, pGCPtrDst, pcTransfers, cTransfers, *pcTransfers, cb, VBOXSTRICTRC_VAL(rcStrict)));
+        iomUnlock(pVM);
+        return rcStrict;
     }
 
@@ -551,15 +550,16 @@
  * @param   cbValue     The size of the register to read in bytes. 1, 2 or 4 bytes.
  */
-VMMDECL(int) IOMIOPortWrite(PVM pVM, RTIOPORT Port, uint32_t u32Value, size_t cbValue)
+VMMDECL(VBOXSTRICTRC) IOMIOPortWrite(PVM pVM, RTIOPORT Port, uint32_t u32Value, size_t cbValue)
 {
     /* Take the IOM lock before performing any device I/O. */
-    int rc = iomLock(pVM);
-#ifndef IN_RING3
-    if (rc == VERR_SEM_BUSY)
+    int rc2 = iomLock(pVM);
+#ifndef IN_RING3
+    if (rc2 == VERR_SEM_BUSY)
         return VINF_IOM_HC_IOPORT_WRITE;
 #endif
-    AssertRC(rc);
-
-/** @todo bird: When I get time, I'll remove the GC tree and link the GC entries to the ring-3 node. */
+    AssertRC(rc2);
+
+/** @todo bird: When I get time, I'll remove the RC/R0 trees and link the RC/R0
+ *        entries to the ring-3 node. */
 #ifdef VBOX_WITH_STATISTICS
     /*
@@ -608,19 +608,19 @@
             STAM_PROFILE_ADV_START(&pStats->CTX_SUFF_Z(ProfOut), a);
 #endif
-        int rc = pRange->pfnOutCallback(pRange->pDevIns, pRange->pvUser, Port, u32Value, (unsigned)cbValue);
+        VBOXSTRICTRC rcStrict = pRange->pfnOutCallback(pRange->pDevIns, pRange->pvUser, Port, u32Value, (unsigned)cbValue);
 
 #ifdef VBOX_WITH_STATISTICS
         if (pStats)
             STAM_PROFILE_ADV_STOP(&pStats->CTX_SUFF_Z(ProfOut), a);
-        if (rc == VINF_SUCCESS && pStats)
+        if (rcStrict == VINF_SUCCESS && pStats)
             STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(Out));
 # ifndef IN_RING3
-        else if (rc == VINF_IOM_HC_IOPORT_WRITE && pStats)
+        else if (rcStrict == VINF_IOM_HC_IOPORT_WRITE && pStats)
             STAM_COUNTER_INC(&pStats->CTX_MID_Z(Out, ToR3));
 # endif
 #endif
-        Log3(("IOMIOPortWrite: Port=%RTiop u32=%08RX32 cb=%d rc=%Rrc\n", Port, u32Value, cbValue, rc));
-        iomUnlock(pVM);
-        return rc;
+        Log3(("IOMIOPortWrite: Port=%RTiop u32=%08RX32 cb=%d rc=%Rrc\n", Port, u32Value, cbValue, VBOXSTRICTRC_VAL(rcStrict)));
+        iomUnlock(pVM);
+        return rcStrict;
     }
 
@@ -683,13 +683,13 @@
  * @param   cb          Size of the transfer unit (1, 2 or 4 bytes).
  *   */
-VMMDECL(int) IOMIOPortWriteString(PVM pVM, RTIOPORT Port, PRTGCPTR pGCPtrSrc, PRTGCUINTREG pcTransfers, unsigned cb)
+VMMDECL(VBOXSTRICTRC) IOMIOPortWriteString(PVM pVM, RTIOPORT Port, PRTGCPTR pGCPtrSrc, PRTGCUINTREG pcTransfers, unsigned cb)
 {
     /* Take the IOM lock before performing any device I/O. */
-    int rc = iomLock(pVM);
-#ifndef IN_RING3
-    if (rc == VERR_SEM_BUSY)
+    int rc2 = iomLock(pVM);
+#ifndef IN_RING3
+    if (rc2 == VERR_SEM_BUSY)
         return VINF_IOM_HC_IOPORT_WRITE;
 #endif
-    AssertRC(rc);
+    AssertRC(rc2);
 
 #ifdef LOG_ENABLED
@@ -742,19 +742,19 @@
             STAM_PROFILE_ADV_START(&pStats->CTX_SUFF_Z(ProfOut), a);
 #endif
-        int rc = pRange->pfnOutStrCallback(pRange->pDevIns, pRange->pvUser, Port, pGCPtrSrc, pcTransfers, cb);
+        VBOXSTRICTRC rcStrict = pRange->pfnOutStrCallback(pRange->pDevIns, pRange->pvUser, Port, pGCPtrSrc, pcTransfers, cb);
 #ifdef VBOX_WITH_STATISTICS
         if (pStats)
             STAM_PROFILE_ADV_STOP(&pStats->CTX_SUFF_Z(ProfOut), a);
-        if (rc == VINF_SUCCESS && pStats)
+        if (rcStrict == VINF_SUCCESS && pStats)
             STAM_COUNTER_INC(&pStats->CTX_SUFF_Z(Out));
 # ifndef IN_RING3
-        else if (rc == VINF_IOM_HC_IOPORT_WRITE && pStats)
+        else if (rcStrict == VINF_IOM_HC_IOPORT_WRITE && pStats)
             STAM_COUNTER_INC(&pStats->CTX_MID_Z(Out, ToR3));
 # endif
 #endif
-        Log3(("IOMIOPortWriteStr: Port=%RTiop pGCPtrSrc=%p pcTransfer=%p:{%#x->%#x} cb=%d rc=%Rrc\n",
-              Port, pGCPtrSrc, pcTransfers, cTransfers, *pcTransfers, cb, rc));
-        iomUnlock(pVM);
-        return rc;
+        Log3(("IOMIOPortWriteStr: Port=%RTiop pGCPtrSrc=%p pcTransfer=%p:{%#x->%#x} cb=%d rcStrict=%Rrc\n",
+              Port, pGCPtrSrc, pcTransfers, cTransfers, *pcTransfers, cb, VBOXSTRICTRC_VAL(rcStrict)));
+        iomUnlock(pVM);
+        return rcStrict;
     }
 
@@ -818,5 +818,5 @@
  * @param   cb          The access size.
  */
-VMMDECL(int) IOMInterpretCheckPortIOAccess(PVM pVM, PCPUMCTXCORE pCtxCore, RTIOPORT Port, unsigned cb)
+VMMDECL(VBOXSTRICTRC) IOMInterpretCheckPortIOAccess(PVM pVM, PCPUMCTXCORE pCtxCore, RTIOPORT Port, unsigned cb)
 {
     PVMCPU pVCpu = VMMGetCpu(pVM);
@@ -839,8 +839,8 @@
         RTGCUINTPTR cbTss;
         bool        fCanHaveIOBitmap;
-        int rc = SELMGetTSSInfo(pVM, pVCpu, &GCPtrTss, &cbTss, &fCanHaveIOBitmap);
-        if (RT_FAILURE(rc))
-        {
-            Log(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d %Rrc -> #GP(0)\n", Port, cb, rc));
+        int rc2 = SELMGetTSSInfo(pVM, pVCpu, &GCPtrTss, &cbTss, &fCanHaveIOBitmap);
+        if (RT_FAILURE(rc2))
+        {
+            Log(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d %Rrc -> #GP(0)\n", Port, cb, rc2));
             return TRPMRaiseXcptErr(pVCpu, pCtxCore, X86_XCPT_GP, 0);
         }
@@ -858,10 +858,10 @@
          */
         uint16_t offIOPB;
-        rc = PGMPhysInterpretedRead(pVCpu, pCtxCore, &offIOPB, GCPtrTss + RT_OFFSETOF(VBOXTSS, offIoBitmap), sizeof(offIOPB));
-        if (rc != VINF_SUCCESS)
+        VBOXSTRICTRC rcStrict = PGMPhysInterpretedRead(pVCpu, pCtxCore, &offIOPB, GCPtrTss + RT_OFFSETOF(VBOXTSS, offIoBitmap), sizeof(offIOPB));
+        if (rcStrict != VINF_SUCCESS)
         {
             Log(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d GCPtrTss=%RGv %Rrc\n",
-                 Port, cb, GCPtrTss, rc));
-            return rc;
+                 Port, cb, GCPtrTss, VBOXSTRICTRC_VAL(rcStrict)));
+            return rcStrict;
         }
 
@@ -877,10 +877,10 @@
         }
         uint16_t u16;
-        rc = PGMPhysInterpretedRead(pVCpu, pCtxCore, &u16, GCPtrTss + offTss, sizeof(u16));
-        if (rc != VINF_SUCCESS)
+        rcStrict = PGMPhysInterpretedRead(pVCpu, pCtxCore, &u16, GCPtrTss + offTss, sizeof(u16));
+        if (rcStrict != VINF_SUCCESS)
         {
             Log(("iomInterpretCheckPortIOAccess: Port=%RTiop cb=%d GCPtrTss=%RGv offTss=%#x -> %Rrc\n",
-                 Port, cb, GCPtrTss, offTss, rc));
-            return rc;
+                 Port, cb, GCPtrTss, offTss, VBOXSTRICTRC_VAL(rcStrict)));
+            return rcStrict;
         }
 
@@ -918,5 +918,5 @@
  * @param   pCpu        Disassembler CPU state.
  */
-VMMDECL(int) IOMInterpretIN(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
+VMMDECL(VBOXSTRICTRC) IOMInterpretIN(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
 {
 #ifdef IN_RC
@@ -935,6 +935,6 @@
     cbSize = DISGetParamSize(pCpu, &pCpu->param1);
     Assert(cbSize > 0);
-    int rc = IOMInterpretCheckPortIOAccess(pVM, pRegFrame, uPort, cbSize);
-    if (rc == VINF_SUCCESS)
+    VBOXSTRICTRC rcStrict = IOMInterpretCheckPortIOAccess(pVM, pRegFrame, uPort, cbSize);
+    if (rcStrict == VINF_SUCCESS)
     {
         /*
@@ -942,6 +942,6 @@
          */
         uint32_t u32Data = UINT32_C(0xffffffff);
-        rc = IOMIOPortRead(pVM, uPort, &u32Data, cbSize);
-        if (IOM_SUCCESS(rc))
+        rcStrict = IOMIOPortRead(pVM, uPort, &u32Data, cbSize);
+        if (IOM_SUCCESS(rcStrict))
         {
             /*
@@ -952,9 +952,10 @@
         }
         else
-            AssertMsg(rc == VINF_IOM_HC_IOPORT_READ || RT_FAILURE(rc), ("%Rrc\n", rc));
+            AssertMsg(rcStrict == VINF_IOM_HC_IOPORT_READ || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
     }
     else
-        AssertMsg(rc == VINF_EM_RAW_GUEST_TRAP || rc == VINF_TRPM_XCPT_DISPATCHED || rc == VINF_TRPM_XCPT_DISPATCHED || RT_FAILURE(rc), ("%Rrc\n", rc));
-    return rc;
+        AssertMsg(rcStrict == VINF_EM_RAW_GUEST_TRAP || rcStrict == VINF_TRPM_XCPT_DISPATCHED || rcStrict == VINF_TRPM_XCPT_DISPATCHED || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
+
+    return rcStrict;
 }
 
@@ -977,5 +978,5 @@
  * @param   pCpu        Disassembler CPU state.
  */
-VMMDECL(int) IOMInterpretOUT(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
+VMMDECL(VBOXSTRICTRC) IOMInterpretOUT(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
 {
 #ifdef IN_RC
@@ -992,6 +993,6 @@
     AssertMsg(fRc, ("Failed to get reg/imm port number!\n")); NOREF(fRc);
 
-    int rc = IOMInterpretCheckPortIOAccess(pVM, pRegFrame, uPort, cbSize);
-    if (rc == VINF_SUCCESS)
+    VBOXSTRICTRC rcStrict = IOMInterpretCheckPortIOAccess(pVM, pRegFrame, uPort, cbSize);
+    if (rcStrict == VINF_SUCCESS)
     {
         uint64_t u64Data = 0;
@@ -1002,9 +1003,9 @@
          * Attempt to write to the port.
          */
-        rc = IOMIOPortWrite(pVM, uPort, u64Data, cbSize);
-        AssertMsg(rc == VINF_SUCCESS || rc == VINF_IOM_HC_IOPORT_WRITE || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST) || RT_FAILURE(rc), ("%Rrc\n", rc));
+        rcStrict = IOMIOPortWrite(pVM, uPort, u64Data, cbSize);
+        AssertMsg(rcStrict == VINF_SUCCESS || rcStrict == VINF_IOM_HC_IOPORT_WRITE || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST) || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
     }
     else
-        AssertMsg(rc == VINF_EM_RAW_GUEST_TRAP || rc == VINF_TRPM_XCPT_DISPATCHED || rc == VINF_TRPM_XCPT_DISPATCHED || RT_FAILURE(rc), ("%Rrc\n", rc));
-    return rc;
-}
+        AssertMsg(rcStrict == VINF_EM_RAW_GUEST_TRAP || rcStrict == VINF_TRPM_XCPT_DISPATCHED || rcStrict == VINF_TRPM_XCPT_DISPATCHED || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
+    return rcStrict;
+}
Index: trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp	(revision 22474)
+++ trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp	(revision 22493)
@@ -1259,5 +1259,6 @@
     LogFlow(("IOMMMIOHandler: GCPhys=%RGp uErr=%#x pvFault=%RGv rip=%RGv\n",
              GCPhysFault, (uint32_t)uErrorCode, pvFault, (RTGCPTR)pCtxCore->rip));
-    return iomMMIOHandler(pVM, uErrorCode, pCtxCore, GCPhysFault, pvUser);
+    VBOXSTRICTRC rcStrict = iomMMIOHandler(pVM, uErrorCode, pCtxCore, GCPhysFault, pvUser);
+    return VBOXSTRICTRC_VAL(rcStrict);
 }
 
@@ -1271,15 +1272,14 @@
  * @param   GCPhysFault The GC physical address.
  */
-VMMDECL(int) IOMMMIOPhysHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pCtxCore, RTGCPHYS GCPhysFault)
-{
-    int rc;
-    rc = iomLock(pVM);
+VMMDECL(VBOXSTRICTRC) IOMMMIOPhysHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pCtxCore, RTGCPHYS GCPhysFault)
+{
+    int rc2 = iomLock(pVM);
 #ifndef IN_RING3
-    if (rc == VERR_SEM_BUSY)
+    if (rc2 == VERR_SEM_BUSY)
         return (uErrorCode & X86_TRAP_PF_RW) ? VINF_IOM_HC_MMIO_WRITE : VINF_IOM_HC_MMIO_READ;
 #endif
-    rc = iomMMIOHandler(pVM, uErrorCode, pCtxCore, GCPhysFault, iomMMIOGetRange(&pVM->iom.s, GCPhysFault));
+    VBOXSTRICTRC rcStrict = iomMMIOHandler(pVM, uErrorCode, pCtxCore, GCPhysFault, iomMMIOGetRange(&pVM->iom.s, GCPhysFault));
     iomUnlock(pVM);
-    return rc;
+    return VBOXSTRICTRC_VAL(rcStrict);
 }
 
@@ -1333,5 +1333,5 @@
  * @param   cbValue     The size of the register to read in bytes. 1, 2 or 4 bytes.
  */
-VMMDECL(int) IOMMMIORead(PVM pVM, RTGCPHYS GCPhys, uint32_t *pu32Value, size_t cbValue)
+VMMDECL(VBOXSTRICTRC) IOMMMIORead(PVM pVM, RTGCPHYS GCPhys, uint32_t *pu32Value, size_t cbValue)
 {
     /* Take the IOM lock before performing any MMIO. */
@@ -1454,5 +1454,5 @@
  * @param   cbValue     The size of the register to read in bytes. 1, 2 or 4 bytes.
  */
-VMMDECL(int) IOMMMIOWrite(PVM pVM, RTGCPHYS GCPhys, uint32_t u32Value, size_t cbValue)
+VMMDECL(VBOXSTRICTRC) IOMMMIOWrite(PVM pVM, RTGCPHYS GCPhys, uint32_t u32Value, size_t cbValue)
 {
     /* Take the IOM lock before performing any MMIO. */
@@ -1549,5 +1549,5 @@
  * @param   cbTransfer      Size of transfer unit
  */
-VMMDECL(int) IOMInterpretINSEx(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix, uint32_t cbTransfer)
+VMMDECL(VBOXSTRICTRC) IOMInterpretINSEx(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix, uint32_t cbTransfer)
 {
 #ifdef VBOX_WITH_STATISTICS
@@ -1587,10 +1587,10 @@
     /* Convert destination address es:edi. */
     RTGCPTR GCPtrDst;
-    int rc = SELMToFlatEx(pVM, DIS_SELREG_ES, pRegFrame, (RTGCPTR)pRegFrame->rdi,
-                          SELMTOFLAT_FLAGS_HYPER | SELMTOFLAT_FLAGS_NO_PL,
-                          &GCPtrDst);
-    if (RT_FAILURE(rc))
-    {
-        Log(("INS destination address conversion failed -> fallback, rc=%d\n", rc));
+    int rc2 = SELMToFlatEx(pVM, DIS_SELREG_ES, pRegFrame, (RTGCPTR)pRegFrame->rdi,
+                           SELMTOFLAT_FLAGS_HYPER | SELMTOFLAT_FLAGS_NO_PL,
+                           &GCPtrDst);
+    if (RT_FAILURE(rc2))
+    {
+        Log(("INS destination address conversion failed -> fallback, rc2=%d\n", rc2));
         return VINF_EM_RAW_EMULATE_INSTR;
     }
@@ -1599,13 +1599,14 @@
     uint32_t cpl = CPUMGetGuestCPL(pVCpu, pRegFrame);
 
-    rc = PGMVerifyAccess(pVCpu, (RTGCUINTPTR)GCPtrDst, cTransfers * cbTransfer,
-                         X86_PTE_RW | ((cpl == 3) ? X86_PTE_US : 0));
-    if (rc != VINF_SUCCESS)
-    {
-        Log(("INS will generate a trap -> fallback, rc=%d\n", rc));
+    rc2 = PGMVerifyAccess(pVCpu, (RTGCUINTPTR)GCPtrDst, cTransfers * cbTransfer,
+                          X86_PTE_RW | ((cpl == 3) ? X86_PTE_US : 0));
+    if (rc2 != VINF_SUCCESS)
+    {
+        Log(("INS will generate a trap -> fallback, rc2=%d\n", rc2));
         return VINF_EM_RAW_EMULATE_INSTR;
     }
 
     Log(("IOM: rep ins%d port %#x count %d\n", cbTransfer * 8, uPort, cTransfers));
+    VBOXSTRICTRC rcStrict = VINF_SUCCESS;
     if (cTransfers > 1)
     {
@@ -1613,6 +1614,6 @@
          * much as it wants. The rest is done with single-word transfers. */
         const RTGCUINTREG cTransfersOrg = cTransfers;
-        rc = IOMIOPortReadString(pVM, uPort, &GCPtrDst, &cTransfers, cbTransfer);
-        AssertRC(rc); Assert(cTransfers <= cTransfersOrg);
+        rcStrict = IOMIOPortReadString(pVM, uPort, &GCPtrDst, &cTransfers, cbTransfer);
+        AssertRC(VBOXSTRICTRC_VAL(rcStrict)); Assert(cTransfers <= cTransfersOrg);
         pRegFrame->rdi += (cTransfersOrg - cTransfers) * cbTransfer;
     }
@@ -1621,10 +1622,9 @@
     MMGCRamRegisterTrapHandler(pVM);
 #endif
-
-    while (cTransfers && rc == VINF_SUCCESS)
+    while (cTransfers && rcStrict == VINF_SUCCESS)
     {
         uint32_t u32Value;
-        rc = IOMIOPortRead(pVM, uPort, &u32Value, cbTransfer);
-        if (!IOM_SUCCESS(rc))
+        rcStrict = IOMIOPortRead(pVM, uPort, &u32Value, cbTransfer);
+        if (!IOM_SUCCESS(rcStrict))
             break;
         int rc2 = iomRamWrite(pVCpu, pRegFrame, GCPtrDst, &u32Value, cbTransfer);
@@ -1642,6 +1642,6 @@
         pRegFrame->ecx = cTransfers;
 
-    AssertMsg(rc == VINF_SUCCESS || rc == VINF_IOM_HC_IOPORT_READ || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST) || RT_FAILURE(rc), ("%Rrc\n", rc));
-    return rc;
+    AssertMsg(rcStrict == VINF_SUCCESS || rcStrict == VINF_IOM_HC_IOPORT_READ || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST) || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
+    return rcStrict;
 }
 
@@ -1666,5 +1666,5 @@
  * @param   pCpu        Disassembler CPU state.
  */
-VMMDECL(int) IOMInterpretINS(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
+VMMDECL(VBOXSTRICTRC) IOMInterpretINS(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
 {
     /*
@@ -1679,9 +1679,9 @@
         cb = (pCpu->opmode == CPUMODE_16BIT) ? 2 : 4;       /* dword in both 32 & 64 bits mode */
 
-    int rc = IOMInterpretCheckPortIOAccess(pVM, pRegFrame, Port, cb);
-    if (RT_UNLIKELY(rc != VINF_SUCCESS))
-    {
-        AssertMsg(rc == VINF_EM_RAW_GUEST_TRAP || rc == VINF_TRPM_XCPT_DISPATCHED || rc == VINF_TRPM_XCPT_DISPATCHED || RT_FAILURE(rc), ("%Rrc\n", rc));
-        return rc;
+    VBOXSTRICTRC rcStrict = IOMInterpretCheckPortIOAccess(pVM, pRegFrame, Port, cb);
+    if (RT_UNLIKELY(rcStrict != VINF_SUCCESS))
+    {
+        AssertMsg(rcStrict == VINF_EM_RAW_GUEST_TRAP || rcStrict == VINF_TRPM_XCPT_DISPATCHED || rcStrict == VINF_TRPM_XCPT_DISPATCHED || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
+        return rcStrict;
     }
 
@@ -1712,5 +1712,5 @@
  * @param   cbTransfer      Size of transfer unit
  */
-VMMDECL(int) IOMInterpretOUTSEx(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix, uint32_t cbTransfer)
+VMMDECL(VBOXSTRICTRC) IOMInterpretOUTSEx(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix, uint32_t cbTransfer)
 {
 #ifdef VBOX_WITH_STATISTICS
@@ -1749,10 +1749,10 @@
     /* Convert source address ds:esi. */
     RTGCPTR GCPtrSrc;
-    int rc = SELMToFlatEx(pVM, DIS_SELREG_DS, pRegFrame, (RTGCPTR)pRegFrame->rsi,
-                          SELMTOFLAT_FLAGS_HYPER | SELMTOFLAT_FLAGS_NO_PL,
-                          &GCPtrSrc);
-    if (RT_FAILURE(rc))
-    {
-        Log(("OUTS source address conversion failed -> fallback, rc=%Rrc\n", rc));
+    int rc2 = SELMToFlatEx(pVM, DIS_SELREG_DS, pRegFrame, (RTGCPTR)pRegFrame->rsi,
+                           SELMTOFLAT_FLAGS_HYPER | SELMTOFLAT_FLAGS_NO_PL,
+                           &GCPtrSrc);
+    if (RT_FAILURE(rc2))
+    {
+        Log(("OUTS source address conversion failed -> fallback, rc2=%Rrc\n", rc2));
         return VINF_EM_RAW_EMULATE_INSTR;
     }
@@ -1760,13 +1760,14 @@
     /* Access verification first; we currently can't recover properly from traps inside this instruction */
     uint32_t cpl = CPUMGetGuestCPL(pVCpu, pRegFrame);
-    rc = PGMVerifyAccess(pVCpu, (RTGCUINTPTR)GCPtrSrc, cTransfers * cbTransfer,
-                         (cpl == 3) ? X86_PTE_US : 0);
-    if (rc != VINF_SUCCESS)
-    {
-        Log(("OUTS will generate a trap -> fallback, rc=%Rrc\n", rc));
+    rc2 = PGMVerifyAccess(pVCpu, (RTGCUINTPTR)GCPtrSrc, cTransfers * cbTransfer,
+                          (cpl == 3) ? X86_PTE_US : 0);
+    if (rc2 != VINF_SUCCESS)
+    {
+        Log(("OUTS will generate a trap -> fallback, rc2=%Rrc\n", rc2));
         return VINF_EM_RAW_EMULATE_INSTR;
     }
 
     Log(("IOM: rep outs%d port %#x count %d\n", cbTransfer * 8, uPort, cTransfers));
+    VBOXSTRICTRC rcStrict = VINF_SUCCESS;
     if (cTransfers > 1)
     {
@@ -1776,6 +1777,6 @@
          */
         const RTGCUINTREG cTransfersOrg = cTransfers;
-        rc = IOMIOPortWriteString(pVM, uPort, &GCPtrSrc, &cTransfers, cbTransfer);
-        AssertRC(rc); Assert(cTransfers <= cTransfersOrg);
+        rcStrict = IOMIOPortWriteString(pVM, uPort, &GCPtrSrc, &cTransfers, cbTransfer);
+        AssertRC(VBOXSTRICTRC_VAL(rcStrict)); Assert(cTransfers <= cTransfersOrg);
         pRegFrame->rsi += (cTransfersOrg - cTransfers) * cbTransfer;
     }
@@ -1785,12 +1786,12 @@
 #endif
 
-    while (cTransfers && rc == VINF_SUCCESS)
+    while (cTransfers && rcStrict == VINF_SUCCESS)
     {
         uint32_t u32Value = 0;
-        rc = iomRamRead(pVCpu, &u32Value, GCPtrSrc, cbTransfer);
-        if (rc != VINF_SUCCESS)
+        rcStrict = iomRamRead(pVCpu, &u32Value, GCPtrSrc, cbTransfer);
+        if (rcStrict != VINF_SUCCESS)
             break;
-        rc = IOMIOPortWrite(pVM, uPort, u32Value, cbTransfer);
-        if (!IOM_SUCCESS(rc))
+        rcStrict = IOMIOPortWrite(pVM, uPort, u32Value, cbTransfer);
+        if (!IOM_SUCCESS(rcStrict))
             break;
         GCPtrSrc = (RTGCPTR)((RTUINTPTR)GCPtrSrc + cbTransfer);
@@ -1807,6 +1808,6 @@
         pRegFrame->ecx = cTransfers;
 
-    AssertMsg(rc == VINF_SUCCESS || rc == VINF_IOM_HC_IOPORT_WRITE || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST) || RT_FAILURE(rc), ("%Rrc\n", rc));
-    return rc;
+    AssertMsg(rcStrict == VINF_SUCCESS || rcStrict == VINF_IOM_HC_IOPORT_WRITE || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST) || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
+    return rcStrict;
 }
 
@@ -1831,5 +1832,5 @@
  * @param   pCpu        Disassembler CPU state.
  */
-VMMDECL(int) IOMInterpretOUTS(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
+VMMDECL(VBOXSTRICTRC) IOMInterpretOUTS(PVM pVM, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu)
 {
     /*
@@ -1846,9 +1847,9 @@
         cb = (pCpu->opmode == CPUMODE_16BIT) ? 2 : 4;       /* dword in both 32 & 64 bits mode */
 
-    int rc = IOMInterpretCheckPortIOAccess(pVM, pRegFrame, Port, cb);
-    if (RT_UNLIKELY(rc != VINF_SUCCESS))
-    {
-        AssertMsg(rc == VINF_EM_RAW_GUEST_TRAP || rc == VINF_TRPM_XCPT_DISPATCHED || rc == VINF_TRPM_XCPT_DISPATCHED || RT_FAILURE(rc), ("%Rrc\n", rc));
-        return rc;
+    VBOXSTRICTRC rcStrict = IOMInterpretCheckPortIOAccess(pVM, pRegFrame, Port, cb);
+    if (RT_UNLIKELY(rcStrict != VINF_SUCCESS))
+    {
+        AssertMsg(rcStrict == VINF_EM_RAW_GUEST_TRAP || rcStrict == VINF_TRPM_XCPT_DISPATCHED || rcStrict == VINF_TRPM_XCPT_DISPATCHED || RT_FAILURE(rcStrict), ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
+        return rcStrict;
     }
 
