- Timestamp:
- Aug 28, 2009 6:25:32 PM (16 years ago)
- svn:sync-xref-src-repo-rev:
- 51593
- Location:
- trunk/src/VBox/Runtime/r0drv/solaris
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Runtime/r0drv/solaris/thread-r0drv-solaris.c
r22558 r22566 41 41 #include <iprt/err.h> 42 42 #include <iprt/mp.h> 43 43 44 44 45 … … 143 144 { 144 145 AssertPtr(pState); 145 Assert(pState->uOldPil == UINT32_MAX); 146 Assert(pState->u32Reserved == 0); 147 pState->u32Reserved = 42; 146 148 147 149 kpreempt_disable(); 148 /// @todo check out splr and splx on S10!149 // if (ASMIntAreEnabled())150 pState->uOldPil = splr(ipltospl(DISP_LEVEL));151 // else152 // {153 // /* splr doesn't restore the interrupt flag on S10. */154 // pState->uOldPil = getpil();155 // if (pState->uOldPil < DISP_LEVEL)156 // pState->uOldPil = splx(DISP_LEVEL);157 // }158 Assert(pState->uOldPil != UINT32_MAX);159 150 RT_ASSERT_PREEMPT_CPUID_DISABLE(pState); 160 151 } … … 164 155 { 165 156 AssertPtr(pState); 166 Assert(pState->uOldPil != UINT32_MAX); 157 Assert(pState->u32Reserved == 42); 158 pState->u32Reserved = 0; 167 159 RT_ASSERT_PREEMPT_CPUID_RESTORE(pState); 168 160 169 161 kpreempt_enable(); 170 splx(pState->uOldPil);171 172 pState->uOldPil = UINT32_MAX;173 162 } 174 163 -
trunk/src/VBox/Runtime/r0drv/solaris/vbi/thread-r0drv-solaris.c
r22565 r22566 41 41 #include <iprt/err.h> 42 42 #include <iprt/mp.h> 43 43 44 44 45 … … 115 116 { 116 117 AssertPtr(pState); 117 // Assert(pState->uOldPil == UINT32_MAX);118 118 Assert(pState->u32Reserved == 0); 119 pState->u32Reserved = 42; 119 120 vbi_preempt_disable(); 120 /// @todo check out splr and splx on S10!121 // if (ASMIntAreEnabled())122 //pState->uOldPil = splr(ipltospl(DISP_LEVEL));123 // pState->uOldPil = splr(ipltospl(LOCK_LEVEL - 1)); //temporary124 // else125 // {126 // /* splr doesn't restore the interrupt flag on S10. */127 // pState->uOldPil = getpil();128 // if (pState->uOldPil < DISP_LEVEL)129 // pState->uOldPil = splx(DISP_LEVEL);130 // }131 132 // Assert(pState->uOldPil != UINT32_MAX);133 121 RT_ASSERT_PREEMPT_CPUID_DISABLE(pState); 134 122 } … … 138 126 { 139 127 AssertPtr(pState); 140 // Assert(pState->uOldPil != UINT32_MAX); 128 Assert(pState->u32Reserved == 42); 129 pState->u32Reserved = 0; 141 130 RT_ASSERT_PREEMPT_CPUID_RESTORE(pState); 142 143 131 vbi_preempt_enable(); 144 // splx(pState->uOldPil);145 146 // pState->uOldPil = UINT32_MAX;147 132 } 148 133
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