- Timestamp:
- Sep 22, 2009 2:37:01 PM (15 years ago)
- Location:
- trunk/src/VBox/VMM/VMMR0
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r23058 r23220 2408 2408 } 2409 2409 2410 case SVM_EXIT_TASK_SWITCH: /* too complicated to emulate, so fall back to the recompiler*/ 2411 Log(("SVM_EXIT_TASK_SWITCH: exit2=%RX64\n", pVMCB->ctrl.u64ExitInfo2)); 2412 if ( !(pVMCB->ctrl.u64ExitInfo2 & (SVM_EXIT2_TASK_SWITCH_IRET | SVM_EXIT2_TASK_SWITCH_JMP)) 2413 && pVCpu->hwaccm.s.Event.fPending) 2414 { 2415 SVM_EVENT Event; 2416 2417 Event.au64[0] = pVCpu->hwaccm.s.Event.intInfo; 2418 2419 /* Caused by an injected interrupt. */ 2420 pVCpu->hwaccm.s.Event.fPending = false; 2421 2422 switch (Event.n.u3Type) 2423 { 2424 case SVM_EVENT_EXTERNAL_IRQ: 2425 case SVM_EVENT_NMI: 2426 Log(("SVM_EXIT_TASK_SWITCH: reassert trap %d\n", Event.n.u8Vector)); 2427 Assert(!Event.n.u1ErrorCodeValid); 2428 rc = TRPMAssertTrap(pVCpu, Event.n.u8Vector, TRPM_HARDWARE_INT); 2429 AssertRC(rc); 2430 break; 2431 2432 default: 2433 /* Exceptions and software interrupts can just be restarted. */ 2434 break; 2435 } 2436 } 2437 rc = VERR_EM_INTERPRETER; 2438 break; 2439 2410 2440 case SVM_EXIT_MONITOR: 2411 2441 case SVM_EXIT_PAUSE: 2412 2442 case SVM_EXIT_MWAIT_ARMED: 2413 case SVM_EXIT_TASK_SWITCH: /* can change CR3; emulate */2414 2443 rc = VERR_EM_INTERPRETER; 2415 2444 break; -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r23058 r23220 3829 3829 break; 3830 3830 3831 case VMX_EXIT_TASK_SWITCH: /* 9 Task switch. */ 3831 case VMX_EXIT_TASK_SWITCH: /* 9 Task switch: too complicated to emulate, so fall back to the recompiler */ 3832 Log(("VMX_EXIT_TASK_SWITCH: exit=%RX64\n", exitQualification)); 3833 if ( (VMX_EXIT_QUALIFICATION_TASK_SWITCH_TYPE(exitQualification) == VMX_EXIT_QUALIFICATION_TASK_SWITCH_TYPE_IDT) 3834 && pVCpu->hwaccm.s.Event.fPending) 3835 { 3836 /* Caused by an injected interrupt. */ 3837 pVCpu->hwaccm.s.Event.fPending = false; 3838 3839 Log(("VMX_EXIT_TASK_SWITCH: reassert trap %d\n", VMX_EXIT_INTERRUPTION_INFO_VECTOR(pVCpu->hwaccm.s.Event.intInfo))); 3840 Assert(!VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_IS_VALID(pVCpu->hwaccm.s.Event.intInfo)); 3841 rc = TRPMAssertTrap(pVCpu, VMX_EXIT_INTERRUPTION_INFO_VECTOR(pVCpu->hwaccm.s.Event.intInfo), TRPM_HARDWARE_INT); 3842 AssertRC(rc); 3843 } 3844 else 3845 /* Exceptions and software interrupts can just be restarted. */ 3832 3846 rc = VERR_EM_INTERPRETER; 3833 3847 break;
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