- Timestamp:
- Oct 15, 2009 11:50:03 AM (15 years ago)
- svn:sync-xref-src-repo-rev:
- 53534
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/CPUM.cpp
r23787 r23794 228 228 && uECX == X86_CPUID_VENDOR_AMD_ECX 229 229 && uEDX == X86_CPUID_VENDOR_AMD_EDX) 230 pVM->cpum.s.enmCPUVendor = CPUMCPUVENDOR_AMD; 230 { 231 pVM->cpum.s.enmGuestCpuVendor = pVM->cpum.s.enmHostCpuVendor = CPUMCPUVENDOR_AMD; 232 } 231 233 else if ( uEAX >= 1 232 234 && uEBX == X86_CPUID_VENDOR_INTEL_EBX 233 235 && uECX == X86_CPUID_VENDOR_INTEL_ECX 234 236 && uEDX == X86_CPUID_VENDOR_INTEL_EDX) 235 pVM->cpum.s.enmCPUVendor = CPUMCPUVENDOR_INTEL; 237 { 238 pVM->cpum.s.enmGuestCpuVendor = pVM->cpum.s.enmHostCpuVendor = CPUMCPUVENDOR_INTEL; 239 } 236 240 else /** @todo Via */ 237 pVM->cpum.s.enmCPUVendor = CPUMCPUVENDOR_UNKNOWN; 241 { 242 pVM->cpum.s.enmGuestCpuVendor = pVM->cpum.s.enmHostCpuVendor = CPUMCPUVENDOR_UNKNOWN; 243 } 238 244 239 245 /* … … 400 406 if (pCPUM->fSyntheticCpu) 401 407 { 408 const char szVendor[13] = "VirtualBox "; 409 const char szProcessor[48] = "VirtualBox SPARCx86 Processor v1000 "; /* includes null terminator */ 410 411 pCPUM->enmGuestCpuVendor = CPUMCPUVENDOR_SYNTHETIC; 412 413 /* Vendor */ 414 pCPUM->aGuestCpuIdStd[0].ebx = pCPUM->aGuestCpuIdExt[0].ebx = ((uint32_t *)szVendor)[0]; 415 pCPUM->aGuestCpuIdStd[0].ecx = pCPUM->aGuestCpuIdExt[0].ecx = ((uint32_t *)szVendor)[2]; 416 pCPUM->aGuestCpuIdStd[0].edx = pCPUM->aGuestCpuIdExt[0].edx = ((uint32_t *)szVendor)[1]; 417 418 /* Processor Name String Identifier. */ 419 pCPUM->aGuestCpuIdExt[2].eax = ((uint32_t *)szProcessor)[0]; 420 pCPUM->aGuestCpuIdExt[2].ebx = ((uint32_t *)szProcessor)[1]; 421 pCPUM->aGuestCpuIdExt[2].ecx = ((uint32_t *)szProcessor)[2]; 422 pCPUM->aGuestCpuIdExt[2].edx = ((uint32_t *)szProcessor)[3]; 423 pCPUM->aGuestCpuIdExt[3].eax = ((uint32_t *)szProcessor)[4]; 424 pCPUM->aGuestCpuIdExt[3].ebx = ((uint32_t *)szProcessor)[5]; 425 pCPUM->aGuestCpuIdExt[3].ecx = ((uint32_t *)szProcessor)[6]; 426 pCPUM->aGuestCpuIdExt[3].edx = ((uint32_t *)szProcessor)[7]; 427 pCPUM->aGuestCpuIdExt[4].eax = ((uint32_t *)szProcessor)[8]; 428 pCPUM->aGuestCpuIdExt[4].ebx = ((uint32_t *)szProcessor)[9]; 429 pCPUM->aGuestCpuIdExt[4].ecx = ((uint32_t *)szProcessor)[10]; 430 pCPUM->aGuestCpuIdExt[4].edx = ((uint32_t *)szProcessor)[11]; 431 402 432 /* AMD only; shared feature bits are set dynamically. */ 403 433 pCPUM->aGuestCpuIdExt[1].edx = 0; … … 449 479 #ifdef VBOX_WITH_MULTI_CORE 450 480 if ( pVM->cCpus > 1 451 && pVM->cpum.s.enm CPUVendor == CPUMCPUVENDOR_INTEL)481 && pVM->cpum.s.enmGuestCpuVendor == CPUMCPUVENDOR_INTEL) 452 482 { 453 483 AssertReturn(pVM->cCpus <= 64, VERR_TOO_MANY_CPUS); … … 498 528 if (pCPUM->aGuestCpuIdExt[0].eax >= UINT32_C(0x80000007)) 499 529 { 500 Assert(pVM->cpum.s.enm CPUVendor != CPUMCPUVENDOR_INVALID);530 Assert(pVM->cpum.s.enmGuestCpuVendor != CPUMCPUVENDOR_INVALID); 501 531 502 532 pCPUM->aGuestCpuIdExt[7].eax = pCPUM->aGuestCpuIdExt[7].ebx = pCPUM->aGuestCpuIdExt[7].ecx = 0; 503 533 504 if (pVM->cpum.s.enm CPUVendor == CPUMCPUVENDOR_AMD)534 if (pVM->cpum.s.enmGuestCpuVendor == CPUMCPUVENDOR_AMD) 505 535 { 506 536 /* Only expose the TSC invariant capability bit to the guest. */ … … 543 573 #ifdef VBOX_WITH_MULTI_CORE 544 574 if ( pVM->cCpus > 1 545 && pVM->cpum.s.enm CPUVendor == CPUMCPUVENDOR_AMD)575 && pVM->cpum.s.enmGuestCpuVendor == CPUMCPUVENDOR_AMD) 546 576 { 547 577 /* Legacy method to determine the number of cores. */ -
trunk/src/VBox/VMM/CPUMInternal.h
r23758 r23794 286 286 } CPUFeaturesExt; 287 287 288 /* CPU manufacturer. */ 289 CPUMCPUVENDOR enmCPUVendor; 288 /* Host CPU manufacturer. */ 289 CPUMCPUVENDOR enmHostCpuVendor; 290 /* Guest CPU manufacturer. */ 291 CPUMCPUVENDOR enmGuestCpuVendor; 290 292 291 293 /** CR4 mask */ … … 311 313 CPUMCPUID GuestCpuIdDef; 312 314 315 #if HC_ARCH_BITS == 32 313 316 /** Align the next member, and thereby the structure, on a 64-byte boundrary. */ 314 uint8_t abPadding2[HC_ARCH_BITS == 32 ? 8 : 4]; 317 uint8_t abPadding2[4]; 318 #endif 315 319 316 320 /** -
trunk/src/VBox/VMM/CPUMInternal.mac
r23758 r23794 64 64 .CPUFeaturesExt.ecx resd 1 65 65 66 .enmCPUVendor resd 1 66 .enmHostCpuVendor resd 1 67 .enmGuestCpuVendor resd 1 67 68 68 69 ; CR4 masks -
trunk/src/VBox/VMM/HWACCM.cpp
r23733 r23794 1559 1559 * Needs to be extended to Intel CPUs without the APIC TPR hardware optimization. 1560 1560 */ 1561 if (CPUMGet CPUVendor(pVM) != CPUMCPUVENDOR_AMD)1561 if (CPUMGetHostCpuVendor(pVM) != CPUMCPUVENDOR_AMD) 1562 1562 return VERR_NOT_SUPPORTED; 1563 1563 -
trunk/src/VBox/VMM/TM.cpp
r23012 r23794 690 690 uint32_t uEAX, uEBX, uECX, uEDX; 691 691 692 if (CPUMGet CPUVendor(pVM) == CPUMCPUVENDOR_AMD)692 if (CPUMGetHostCpuVendor(pVM) == CPUMCPUVENDOR_AMD) 693 693 { 694 694 /* … … 710 710 } 711 711 } 712 else if (CPUMGet CPUVendor(pVM) == CPUMCPUVENDOR_INTEL)712 else if (CPUMGetHostCpuVendor(pVM) == CPUMCPUVENDOR_INTEL) 713 713 { 714 714 /* -
trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp
r22890 r23794 1082 1082 if ( iLeaf == 4 1083 1083 && fHasMoreCaches 1084 && pVM->cpum.s.enm CPUVendor == CPUMCPUVENDOR_INTEL)1084 && pVM->cpum.s.enmGuestCpuVendor == CPUMCPUVENDOR_INTEL) 1085 1085 { 1086 1086 /* Report unified L0 cache, Linux'es num_cpu_cores() requires … … 1148 1148 pVM->cpum.s.aGuestCpuIdStd[1].edx |= X86_CPUID_FEATURE_EDX_APIC; 1149 1149 if ( pVM->cpum.s.aGuestCpuIdExt[0].eax >= 0x80000001 1150 && pVM->cpum.s.enm CPUVendor == CPUMCPUVENDOR_AMD)1150 && pVM->cpum.s.enmGuestCpuVendor == CPUMCPUVENDOR_AMD) 1151 1151 pVM->cpum.s.aGuestCpuIdExt[1].edx |= X86_CPUID_AMD_FEATURE_EDX_APIC; 1152 1152 LogRel(("CPUMSetGuestCpuIdFeature: Enabled APIC\n")); … … 1223 1223 pVM->cpum.s.aGuestCpuIdStd[1].edx |= X86_CPUID_FEATURE_EDX_PAE; 1224 1224 if ( pVM->cpum.s.aGuestCpuIdExt[0].eax >= 0x80000001 1225 && pVM->cpum.s.enm CPUVendor == CPUMCPUVENDOR_AMD)1225 && pVM->cpum.s.enmGuestCpuVendor == CPUMCPUVENDOR_AMD) 1226 1226 pVM->cpum.s.aGuestCpuIdExt[1].edx |= X86_CPUID_AMD_FEATURE_EDX_PAE; 1227 1227 LogRel(("CPUMSetGuestCpuIdFeature: Enabled PAE\n")); … … 1286 1286 pVM->cpum.s.aGuestCpuIdStd[1].edx |= X86_CPUID_FEATURE_EDX_PAT; 1287 1287 if ( pVM->cpum.s.aGuestCpuIdExt[0].eax >= 0x80000001 1288 && pVM->cpum.s.enm CPUVendor == CPUMCPUVENDOR_AMD)1288 && pVM->cpum.s.enmGuestCpuVendor == CPUMCPUVENDOR_AMD) 1289 1289 pVM->cpum.s.aGuestCpuIdExt[1].edx |= X86_CPUID_AMD_FEATURE_EDX_PAT; 1290 1290 LogRel(("CPUMClearGuestCpuIdFeature: Enabled PAT\n")); … … 1376 1376 pVM->cpum.s.aGuestCpuIdStd[1].edx &= ~X86_CPUID_FEATURE_EDX_APIC; 1377 1377 if ( pVM->cpum.s.aGuestCpuIdExt[0].eax >= 0x80000001 1378 && pVM->cpum.s.enm CPUVendor == CPUMCPUVENDOR_AMD)1378 && pVM->cpum.s.enmGuestCpuVendor == CPUMCPUVENDOR_AMD) 1379 1379 pVM->cpum.s.aGuestCpuIdExt[1].edx &= ~X86_CPUID_AMD_FEATURE_EDX_APIC; 1380 1380 Log(("CPUMSetGuestCpuIdFeature: Disabled APIC\n")); … … 1395 1395 pVM->cpum.s.aGuestCpuIdStd[1].edx &= ~X86_CPUID_FEATURE_EDX_PAE; 1396 1396 if ( pVM->cpum.s.aGuestCpuIdExt[0].eax >= 0x80000001 1397 && pVM->cpum.s.enm CPUVendor == CPUMCPUVENDOR_AMD)1397 && pVM->cpum.s.enmGuestCpuVendor == CPUMCPUVENDOR_AMD) 1398 1398 pVM->cpum.s.aGuestCpuIdExt[1].edx &= ~X86_CPUID_AMD_FEATURE_EDX_PAE; 1399 1399 LogRel(("CPUMClearGuestCpuIdFeature: Disabled PAE!\n")); … … 1406 1406 pVM->cpum.s.aGuestCpuIdStd[1].edx &= ~X86_CPUID_FEATURE_EDX_PAT; 1407 1407 if ( pVM->cpum.s.aGuestCpuIdExt[0].eax >= 0x80000001 1408 && pVM->cpum.s.enm CPUVendor == CPUMCPUVENDOR_AMD)1408 && pVM->cpum.s.enmGuestCpuVendor == CPUMCPUVENDOR_AMD) 1409 1409 pVM->cpum.s.aGuestCpuIdExt[1].edx &= ~X86_CPUID_AMD_FEATURE_EDX_PAT; 1410 1410 LogRel(("CPUMClearGuestCpuIdFeature: Disabled PAT!\n")); … … 1439 1439 1440 1440 /** 1441 * Gets the CPU vendor1441 * Gets the host CPU vendor 1442 1442 * 1443 1443 * @returns CPU vendor 1444 1444 * @param pVM The VM handle. 1445 1445 */ 1446 VMMDECL(CPUMCPUVENDOR) CPUMGetCPUVendor(PVM pVM) 1447 { 1448 return pVM->cpum.s.enmCPUVendor; 1446 VMMDECL(CPUMCPUVENDOR) CPUMGetHostCpuVendor(PVM pVM) 1447 { 1448 return pVM->cpum.s.enmHostCpuVendor; 1449 } 1450 1451 /** 1452 * Gets the CPU vendor 1453 * 1454 * @returns CPU vendor 1455 * @param pVM The VM handle. 1456 */ 1457 VMMDECL(CPUMCPUVENDOR) CPUMGetGuestCpuVendor(PVM pVM) 1458 { 1459 return pVM->cpum.s.enmGuestCpuVendor; 1449 1460 } 1450 1461
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