Changeset 24125 in vbox for trunk/src/VBox/Devices/PC

Timestamp:

Oct 28, 2009 9:58:41 AM (15 years ago)

Author:

vboxsync

Message:

DevAPIC/PDM: Properly route PIC interrupts through local APIC (fixes double time interrupt delivery in some Linux kernels).

File:

• trunk/src/VBox/Devices/PC/DevAPIC.cpp (modified) (8 diffs)

trunk/src/VBox/Devices/PC/DevAPIC.cpp

@@ -390 +390 @@
                                            uint8_t u8DeliveryMode, uint8_t iVector, uint8_t u8Polarity,
                                            uint8_t u8TriggerMode);
+PDMBOTHCBDECL(int)  apicLocalInterrupt(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level);
 PDMBOTHCBDECL(int)  apicWriteMSR(PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t u64Value);
 PDMBOTHCBDECL(int)  apicReadMSR(PPDMDEVINS pDevIns, VMCPUID iCpu, uint32_t u32Reg, uint64_t *pu64Value);
@@ -446 +447 @@
 }
 
-DECLINLINE(void) cpuClearInterrupt(APICDeviceInfo* dev, APICState *s)
+DECLINLINE(void) cpuClearInterrupt(APICDeviceInfo* dev, APICState *s, PDMAPICIRQ enmType = PDMAPICIRQ_HARDWARE)
 {
     LogFlow(("apic: clear interrupt flag\n"));
-    dev->CTX_SUFF(pApicHlp)->pfnClearInterruptFF(dev->CTX_SUFF(pDevIns),
+    dev->CTX_SUFF(pApicHlp)->pfnClearInterruptFF(dev->CTX_SUFF(pDevIns), enmType,
                                                  getCpuFromLapic(dev, s));
 }
@@ -961 +962 @@
     return apic_bus_deliver(dev, apic_get_delivery_bitmask(dev, u8Dest, u8DestMode),
                             u8DeliveryMode, iVector, u8Polarity, u8TriggerMode);
+}
+
+/**
+ * Local interrupt delivery, for devices attached to the CPU's LINT0/LINT1 pin.
+ * Normally used for 8259A PIC and NMI.
+ */
+PDMBOTHCBDECL(int) apicLocalInterrupt(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level)
+{
+    APICDeviceInfo  *dev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *);
+    APICState       *s = getLapicById(dev, 0);
+
+    Assert(PDMCritSectIsOwner(dev->CTX_SUFF(pCritSect)));
+    LogFlow(("apicLocalInterrupt: pDevIns=%p u8Pin=%x\n", pDevIns, u8Pin));
+
+    /* If LAPIC is disabled, go straight to the CPU. */
+    if (!(s->spurious_vec & APIC_SV_ENABLE))
+    {
+        LogFlow(("apicLocalInterrupt: LAPIC disabled, delivering directly to CPU core.\n"));
+        if (u8Level)
+            cpuSetInterrupt(dev, s, PDMAPICIRQ_EXTINT);
+        else
+            cpuClearInterrupt(dev, s, PDMAPICIRQ_EXTINT);
+
+        return VINF_SUCCESS;
+    }
+
+    /* If LAPIC is enabled, interrupts are subject to LVT programming. */
+    if (u8Pin > 1)
+    {
+        /* There are only two local interrupt pins. */
+        AssertMsgFailed(("Invalid LAPIC pin %d\n", u8Pin));
+        return VERR_INVALID_PARAMETER;
+    }
+
+    /* NB: We currently only deliver local interrupts to the first CPU. In theory they
+     * should be delivered to all CPUs and it is the guest's responsibility to ensure
+     * no more than one CPU has the interrupt unmasked.
+     */
+    uint32_t    u32Lvec;
+
+    u32Lvec = s->lvt[APIC_LVT_LINT0 + u8Pin];   /* Fetch corresponding LVT entry. */
+    /* Drop int if entry is masked. May not be correct for level-triggered interrupts. */
+    if (!(u32Lvec & APIC_LVT_MASKED))
+    {   uint8_t     u8Delivery;
+        PDMAPICIRQ  enmType;
+
+        u8Delivery = (u32Lvec >> 8) & 7;
+        switch (u8Delivery) 
+        {
+        case APIC_DM_EXTINT:
+            Assert(u8Pin == 0); /* PIC should be wired to LINT0. */
+            enmType = PDMAPICIRQ_EXTINT;
+            break;
+        case APIC_DM_NMI:
+            Assert(u8Pin == 0); /* NMI should be wired to LINT1. */
+            enmType = PDMAPICIRQ_NMI;
+            break;
+        case APIC_DM_SMI:
+            enmType = PDMAPICIRQ_SMI;
+            break;
+
+        }
+        LogFlow(("apicLocalInterrupt: setting local interrupt type %d\n", enmType));
+        cpuSetInterrupt(dev, s, enmType);
+    }
+    return VINF_SUCCESS;
 }
 
@@ -2744 +2811 @@
     ApicReg.pfnReadMSRR3            = apicReadMSR;
     ApicReg.pfnBusDeliverR3         = apicBusDeliverCallback;
+    ApicReg.pfnLocalInterruptR3     = apicLocalInterrupt;
     if (fGCEnabled) {
         ApicReg.pszGetInterruptRC   = "apicGetInterrupt";
@@ -2754 +2822 @@
         ApicReg.pszReadMSRRC        = "apicReadMSR";
         ApicReg.pszBusDeliverRC     = "apicBusDeliverCallback";
+        ApicReg.pszLocalInterruptRC = "apicLocalInterrupt";
     } else {
         ApicReg.pszGetInterruptRC   = NULL;
@@ -2764 +2833 @@
         ApicReg.pszReadMSRRC        = NULL;
         ApicReg.pszBusDeliverRC     = NULL;
+        ApicReg.pszLocalInterruptRC = NULL;
     }
     if (fR0Enabled) {
@@ -2775 +2845 @@
         ApicReg.pszReadMSRR0        = "apicReadMSR";
         ApicReg.pszBusDeliverR0     = "apicBusDeliverCallback";
+        ApicReg.pszLocalInterruptR0 = "apicLocalInterrupt";
     } else {
         ApicReg.pszGetInterruptR0   = NULL;
@@ -2785 +2856 @@
         ApicReg.pszReadMSRR0        = NULL;
         ApicReg.pszBusDeliverR0     = NULL;
+        ApicReg.pszLocalInterruptR0 = NULL;
     }