Changeset 2506 in vbox for trunk/src/VBox/VMM
- Timestamp:
- May 4, 2007 6:21:26 PM (18 years ago)
- Location:
- trunk/src/VBox/VMM/VMMR0
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r2297 r2506 1190 1190 } 1191 1191 1192 /* * @noteWe'll get a #GP if the IO instruction isn't allowed (IOPL or TSS bitmap); no need to double check. */1192 /* Note: We'll get a #GP if the IO instruction isn't allowed (IOPL or TSS bitmap); no need to double check. */ 1193 1193 case SVM_EXIT_IOIO: /* I/O instruction. */ 1194 1194 { … … 1260 1260 STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitIORead); 1261 1261 rc = IOMIOPortRead(pVM, IoExitInfo.n.u16Port, &u32Val, uIOSize); 1262 if (rc == VINF_SUCCESS) 1262 if ( rc == VINF_SUCCESS 1263 || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)) 1263 1264 { 1264 1265 /* Write back to the EAX register. */ … … 1268 1269 } 1269 1270 } 1270 if (rc == VINF_SUCCESS) 1271 if ( rc == VINF_SUCCESS 1272 || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)) 1271 1273 { 1272 1274 /* Update EIP and continue execution. */ 1273 1275 pCtx->eip = pVMCB->ctrl.u64ExitInfo2; /* RIP/EIP of the next instruction is saved in EXITINFO2. */ 1274 STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x); 1275 goto ResumeExecution; 1276 } 1277 Assert(rc == VINF_IOM_HC_IOPORT_READ || rc == VINF_IOM_HC_IOPORT_WRITE); 1278 rc = (IoExitInfo.n.u1Type == 0) ? VINF_IOM_HC_IOPORT_WRITE : VINF_IOM_HC_IOPORT_READ; 1276 if (RT_LIKELY(rc == VINF_SUCCESS)) 1277 { 1278 STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x); 1279 goto ResumeExecution; 1280 } 1281 Log2(("EM status from IO at %VGv %x size %d: %Vrc\n", pCtx->eip, IoExitInfo.n.u16Port, uIOSize, rc)); 1282 break; 1283 } 1284 #ifdef VBOX_STRICT 1285 if (rc == VINF_IOM_HC_IOPORT_READ) 1286 Assert(IoExitInfo.n.u1Type != 0); 1287 else if (rc == VINF_IOM_HC_IOPORT_WRITE) 1288 Assert(IoExitInfo.n.u1Type == 0); 1289 else 1290 AssertMsg(VBOX_FAILURE(rc) || rc == VINF_EM_RAW_GUEST_TRAP || rc == VINF_TRPM_XCPT_DISPATCHED || rc == VINF_EM_RESCHEDULE_REM, ("%Vrc\n", rc)); 1291 #endif 1279 1292 Log2(("Failed IO at %VGv %x size %d\n", pCtx->eip, IoExitInfo.n.u16Port, uIOSize)); 1280 1293 break; -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r2297 r2506 1565 1565 if (RT_UNLIKELY(uIOWidth == 2 || uIOWidth >= 4)) 1566 1566 { 1567 rc = VINF_IOM_HC_IOPORT_READWRITE;1567 rc = fIOWrite ? VINF_IOM_HC_IOPORT_WRITE : VINF_IOM_HC_IOPORT_READ; 1568 1568 break; 1569 1569 } … … 1609 1609 STAM_COUNTER_INC(&pVM->hwaccm.s.StatExitIORead); 1610 1610 rc = IOMIOPortRead(pVM, uPort, &u32Val, cbSize); 1611 if (rc == VINF_SUCCESS) 1611 if ( rc == VINF_SUCCESS 1612 || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)) 1612 1613 { 1613 1614 /* Write back to the EAX register. */ … … 1616 1617 } 1617 1618 } 1618 if (rc == VINF_SUCCESS) 1619 if ( rc == VINF_SUCCESS 1620 || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)) 1619 1621 { 1620 1622 /* Update EIP and continue execution. */ 1621 1623 pCtx->eip += cbInstr; 1622 STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x); 1623 goto ResumeExecution; 1624 } 1625 Assert(rc == VINF_IOM_HC_IOPORT_READ || rc == VINF_IOM_HC_IOPORT_WRITE); 1626 rc = (fIOWrite) ? VINF_IOM_HC_IOPORT_WRITE : VINF_IOM_HC_IOPORT_READ; 1627 1624 if (RT_LIKELY(rc == VINF_SUCCESS)) 1625 { 1626 STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x); 1627 goto ResumeExecution; 1628 } 1629 break; 1630 } 1631 #ifdef VBOX_STRICT 1632 if (rc == VINF_IOM_HC_IOPORT_READ) 1633 Assert(!fIOWrite); 1634 else if (rc == VINF_IOM_HC_IOPORT_WRITE) 1635 Assert(fIOWrite); 1636 else 1637 AssertMsg(VBOX_FAILURE(rc) || rc == VINF_EM_RAW_GUEST_TRAP || rc == VINF_TRPM_XCPT_DISPATCHED || rc == VINF_EM_RESCHEDULE_REM, ("%Vrc\n", rc)); 1638 #endif 1628 1639 break; 1629 1640 } … … 1634 1645 } 1635 1646 1636 /* *Note: the guest state isn't entirely synced back at this stage. */1647 /* Note: the guest state isn't entirely synced back at this stage. */ 1637 1648 1638 1649 /* Investigate why there was a VM-exit. (part 2) */ … … 1705 1716 case VMX_EXIT_PORT_IO: /* 30 I/O instruction. */ 1706 1717 /* already handled above */ 1707 AssertMsg(rc == VINF_PGM_CHANGE_MODE || rc == VINF_EM_RAW_INTERRUPT || rc == VINF_EM_RAW_EMULATE_INSTR || rc == VINF_PGM_SYNC_CR3 || rc == VINF_IOM_HC_IOPORT_READ || rc == VINF_IOM_HC_IOPORT_WRITE || rc == VINF_IOM_HC_IOPORT_READWRITE, ("rc = %d\n", rc)); 1718 AssertMsg(rc == VINF_PGM_CHANGE_MODE || rc == VINF_EM_RAW_INTERRUPT || rc == VINF_EM_RAW_EMULATE_INSTR || rc == VINF_PGM_SYNC_CR3 || rc == VINF_IOM_HC_IOPORT_READ || rc == VINF_IOM_HC_IOPORT_WRITE 1719 || rc == VINF_EM_RAW_GUEST_TRAP || rc == VINF_TRPM_XCPT_DISPATCHED || rc == VINF_EM_RESCHEDULE_REM, ("rc = %d\n", rc)); 1708 1720 break; 1709 1721
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