Changeset 25665 in vbox for trunk/include

Timestamp:

Jan 6, 2010 4:19:49 AM (15 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

56380

Message:

iprt/asm.h,ASMAtomic*.asm: the darwin x86 gcc also has trouble with our cmpxchg8b usage, do like we did for gcc 4.3.x/x86 a while back. Did it for *all* cmpxchg8b users (we missed(?) 3 last time).

File:

• trunk/include/iprt/asm.h (modified) (7 diffs)

trunk/include/iprt/asm.h

@@ -117 +117 @@
 #endif
 
-/** @def RT_INLINE_ASM_GCC_4_3_X_X86
- * Used to work around some 4.3.x register allocation issues in this version of
- * the compiler. */
-#ifdef __GNUC__
-# define RT_INLINE_ASM_GCC_4_3_X_X86 (__GNUC__ == 4 && __GNUC_MINOR__ == 3 && defined(__i386__))
-#endif
-#ifndef RT_INLINE_ASM_GCC_4_3_X_X86
-# define RT_INLINE_ASM_GCC_4_3_X_X86 0
-#endif
-
-
 
 /** @defgroup grp_asm       ASM - Assembly Routines
@@ -167 +156 @@
  * @{
  */
+
+/** @def RT_INLINE_ASM_GCC_4_3_X_X86
+ * Used to work around some 4.3.x register allocation issues in this version of
+ * the compiler. */
+#ifdef __GNUC__
+# define RT_INLINE_ASM_GCC_4_3_X_X86 (__GNUC__ == 4 && __GNUC_MINOR__ == 3 && defined(__i386__))
+#endif
+#ifndef RT_INLINE_ASM_GCC_4_3_X_X86
+# define RT_INLINE_ASM_GCC_4_3_X_X86 0
+#endif
+
+/** @def RT_INLINE_DONT_USE_CMPXCHG8B
+ * i686-apple-darwin9-gcc-4.0.1 (GCC) 4.0.1 (Apple Inc. build 5493) screws up
+ * RTSemRWRequestWrite semsemrw-lockless-generic.cpp in release builds. PIC
+ * mode, x86.
+ *
+ * Some gcc 4.3.x versions may have register allocation issues with cmpxchg8b
+ * when in PIC mode on x86.
+ */
+#ifndef RT_INLINE_DONT_MIX_CMPXCHG8B_AND_PIC
+# define RT_INLINE_DONT_MIX_CMPXCHG8B_AND_PIC \
+    (   (defined(PIC) || defined(__PIC__)) \
+     && defined(RT_ARCH_X86) \
+     && (   RT_INLINE_ASM_GCC_4_3_X_X86 \
+         || defined(RT_OS_DARWIN)) )
+#endif
 
 /** @def RT_INLINE_ASM_EXTERNAL
@@ -2808 +2823 @@
  * @param   u64     The 64-bit value to assign to *pu64.
  */
-#if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN
+#if (RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN) \
+ || RT_INLINE_DONT_MIX_CMPXCHG8B_AND_PIC
 DECLASM(uint64_t) ASMAtomicXchgU64(volatile uint64_t *pu64, uint64_t u64);
 #else
@@ -3175 +3191 @@
  */
 #if (RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN) \
- || (RT_INLINE_ASM_GCC_4_3_X_X86 && defined(IN_RING3) && defined(__PIC__))
+ || RT_INLINE_DONT_MIX_CMPXCHG8B_AND_PIC
 DECLASM(bool) ASMAtomicCmpXchgU64(volatile uint64_t *pu64, const uint64_t u64New, const uint64_t u64Old);
 #else
-DECLINLINE(bool) ASMAtomicCmpXchgU64(volatile uint64_t *pu64, const uint64_t u64New, uint64_t u64Old)
+DECLINLINE(bool) ASMAtomicCmpXchgU64(volatile uint64_t *pu64, uint64_t u64New, uint64_t u64Old)
 {
 # if RT_INLINE_ASM_USES_INTRIN
@@ -3443 +3459 @@
  * @param   pu64Old     Pointer store the old value at.
  */
-#if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN
+#if (RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN) \
+ || RT_INLINE_DONT_MIX_CMPXCHG8B_AND_PIC
 DECLASM(bool) ASMAtomicCmpXchgExU64(volatile uint64_t *pu64, const uint64_t u64New, const uint64_t u64Old, uint64_t *pu64Old);
 #else
@@ -4222 +4239 @@
  */
 #if (RT_INLINE_ASM_EXTERNAL && !defined(RT_ARCH_AMD64)) \
- || (RT_INLINE_ASM_GCC_4_3_X_X86 && defined(IN_RING3) && defined(__PIC__))
+ || RT_INLINE_DONT_MIX_CMPXCHG8B_AND_PIC
 DECLASM(uint64_t) ASMAtomicReadU64(volatile uint64_t *pu64);
 #else
@@ -4300 +4317 @@
  * @remark  This will fault if the memory is read-only!
  */
-#if RT_INLINE_ASM_EXTERNAL && !defined(RT_ARCH_AMD64)
+#if #if (RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN) \
+ || RT_INLINE_DONT_MIX_CMPXCHG8B_AND_PIC
 DECLASM(uint64_t) ASMAtomicUoReadU64(volatile uint64_t *pu64);
 #else