Changeset 2581 in vbox

Timestamp:

May 10, 2007 3:13:29 PM (18 years ago)

Author:

vboxsync

Message:

New method for HWACCM called TMCpuTickCanUseRealTSC() (completely untested).

Location:

trunk

Files:

• include/VBox/tm.h (modified) (3 diffs)
• src/VBox/VMM/TM.cpp (modified) (4 diffs)
• src/VBox/VMM/TMInternal.h (modified) (1 diff)
• src/VBox/VMM/VMMAll/TMAll.cpp (modified) (1 diff)
• src/VBox/VMM/VMMAll/TMAllCpu.cpp (modified) (2 diffs)

trunk/include/VBox/tm.h

@@ -64 +64 @@
 
 
-
 /** @name Real Clock Methods
  * @{
@@ -292 +291 @@
  * @returns TSC ofset
  * @param   pVM         The VM to operate on.
+ * @todo    Remove this when the code has been switched to TMCpuTickCanUseRealTSC.
  */
 TMDECL(uint64_t) TMCpuTickGetOffset(PVM pVM);
+
+/**
+ * Checks if AMD-V / VT-x can use an offsetted hardware TSC or not.
+ * 
+ * @returns true/false accordingly.
+ * @param   pVM             The VM handle.
+ * @param   poffRealTSC     The offset against the TSC of the current CPU.
+ *                          Can be NULL.
+ * @thread EMT.
+ */
+TMDECL(bool) TMCpuTickCanUseRealTSC(PVM pVM, uint64_t *poffRealTSC);
 
 /**
@@ -543 +554 @@
  */
 TMDECL(uint64_t) TMTimerFromMilli(PTMTIMER pTimer, uint64_t u64MilliTS);
-
 
 /**

trunk/src/VBox/VMM/TM.cpp

@@ -133 +133 @@
 *   Internal Functions                                                         *
 *******************************************************************************/
-static uint64_t             tmR3Calibrate(void);
+static bool                 tmR3HasFixedTSC(void);
+static uint64_t             tmR3CalibrateTSC(void);
 static DECLCALLBACK(int)    tmR3Save(PVM pVM, PSSMHANDLE pSSM);
 static DECLCALLBACK(int)    tmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t u32Version);
@@ -253 +254 @@
         pVM->tm.s.fTSCVirtualized = true;
 
+    /* TSC reliability */
+    rc = CFGMR3QueryBool(pCfgHandle, "MaybeUseOffsettedHostTSC", &pVM->tm.s.fMaybeUseOffsettedHostTSC);
+    if (rc == VERR_CFGM_VALUE_NOT_FOUND)
+    {
+        if (!pVM->tm.s.fTSCUseRealTSC)
+            pVM->tm.s.fMaybeUseOffsettedHostTSC = tmR3HasFixedTSC();
+        else
+            pVM->tm.s.fMaybeUseOffsettedHostTSC = true;
+    }
+
     /* frequency */
     rc = CFGMR3QueryU64(pCfgHandle, "TSCTicksPerSecond", &pVM->tm.s.cTSCTicksPerSecond);
     if (rc == VERR_CFGM_VALUE_NOT_FOUND)
     {
-        pVM->tm.s.cTSCTicksPerSecond = tmR3Calibrate();
+        pVM->tm.s.cTSCTicksPerSecond = tmR3CalibrateTSC();
         if (    !pVM->tm.s.fTSCUseRealTSC
             &&  pVM->tm.s.cTSCTicksPerSecond >= _4G)
+        {
             pVM->tm.s.cTSCTicksPerSecond = _4G - 1; /* (A limitation of our math code) */
+            pVM->tm.s.fMaybeUseOffsettedHostTSC = false;
+        }
     }
     else if (VBOX_FAILURE(rc))
@@ -272 +286 @@
     else
     {
-        pVM->tm.s.fTSCUseRealTSC = false;
+        pVM->tm.s.fTSCUseRealTSC = pVM->tm.s.fMaybeUseOffsettedHostTSC =  false;
         pVM->tm.s.fTSCVirtualized = true;
     }
 
     /* setup and report */
-    if (pVM->tm.s.fTSCUseRealTSC)
+    if (pVM->tm.s.fTSCVirtualized)
+        CPUMR3SetCR4Feature(pVM, X86_CR4_TSD, ~X86_CR4_TSD);
+    else
         CPUMR3SetCR4Feature(pVM, 0, ~X86_CR4_TSD);
-    else
-        CPUMR3SetCR4Feature(pVM, X86_CR4_TSD, ~X86_CR4_TSD);
-    LogRel(("TM: cTSCTicksPerSecond=%#RX64 (%RU64) fTSCVirtualized=%RTbool fTSCUseRealTSC=%RTbool\n", 
-            pVM->tm.s.cTSCTicksPerSecond, pVM->tm.s.cTSCTicksPerSecond, pVM->tm.s.fTSCVirtualized, pVM->tm.s.fTSCUseRealTSC));
+    LogRel(("TM: cTSCTicksPerSecond=%#RX64 (%RU64) fTSCVirtualized=%RTbool fTSCUseRealTSC=%RTbool fMaybeUseOffsettedHostTSC=%RTbool\n", 
+            pVM->tm.s.cTSCTicksPerSecond, pVM->tm.s.cTSCTicksPerSecond, pVM->tm.s.fTSCVirtualized, 
+            pVM->tm.s.fTSCUseRealTSC, pVM->tm.s.fMaybeUseOffsettedHostTSC));
 
     /*
@@ -464 +479 @@
 
 /**
+ * Checks if the host CPU has a fixed TSC frequency.
+ * 
+ * @returns true if it has, false if it hasn't.
+ * 
+ * @remark  This test doesn't bother with very old CPUs that doesn't do power 
+ *          management or any other stuff that might influence the TSC rate.
+ *          This isn't currently relevant.
+ */
+static bool tmR3HasFixedTSC(void)
+{
+    if (ASMHasCpuId())
+    {
+        uint32_t uEAX, uEBX, uECX, uEDX;
+        ASMCpuId(0, &uEAX, &uEBX, &uECX, &uEDX);
+        if (    uEAX >= 1
+            &&  uEBX == 0x68747541 
+            &&  uECX == 0x444d4163 
+            &&  uEDX == 0x69746e65)
+        {
+            /* 
+             * AuthenticAMD - Check for APM support and that TscInvariant is set.
+             *
+             * This test isn't correct with respect to fixed/non-fixed TSC and 
+             * older models, but this isn't relevant since the result is currently
+             * only used for making a descision on AMD-V models.
+             */
+            ASMCpuId(0x80000000, &uEAX, &uEBX, &uECX, &uEDX);
+            if (uEAX >= 0x80000007)
+            {
+                ASMCpuId(0x80000007, &uEAX, &uEBX, &uECX, &uEDX);
+                if (uEDX & BIT(8) /* TscInvariant */)
+                    return true;
+            }
+        }
+        else if (    uEAX >= 1
+                 &&  uEBX == 0x756e6547
+                 &&  uECX == 0x6c65746e
+                 &&  uEDX == 0x49656e69)
+        {
+            /* 
+             * GenuineIntel - Check the model number.
+             * 
+             * This test is lacking in the same way and for the same reasons
+             * as the AMD test above.
+             */
+            ASMCpuId(1, &uEAX, &uEBX, &uECX, &uEDX);
+            unsigned uModel  = (uEAX >> 4) & 0x0f;
+            unsigned uFamily = (uEAX >> 8) & 0x0f;
+            if (uFamily == 0x0f)
+                uFamily += (uEAX >> 20) & 0xff;
+            if (uFamily >= 0x06)
+                uModel += ((uEAX >> 16) & 0x0f) << 4;
+            if (    (uFamily == 0x0f /*P4*/     && uModel >= 0x03)
+                ||  (uFamily == 0x06 /*P2/P3*/  && uModel >= 0x0e))
+                return true;
+        }
+    }
+    return false;
+}
+
+
+/**
  * Calibrate the CPU tick.
  *
  * @returns Number of ticks per second.
  */
-static uint64_t tmR3Calibrate(void)
+static uint64_t tmR3CalibrateTSC(void)
 {
     /*

trunk/src/VBox/VMM/TMInternal.h

@@ -286 +286 @@
     RTUINT                      offVM;
 
+    /** Flag indicating that the host TSC is suitable for use in AMD-V and VT-x mode.
+     * Config variable: MaybeUseOffsettedHostTSC (boolean) */
+    bool                        fMaybeUseOffsettedHostTSC;
     /** CPU timestamp ticking enabled indicator (bool). (RDTSC) */
     bool                        fTSCTicking;

trunk/src/VBox/VMM/VMMAll/TMAll.cpp

@@ -1336 +1336 @@
 #endif /* !VBOX_STRICT */
 
-

trunk/src/VBox/VMM/VMMAll/TMAllCpu.cpp

@@ -99 +99 @@
  * @returns TSC ofset
  * @param   pVM         The VM to operate on.
+ * @todo    Remove this when the code has been switched to TMCpuTickCanUseRealTSC.
  */
 TMDECL(uint64_t) TMCpuTickGetOffset(PVM pVM)
@@ -120 +121 @@
 
     return u64 - ASMReadTSC();
+}
+
+
+/**
+ * Checks if AMD-V / VT-x can use an offsetted hardware TSC or not.
+ * 
+ * @returns true/false accordingly.
+ * @param   pVM             The VM handle.
+ * @param   poffRealTSC     The offset against the TSC of the current CPU.
+ *                          Can be NULL.
+ * @thread EMT.
+ */
+TMDECL(bool) TMCpuTickCanUseRealTSC(PVM pVM, uint64_t *poffRealTSC)
+{
+    /*
+     * We require:
+     *     1. A fixed TSC, this is checked at init time.
+     *     2. That the TSC is ticking (we shouldn't be here if it isn't)
+     *     3. Either that we're using the real TSC as time source or
+     *          a) We don't have any lag to catch up.
+     *          b) The virtual sync clock hasn't been halted by an expired timer.
+     *          c) We're not using warp drive (accelerated virtual guest time).
+     */
+    if (    pVM->tm.s.fMaybeUseOffsettedHostTSC
+        &&  RT_LIKELY(pVM->tm.s.fTSCTicking)
+        &&  (   pVM->tm.s.fTSCUseRealTSC
+             || (   !pVM->tm.s.fVirtualSyncCatchUp
+                 && RT_LIKELY(pVM->tm.s.fVirtualSyncTicking)
+                 && !pVM->tm.s.fVirtualWarpDrive))
+       )
+    {
+        if (!pVM->tm.s.fTSCUseRealTSC)
+        {
+            /* The source is the timer synchronous virtual clock. */
+            Assert(pVM->tm.s.fTSCVirtualized);
+
+            if (poffRealTSC)
+            {
+                uint64_t u64Now = tmCpuTickGetRawVirtual(pVM, false /* don't check for pending timers */)
+                                - pVM->tm.s.u64TSCOffset;
+                /** @todo When we start collecting statistics on how much time we spend executing 
+                 * guest code before exiting, we should check this against the next virtual sync 
+                 * timer timeout. If it's lower than the avg. length, we should trap rdtsc to increase 
+                 * the chance that we'll get interrupted right after the timer expired. */
+                *poffRealTSC = u64Now - ASMReadTSC();
+            }
+        }
+        else if (poffRealTSC)
+        {
+            /* The source is the real TSC. */
+            if (pVM->tm.s.fTSCVirtualized)
+                *poffRealTSC = pVM->tm.s.u64TSCOffset;
+            else
+                *poffRealTSC = 0;
+        }
+        return true;
+    }
+
+    return false;
 }