Changeset 2598 in vbox

Timestamp:

May 11, 2007 7:14:52 PM (18 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

21103

Message:

Added a bunch of pci register defines and created a couple of the setters/getters that should be created to make that pci config setup easier to read.

Location:

trunk

Files:

• include/VBox/pci.h (modified) (2 diffs)
• src/VBox/Devices/Network/DevPCNet.cpp (modified) (1 diff)

trunk/include/VBox/pci.h

@@ -76 +76 @@
 /** Pointer to a FNPCIIOREGIONMAP() function. */
 typedef FNPCIIOREGIONMAP *PFNPCIIOREGIONMAP;
+
+
+/** @name PCI Configuration Space Registers 
+ * @{ */
+#define VBOX_PCI_VENDOR_ID              0x00    /**< 16-bit RO? */
+#define VBOX_PCI_DEVICE_ID              0x02    /**< 16-bit RO? */
+#define VBOX_PCI_COMMAND                0x04    /**< 16-bit ?? */
+#define VBOX_PCI_STATUS                 0x06    /**< 16-bit ?? */
+#define VBOX_PCI_REVISION_ID            0x08    /**<  8-bit ?? */
+#define VBOX_PCI_CLASS_PROG             0x09    /**<  8-bit ?? */
+#define VBOX_PCI_CLASS_DEVICE           0x0a    /**<  8-bit ?? */
+#define VBOX_PCI_CACHE_LINE_SIZE        0x0c    /**<  8-bit ?? */
+#define VBOX_PCI_LATENCY_TIMER          0x0d    /**<  8-bit ?? */
+#define VBOX_PCI_HEADER_TYPE            0x0e    /**<  8-bit ?? */
+#define VBOX_PCI_BIST                   0x0f    /**<  8-bit ?? */
+#define VBOX_PCI_BASE_ADDRESS_0         0x10    /**< 32-bit RW */
+#define VBOX_PCI_BASE_ADDRESS_1         0x14    /**< 32-bit RW */
+#define VBOX_PCI_BASE_ADDRESS_2         0x18    /**< 32-bit RW */
+#define VBOX_PCI_PRIMARY_BUS            0x18    /**<  8-bit ?? - bridge - primary bus number. */
+#define VBOX_PCI_SECONDARY_BUS          0x19    /**<  8-bit ?? - bridge - secondary bus number. */
+#define VBOX_PCI_SUBORDINATE_BUS        0x1a    /**<  8-bit ?? - bridge - highest subordinate bus number. (behind the bridge) */
+#define VBOX_PCI_SEC_LATENCY_TIMER      0x1b    /**<  8-bit ?? - bridge - secondary latency timer. */
+#define VBOX_PCI_BASE_ADDRESS_3         0x1c    /**< 32-bit RW */
+#define VBOX_PCI_IO_BASE                0x1c    /**<  8-bit ?? - bridge - I/O range base. */
+#define VBOX_PCI_IO_LIMIT               0x1d    /**<  8-bit ?? - bridge - I/O range limit. */
+#define VBOX_PCI_SEC_STATUS             0x1e    /**< 16-bit ?? - bridge - secondary status register. */
+#define VBOX_PCI_BASE_ADDRESS_4         0x20    /**< 32-bit RW */
+#define VBOX_PCI_MEMORY_BASE            0x20    /**< 16-bit ?? - bridge - memory range base. */
+#define VBOX_PCI_MEMORY_LIMIT           0x22    /**< 16-bit ?? - bridge - memory range limit. */
+#define VBOX_PCI_BASE_ADDRESS_5         0x24    /**< 32-bit RW */
+#define VBOX_PCI_PREF_MEMORY_BASE       0x24    /**< 16-bit ?? - bridge - Prefetchable memory range base. */
+#define VBOX_PCI_PREF_MEMORY_LIMIT      0x26    /**< 16-bit ?? - bridge - Prefetchable memory range limit. */
+#define VBOX_PCI_CARDBUS_CIS            0x28    /**< 32-bit ?? */
+#define VBOX_PCI_PREF_BASE_UPPER32      0x28    /**< 32-bit ?? - bridge - Prefetchable memory range high base.*/
+#define VBOX_PCI_PREF_LIMIT_UPPER32     0x2c    /**< 32-bit ?? - bridge - Prefetchable memory range high limit. */
+#define VBOX_PCI_SUBSYSTEM_VENDOR_ID    0x2c    /**< 16-bit ?? */
+#define VBOX_PCI_SUBSYSTEM_ID           0x2e    /**< 16-bit ?? */
+#define VBOX_PCI_ROM_ADDRESS            0x30    /**< 32-bit ?? */
+#define VBOX_PCI_IO_BASE_UPPER16        0x30    /**< 16-bit ?? - bridge - memory range high base. */
+#define VBOX_PCI_IO_LIMIT_UPPER16       0x32    /**< 16-bit ?? - bridge - memory range high limit. */
+#define VBOX_PCI_CAPABILITY_LIST        0x34    /**< 8-bit? ?? */
+#define VBOX_PCI_ROM_ADDRESS_BR         0x38    /**< 32-bit ?? - bridge */
+#define VBOX_PCI_INTERRUPT_LINE         0x3c    /**<  8-bit RW - Interrupt line. */
+#define VBOX_PCI_INTERRUPT_PIN          0x3d    /**<  8-bit RO - Interrupt pin.  */
+#define VBOX_PCI_MIN_GNT                0x3e    /**<  8-bit ?? */
+#define VBOX_PCI_BRIDGE_CONTROL         0x3e    /**< 8-bit? ?? - bridge */
+#define VBOX_PCI_MAX_LAT                0x3f    /**<  8-bit ?? */
+/** @} */
+
 
 /** 
@@ -150 +199 @@
 
 
+/**
+ * Sets the vendor id config register.
+ * @param   pPciDev         The PCI device.
+ * @param   u16VendorId     The vendor id.
+ */
+DECLINLINE(void) PCIDevSetVendorId(PPCIDEVICE pPciDev, uint16_t u16VendorId)
+{
+    u16VendorId = RT_H2LE_U16(u16VendorId);
+    pPciDev->config[VBOX_PCI_VENDOR_ID]     = u16VendorId & 0xff;
+    pPciDev->config[VBOX_PCI_VENDOR_ID + 1] = u16VendorId >> 8;
+}
+
+/**
+ * Sets the vendor id config register.
+ * @param   pPciDev         The PCI device.
+ * @param   u16VendorId     The vendor id.
+ */
+DECLINLINE(void) PCIDevSetDeviceId(PPCIDEVICE pPciDev, uint16_t u16DeviceId)
+{
+    u16DeviceId = RT_H2LE_U16(u16DeviceId);
+    pPciDev->config[VBOX_PCI_DEVICE_ID]     = u16DeviceId & 0xff;
+    pPciDev->config[VBOX_PCI_DEVICE_ID + 1] = u16DeviceId >> 8;
+}
+
+
 /** @} */
 

trunk/src/VBox/Devices/Network/DevPCNet.cpp

@@ -4124 +4124 @@
 
     /* PCI Device */
-    pData->PciDev.config[0x00] = 0x22; /* vendor id */
-    pData->PciDev.config[0x01] = 0x10;
-    pData->PciDev.config[0x02] = 0x00; /* device id */
-    pData->PciDev.config[0x03] = 0x20;
+    PCIDevSetVendorId(&pData->PciDev, 0x1022);
+    PCIDevSetDeviceId(&pData->PciDev, 0x2000);
     pData->PciDev.config[0x04] = 0x07; /* command */
     pData->PciDev.config[0x05] = 0x00;