Changeset 26018 in vbox for trunk/src/VBox/VMM/VMMAll

Timestamp:

Jan 25, 2010 4:06:26 PM (15 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

56903

Message:

Missing pending pgm sync handling in VT-x and AMD-V page fault handling. Cause of win2k3 smp guest instability and possibly many others.
Cleaned up InvalidatePage (removed obsolete code).

File:

• trunk/src/VBox/VMM/VMMAll/PGMAllBth.h (modified) (5 diffs)

trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

@@ -1017 +1017 @@
         AssertMsg(rc == VERR_PAGE_DIRECTORY_PTR_NOT_PRESENT || rc == VERR_PAGE_MAP_LEVEL4_NOT_PRESENT, ("Unexpected rc=%Rrc\n", rc));
         STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_MID_Z(Stat,InvalidatePageSkipped));
-        if (!VMCPU_FF_ISSET(pVCpu, VMCPU_FF_PGM_SYNC_CR3))
-            PGM_INVL_VCPU_TLBS(pVCpu);
         return VINF_SUCCESS;
     }
@@ -1029 +1027 @@
     {
         STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_MID_Z(Stat,InvalidatePageSkipped));
-        if (!VMCPU_FF_ISSET(pVCpu, VMCPU_FF_PGM_SYNC_CR3))
-            PGM_INVL_VCPU_TLBS(pVCpu);
         return VINF_SUCCESS;
     }
@@ -1101 +1097 @@
 # endif /* IN_RING3 */
 
-# if PGM_GST_TYPE == PGM_TYPE_AMD64
-    /* Fetch the pgm pool shadow descriptor. */
-    PPGMPOOLPAGE pShwPdpt = pgmPoolGetPage(pPool, pPml4eDst->u & X86_PML4E_PG_MASK);
-    Assert(pShwPdpt);
-
-    /* Fetch the pgm pool shadow descriptor. */
-    PPGMPOOLPAGE pShwPde = pgmPoolGetPage(pPool, pPdptDst->a[iPdpt].u & SHW_PDPE_PG_MASK);
-    Assert(pShwPde);
-
-    Assert(pPml4eDst->n.u1Present && (pPml4eDst->u & SHW_PDPT_MASK));
-    RTGCPHYS GCPhysPdpt = pPml4eSrc->u & X86_PML4E_PG_MASK;
-
-    if (    !pPml4eSrc->n.u1Present
-        ||  pShwPdpt->GCPhys != GCPhysPdpt)
-    {
-        LogFlow(("InvalidatePage: Out-of-sync PML4E (P/GCPhys) at %RGv GCPhys=%RGp vs %RGp Pml4eSrc=%RX64 Pml4eDst=%RX64\n",
-                 GCPtrPage, pShwPdpt->GCPhys, GCPhysPdpt, (uint64_t)pPml4eSrc->u, (uint64_t)pPml4eDst->u));
-        pgmPoolFreeByPage(pPool, pShwPdpt, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3)->idx, iPml4);
-        ASMAtomicWriteSize(pPml4eDst, 0);
-        STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_MID_Z(Stat,InvalidatePagePDNPs));
-        PGM_INVL_VCPU_TLBS(pVCpu);
-        return VINF_SUCCESS;
-    }
-    if (   pPml4eSrc->n.u1User != pPml4eDst->n.u1User
-        || (!pPml4eSrc->n.u1Write && pPml4eDst->n.u1Write))
-    {
-        /*
-         * Mark not present so we can resync the PML4E when it's used.
-         */
-        LogFlow(("InvalidatePage: Out-of-sync PML4E at %RGv Pml4eSrc=%RX64 Pml4eDst=%RX64\n",
-                 GCPtrPage, (uint64_t)pPml4eSrc->u, (uint64_t)pPml4eDst->u));
-        pgmPoolFreeByPage(pPool, pShwPdpt, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3)->idx, iPml4);
-        ASMAtomicWriteSize(pPml4eDst, 0);
-        STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_MID_Z(Stat,InvalidatePagePDOutOfSync));
-        PGM_INVL_VCPU_TLBS(pVCpu);
-    }
-    else if (!pPml4eSrc->n.u1Accessed)
-    {
-        /*
-         * Mark not present so we can set the accessed bit.
-         */
-        LogFlow(("InvalidatePage: Out-of-sync PML4E (A) at %RGv Pml4eSrc=%RX64 Pml4eDst=%RX64\n",
-                 GCPtrPage, (uint64_t)pPml4eSrc->u, (uint64_t)pPml4eDst->u));
-        pgmPoolFreeByPage(pPool, pShwPdpt, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3)->idx, iPml4);
-        ASMAtomicWriteSize(pPml4eDst, 0);
-        STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_MID_Z(Stat,InvalidatePagePDNAs));
-        PGM_INVL_VCPU_TLBS(pVCpu);
-    }
-
-    /* Check if the PDPT entry has changed. */
-    Assert(pPdpeDst->n.u1Present && pPdpeDst->u & SHW_PDPT_MASK);
-    RTGCPHYS GCPhysPd = PdpeSrc.u & GST_PDPE_PG_MASK;
-    if (    !PdpeSrc.n.u1Present
-        ||  pShwPde->GCPhys != GCPhysPd)
-    {
-        LogFlow(("InvalidatePage: Out-of-sync PDPE (P/GCPhys) at %RGv GCPhys=%RGp vs %RGp PdpeSrc=%RX64 PdpeDst=%RX64\n",
-                    GCPtrPage, pShwPde->GCPhys, GCPhysPd, (uint64_t)PdpeSrc.u, (uint64_t)pPdpeDst->u));
-        pgmPoolFreeByPage(pPool, pShwPde, pShwPdpt->idx, iPdpt);
-        ASMAtomicWriteSize(pPdpeDst, 0);
-        STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_MID_Z(Stat,InvalidatePagePDNPs));
-        PGM_INVL_VCPU_TLBS(pVCpu);
-        return VINF_SUCCESS;
-    }
-    if (   PdpeSrc.lm.u1User != pPdpeDst->lm.u1User
-        || (!PdpeSrc.lm.u1Write && pPdpeDst->lm.u1Write))
-    {
-        /*
-         * Mark not present so we can resync the PDPTE when it's used.
-         */
-        LogFlow(("InvalidatePage: Out-of-sync PDPE at %RGv PdpeSrc=%RX64 PdpeDst=%RX64\n",
-                 GCPtrPage, (uint64_t)PdpeSrc.u, (uint64_t)pPdpeDst->u));
-        pgmPoolFreeByPage(pPool, pShwPde, pShwPdpt->idx, iPdpt);
-        ASMAtomicWriteSize(pPdpeDst, 0);
-        STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_MID_Z(Stat,InvalidatePagePDOutOfSync));
-        PGM_INVL_VCPU_TLBS(pVCpu);
-    }
-    else if (!PdpeSrc.lm.u1Accessed)
-    {
-        /*
-         * Mark not present so we can set the accessed bit.
-         */
-        LogFlow(("InvalidatePage: Out-of-sync PDPE (A) at %RGv PdpeSrc=%RX64 PdpeDst=%RX64\n",
-                 GCPtrPage, (uint64_t)PdpeSrc.u, (uint64_t)pPdpeDst->u));
-        pgmPoolFreeByPage(pPool, pShwPde, pShwPdpt->idx, iPdpt);
-        ASMAtomicWriteSize(pPdpeDst, 0);
-        STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_MID_Z(Stat,InvalidatePagePDNAs));
-        PGM_INVL_VCPU_TLBS(pVCpu);
-    }
-# endif /* PGM_GST_TYPE == PGM_TYPE_AMD64 */
-
     /*
      * Deal with the Guest PDE.
@@ -1197 +1103 @@
     if (PdeSrc.n.u1Present)
     {
+        Assert(     PdeSrc.n.u1User == PdeDst.n.u1User
+               &&   (PdeSrc.n.u1Write || !PdeDst.n.u1Write));
 # ifndef PGM_WITHOUT_MAPPING
         if (PdeDst.u & PGM_PDFLAGS_MAPPING)
@@ -1211 +1119 @@
         else
 # endif /* !PGM_WITHOUT_MAPPING */
-        if (   PdeSrc.n.u1User != PdeDst.n.u1User
-            || (!PdeSrc.n.u1Write && PdeDst.n.u1Write))
-        {
-            /*
-             * Mark not present so we can resync the PDE when it's used.
-             */
-            LogFlow(("InvalidatePage: Out-of-sync at %RGp PdeSrc=%RX64 PdeDst=%RX64\n",
-                     GCPtrPage, (uint64_t)PdeSrc.u, (uint64_t)PdeDst.u));
-            pgmPoolFree(pVM, PdeDst.u & SHW_PDE_PG_MASK, pShwPde->idx, iPDDst);
-            ASMAtomicWriteSize(pPdeDst, 0);
-            STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_MID_Z(Stat,InvalidatePagePDOutOfSync));
-            PGM_INVL_VCPU_TLBS(pVCpu);
-        }
-        else if (!PdeSrc.n.u1Accessed)
-        {
-            /*
-             * Mark not present so we can set the accessed bit.
-             */
-            LogFlow(("InvalidatePage: Out-of-sync (A) at %RGp PdeSrc=%RX64 PdeDst=%RX64\n",
-                     GCPtrPage, (uint64_t)PdeSrc.u, (uint64_t)PdeDst.u));
-            pgmPoolFree(pVM, PdeDst.u & SHW_PDE_PG_MASK, pShwPde->idx, iPDDst);
-            ASMAtomicWriteSize(pPdeDst, 0);
-            STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_MID_Z(Stat,InvalidatePagePDNAs));
-            PGM_INVL_VCPU_TLBS(pVCpu);
-        }
-        else if (!fIsBigPage)
+        if (!fIsBigPage)
         {
             /*