VirtualBox

Changeset 26169 in vbox for trunk/src/VBox/Devices


Ignore:
Timestamp:
Feb 2, 2010 8:19:15 PM (15 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
57183
Message:

PDM: s/pDevHlp\(|R0|R3|RC\)/pHlp\1/g - PDMDEVINS.

Location:
trunk/src/VBox/Devices
Files:
9 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/Bus/DevPCI.cpp

    r26165 r26169  
    307307                        devclass = d->config[0x0a] | (d->config[0x0b] << 8);
    308308                        if (devclass == 0x0101 && r->size == 4) {
    309                             int rc = d->pDevIns->pDevHlpR3->pfnIOPortDeregister(d->pDevIns, r->addr + 2, 1);
     309                            int rc = PDMDevHlpIOPortDeregister(d->pDevIns, r->addr + 2, 1);
    310310                            AssertRC(rc);
    311311                        } else {
    312                             int rc = d->pDevIns->pDevHlpR3->pfnIOPortDeregister(d->pDevIns, r->addr, r->size);
     312                            int rc = PDMDevHlpIOPortDeregister(d->pDevIns, r->addr, r->size);
    313313                            AssertRC(rc);
    314314                        }
     
    324324                        }
    325325                        else
    326                             rc = d->pDevIns->pDevHlpR3->pfnMMIODeregister(d->pDevIns, GCPhysBase, r->size);
     326                            rc = PDMDevHlpMMIODeregister(d->pDevIns, GCPhysBase, r->size);
    327327                        AssertMsgRC(rc, ("rc=%Rrc d=%s i=%d GCPhysBase=%RGp size=%#x\n", rc, d->name, i, GCPhysBase, r->size));
    328328                    }
     
    20432043    PciBusReg.pszSetIrqRC             = fGCEnabled ? "pciSetIrq" : NULL;
    20442044    PciBusReg.pszSetIrqR0             = fR0Enabled ? "pciSetIrq" : NULL;
    2045     rc = pDevIns->pDevHlpR3->pfnPCIBusRegister(pDevIns, &PciBusReg, &pBus->pPciHlpR3);
     2045    rc = PDMDevHlpPCIBusRegister(pDevIns, &PciBusReg, &pBus->pPciHlpR3);
    20462046    if (RT_FAILURE(rc))
    20472047        return PDMDEV_SET_ERROR(pDevIns, rc,
     
    24142414    PciBusReg.pszSetIrqRC             = fGCEnabled ? "pcibridgeSetIrq" : NULL;
    24152415    PciBusReg.pszSetIrqR0             = fR0Enabled ? "pcibridgeSetIrq" : NULL;
    2416     rc = pDevIns->pDevHlpR3->pfnPCIBusRegister(pDevIns, &PciBusReg, &pBus->pPciHlpR3);
     2416    rc = PDMDevHlpPCIBusRegister(pDevIns, &PciBusReg, &pBus->pPciHlpR3);
    24172417    if (RT_FAILURE(rc))
    24182418        return PDMDEV_SET_ERROR(pDevIns, rc,
  • trunk/src/VBox/Devices/Input/DevPS2.cpp

    r26165 r26169  
    16461646    if (fR0Enabled)
    16471647    {
    1648         rc = pDevIns->pDevHlpR3->pfnIOPortRegisterR0(pDevIns, 0x60, 1, 0, "kbdIOPortDataWrite",    "kbdIOPortDataRead", NULL, NULL,   "PC Keyboard - Data");
     1648        rc = PDMDevHlpIOPortRegisterR0(pDevIns, 0x60, 1, 0, "kbdIOPortDataWrite",    "kbdIOPortDataRead", NULL, NULL,   "PC Keyboard - Data");
    16491649        if (RT_FAILURE(rc))
    16501650            return rc;
    1651         rc = pDevIns->pDevHlpR3->pfnIOPortRegisterR0(pDevIns, 0x64, 1, 0, "kbdIOPortCommandWrite", "kbdIOPortStatusRead", NULL, NULL, "PC Keyboard - Command / Status");
     1651        rc = PDMDevHlpIOPortRegisterR0(pDevIns, 0x64, 1, 0, "kbdIOPortCommandWrite", "kbdIOPortStatusRead", NULL, NULL, "PC Keyboard - Command / Status");
    16521652        if (RT_FAILURE(rc))
    16531653            return rc;
  • trunk/src/VBox/Devices/PC/DevAPIC.cpp

    r26165 r26169  
    24082408#else
    24092409                RTGCPTR pDevInsGC = PDMINS2DATA_GCPTR(pDevIns);
    2410                 pDevIns->pDevHlpR0->pfnPATMSetMMIOPatchInfo(pDevIns, GCPhysAddr, pDevIns + RT_OFFSETOF(APICState, tpr));
     2410                pDevIns->pHlpR0->pfnPATMSetMMIOPatchInfo(pDevIns, GCPhysAddr, pDevIns + RT_OFFSETOF(APICState, tpr));
    24112411#endif
    24122412                return VINF_PATM_HC_MMIO_PATCH_READ;
     
    28772877    }
    28782878
    2879     Assert(pDevIns->pDevHlpR3->pfnAPICRegister);
    2880     rc = pDevIns->pDevHlpR3->pfnAPICRegister(pDevIns, &ApicReg, &pThis->pApicHlpR3);
     2879    rc = PDMDevHlpAPICRegister(pDevIns, &ApicReg, &pThis->pApicHlpR3);
    28812880    AssertLogRelRCReturn(rc, rc);
    28822881    pThis->pCritSectR3 = pThis->pApicHlpR3->pfnGetR3CritSect(pDevIns);
     
    32513250    IoApicReg.pszSetIrqRC = fGCEnabled ? "ioapicSetIrq" : NULL;
    32523251    IoApicReg.pszSetIrqR0 = fR0Enabled ? "ioapicSetIrq" : NULL;
    3253     rc = pDevIns->pDevHlpR3->pfnIOAPICRegister(pDevIns, &IoApicReg, &s->pIoApicHlpR3);
     3252    rc = PDMDevHlpIOAPICRegister(pDevIns, &IoApicReg, &s->pIoApicHlpR3);
    32543253    if (RT_FAILURE(rc))
    32553254    {
  • trunk/src/VBox/Devices/PC/DevDMA.cpp

    r26165 r26169  
    914914    reg.pfnGetChannelMode = get_mode_wrapper;
    915915
    916     Assert(pDevIns->pDevHlpR3->pfnDMARegister);
    917     rc = pDevIns->pDevHlpR3->pfnDMACRegister (pDevIns, &reg, &s->pHlp);
     916    rc = PDMDevHlpDMACRegister (pDevIns, &reg, &s->pHlp);
    918917    if (RT_FAILURE (rc)) {
    919918        return rc;
  • trunk/src/VBox/Devices/PC/DevPIC.cpp

    r26165 r26169  
    971971    }
    972972
    973     Assert(pDevIns->pDevHlpR3->pfnPICRegister);
    974     rc = pDevIns->pDevHlpR3->pfnPICRegister(pDevIns, &PicReg, &pThis->pPicHlpR3);
     973    rc = PDMDevHlpPICRegister(pDevIns, &PicReg, &pThis->pPicHlpR3);
    975974    AssertLogRelMsgRCReturn(rc, ("PICRegister -> %Rrc\n", rc), rc);
    976975    if (fGCEnabled)
  • trunk/src/VBox/Devices/PC/DevPcArch.c

    r26165 r26169  
    100100                    rc = PDMDeviceDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d u32=%#x\n", Port, cb, u32);
    101101#endif
    102                 /* pDevIns->pDevHlp->pfnPICSetIrq(pDevIns, 13, 0); */
     102                /* pDevIns->pHlp->pfnPICSetIrq(pDevIns, 13, 0); */
    103103                break;
    104104
     
    107107                Log2(("PCARCH: FPU Reset cb=%d u32=%#x\n", Port, cb, u32));
    108108                /** @todo figure out what the difference between FPU ports 0xf0 and 0xf1 are... */
    109                 /* pDevIns->pDevHlp->pfnPICSetIrq(pDevIns, 13, 0); */
     109                /* pDevIns->pHlp->pfnPICSetIrq(pDevIns, 13, 0); */
    110110                break;
    111111
  • trunk/src/VBox/Devices/PC/DevRTC.cpp

    r26165 r26169  
    972972     * Register ourselves as the RTC/CMOS with PDM.
    973973     */
    974     rc = pDevIns->pDevHlpR3->pfnRTCRegister(pDevIns, &pThis->RtcReg, &pThis->pRtcHlpR3);
     974    rc = PDMDevHlpRTCRegister(pDevIns, &pThis->RtcReg, &pThis->pRtcHlpR3);
    975975    if (RT_FAILURE(rc))
    976976        return rc;
  • trunk/src/VBox/Devices/Samples/VBoxSampleDevice.cpp

    r26165 r26169  
    5858     */
    5959    AssertMsgReturn(pDevIns->u32Version            == PDM_DEVINS_VERSION, ("%#x, expected %#x\n", pDevIns->u32Version,            PDM_DEVINS_VERSION), VERR_VERSION_MISMATCH);
    60     AssertMsgReturn(pDevIns->pDevHlpR3->u32Version == PDM_DEVHLPR3_VERSION, ("%#x, expected %#x\n", pDevIns->pDevHlpR3->u32Version, PDM_DEVHLPR3_VERSION), VERR_VERSION_MISMATCH);
     60    AssertMsgReturn(pDevIns->pHlpR3->u32Version == PDM_DEVHLPR3_VERSION, ("%#x, expected %#x\n", pDevIns->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), VERR_VERSION_MISMATCH);
    6161
    6262    return VINF_SUCCESS;
     
    7070     */
    7171    AssertLogRelMsgReturn(pDevIns->u32Version            == PDM_DEVINS_VERSION, ("%#x, expected %#x\n", pDevIns->u32Version,            PDM_DEVINS_VERSION), VERR_VERSION_MISMATCH);
    72     AssertLogRelMsgReturn(pDevIns->pDevHlpR3->u32Version == PDM_DEVHLPR3_VERSION, ("%#x, expected %#x\n", pDevIns->pDevHlpR3->u32Version, PDM_DEVHLPR3_VERSION), VERR_VERSION_MISMATCH);
     72    AssertLogRelMsgReturn(pDevIns->pHlpR3->u32Version == PDM_DEVHLPR3_VERSION, ("%#x, expected %#x\n", pDevIns->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), VERR_VERSION_MISMATCH);
    7373
    7474    /*
  • trunk/src/VBox/Devices/testcase/tstDeviceStructSizeRC.cpp

    r26160 r26169  
    111111    GEN_CHECK_OFF(PDMDEVINS, iInstance);
    112112    GEN_CHECK_OFF(PDMDEVINS, IBase);
    113     GEN_CHECK_OFF(PDMDEVINS, pDevHlpR3);
    114     GEN_CHECK_OFF(PDMDEVINS, pDevHlpR0);
    115     GEN_CHECK_OFF(PDMDEVINS, pDevHlpRC);
     113    GEN_CHECK_OFF(PDMDEVINS, pHlpR3);
     114    GEN_CHECK_OFF(PDMDEVINS, pHlpR0);
     115    GEN_CHECK_OFF(PDMDEVINS, pHlpRC);
    116116    GEN_CHECK_OFF(PDMDEVINS, pvInstanceDataR3);
    117117    GEN_CHECK_OFF(PDMDEVINS, pvInstanceDataR0);
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