Changeset 26183 in vbox for trunk/src/VBox/Devices/PC

Timestamp:

Feb 3, 2010 12:46:34 PM (15 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

57202

Message:

Commit CPU hotplug patches again

Location:

trunk/src/VBox/Devices/PC

Files:

• ACPI/VBoxAcpi.cpp (modified) (6 diffs)
• DevACPI.cpp (modified) (8 diffs)
• vbox-standard.dsl (modified) (1 diff)
• vbox.dsl (modified) (2 diffs)

trunk/src/VBox/Devices/PC/ACPI/VBoxAcpi.cpp

@@ -42 +42 @@
 /* Statically compiled AML */
 # include <vboxaml.hex>
+# include <vboxssdt-standard.hex>
+# include <vboxssdt-cpuhotplug.hex>
 #endif
 
@@ -178 +180 @@
                      */
                     if (   RT_FAILURE(rc)
-                        || strncmp((const char *)pbAmlCode, "DSDT", 4))
+                        || strncmp((const char *)pbAmlCode, pcszSignature, 4))
                     {
                         RTMemFree(pbAmlCode);
@@ -186 +188 @@
                         if (RT_SUCCESS(rc))
                             rc = VERR_PARSE_ERROR;
+                    }
+                    else
+                    {
+                        *ppbAmlCode = pbAmlCode;
+                        *pcbAmlCode = cbAmlCode;
+                        rc = VINF_SUCCESS;
                     }
                 }
@@ -196 +204 @@
         MMR3HeapFree(pszAmlFilePath);
     }
-    else if (rc == VERR_CFGM_VALUE_NOT_FOUND)
+
+    return rc;
+}
+
+/* Two only public functions */
+int acpiPrepareDsdt(PPDMDEVINS pDevIns,  void * *ppPtr, size_t *puDsdtLen)
+{
+#ifdef VBOX_WITH_DYNAMIC_DSDT
+    return prepareDynamicDsdt(pDevIns, ppPtr, puDsdtLen);
+#else
+    uint8_t *pbAmlCodeDsdt = NULL;
+    size_t cbAmlCodeDsdt = 0;
+    int rc = acpiAmlLoadExternal(pDevIns, "DsdtFilePath", "DSDT", &pbAmlCodeDsdt, &cbAmlCodeDsdt);
+
+    if (rc == VERR_CFGM_VALUE_NOT_FOUND)
     {
         rc = VINF_SUCCESS;
 
         /* Use the compiled in AML code */
-        cbAmlCode = sizeof(AmlCode);
-        pbAmlCode = (uint8_t *)RTMemAllocZ(cbAmlCode);
-        if (pbAmlCode)
-            memcpy(pbAmlCode, AmlCode, cbAmlCode);
+        cbAmlCodeDsdt = sizeof(AmlCode);
+        pbAmlCodeDsdt = (uint8_t *)RTMemAllocZ(cbAmlCodeDsdt);
+        if (pbAmlCodeDsdt)
+            memcpy(pbAmlCodeDsdt, AmlCode, cbAmlCodeDsdt);
         else
             rc = VERR_NO_MEMORY;
@@ -210 +232 @@
     else if (RT_FAILURE(rc))
         return PDMDEV_SET_ERROR(pDevIns, rc,
-                                N_("Configuration error: Failed to read \"AmlFilePath\""));
+                                N_("Configuration error: Failed to read \"DsdtFilePath\""));
 
     if (RT_SUCCESS(rc))
     {
-        patchAml(pDevIns, pbAmlCode, cbAmlCode);
-        *ppPtr = pbAmlCode;
-        *puDsdtLen = cbAmlCode;
+        patchAml(pDevIns, pbAmlCodeDsdt, cbAmlCodeDsdt);
+        *ppPtr = pbAmlCodeDsdt;
+        *puDsdtLen = cbAmlCodeDsdt;
     }
     return rc;
@@ -233 +255 @@
 }
 
+int acpiPrepareSsdt(PPDMDEVINS pDevIns, void* *ppPtr, size_t *puSsdtLen)
+{
+    uint8_t *pbAmlCodeSsdt = NULL;
+    size_t   cbAmlCodeSsdt = 0;
+    int rc = acpiAmlLoadExternal(pDevIns, "SsdtFilePath", "SSDT", &pbAmlCodeSsdt, &cbAmlCodeSsdt);
+
+    if (rc == VERR_CFGM_VALUE_NOT_FOUND)
+    {
+        bool fCpuHotPlug = false;
+        uint8_t *pbAmlCode = NULL;
+        rc = CFGMR3QueryBoolDef(pDevIns->pCfgHandle, "CpuHotPlug", &fCpuHotPlug, false);
+
+        if (RT_FAILURE(rc))
+            return rc;
+
+        if (fCpuHotPlug)
+        {
+            pbAmlCode     = AmlCodeSsdtCpuHotPlug;
+            cbAmlCodeSsdt = sizeof(AmlCodeSsdtCpuHotPlug);
+        }
+        else
+        {
+            pbAmlCode     = AmlCodeSsdtStandard;
+            cbAmlCodeSsdt = sizeof(AmlCodeSsdtStandard);
+        }
+
+        pbAmlCodeSsdt = (uint8_t *)RTMemAllocZ(cbAmlCodeSsdt);
+        if (pbAmlCodeSsdt)
+            memcpy(pbAmlCodeSsdt, pbAmlCode, cbAmlCodeSsdt);
+        else
+            rc = VERR_NO_MEMORY;
+    }
+    else if (RT_FAILURE(rc))
+        return PDMDEV_SET_ERROR(pDevIns, rc,
+                                N_("Configuration error: Failed to read \"SsdtFilePath\""));
+
+    if (RT_SUCCESS(rc))
+    {
+        patchAml(pDevIns, pbAmlCodeSsdt, cbAmlCodeSsdt);
+        *ppPtr = pbAmlCodeSsdt;
+        *puSsdtLen = cbAmlCodeSsdt;
+    }
+
+    return VINF_SUCCESS;
+}
+
+int acpiCleanupSsdt(PPDMDEVINS pDevIns, void* pPtr)
+{
+    if (pPtr)
+        RTMemFree(pPtr);
+    return VINF_SUCCESS;
+}
+

trunk/src/VBox/Devices/PC/DevACPI.cpp

@@ -45 +45 @@
 int acpiPrepareDsdt(PPDMDEVINS pDevIns, void* *ppPtr, size_t *puDsdtLen);
 int acpiCleanupDsdt(PPDMDEVINS pDevIns, void* pPtr);
+
+int acpiPrepareSsdt(PPDMDEVINS pDevIns, void* *ppPtr, size_t *puSsdtLen);
+int acpiCleanupSsdt(PPDMDEVINS pDevIns, void* pPtr);
 #endif /* !IN_RING3 */
 
@@ -682 +685 @@
 }
 
+/** Secondary System Description Table (SSDT) */
+
+static void acpiSetupSSDT(ACPIState *s, RTGCPHYS32 addr,
+                            void* pPtr, size_t uSsdtLen)
+{
+    acpiPhyscpy(s, addr, pPtr, uSsdtLen);
+}
+
 /** Firmware ACPI Control Structure (FACS) */
 static void acpiSetupFACS(ACPIState *s, RTGCPHYS32 addr)
@@ -1940 +1951 @@
     int        rc;
     RTGCPHYS32 GCPhysCur, GCPhysRsdt, GCPhysXsdt, GCPhysFadtAcpi1, GCPhysFadtAcpi2, GCPhysFacs, GCPhysDsdt;
-    RTGCPHYS32 GCPhysHpet = 0, GCPhysApic = 0;
+    RTGCPHYS32 GCPhysHpet = 0, GCPhysApic = 0, GCPhysSsdt = 0;
     uint32_t   addend = 0;
     RTGCPHYS32 aGCPhysRsdt[4];
     RTGCPHYS32 aGCPhysXsdt[4];
-    uint32_t   cAddr, iMadt = 0, iHpet = 0;
+    uint32_t   cAddr, iMadt = 0, iHpet = 0, iSsdt = 0;
     size_t     cbRsdt = sizeof(ACPITBLHEADER);
     size_t     cbXsdt = sizeof(ACPITBLHEADER);
@@ -1954 +1965 @@
     if (s->fUseHpet)
         iHpet = cAddr++;        /* HPET */
+
+    iSsdt = cAddr++;            /* SSDT */
 
     cbRsdt += cAddr*sizeof(uint32_t);  /* each entry: 32 bits phys. address. */
@@ -2009 +2022 @@
         GCPhysCur = RT_ALIGN_32(GCPhysCur + sizeof(ACPITBLHPET), 16);
     }
+
+    void*  pSsdtCode = NULL;
+    size_t cbSsdtSize = 0;
+    rc = acpiPrepareSsdt(s->pDevIns, &pSsdtCode, &cbSsdtSize);
+    if (RT_FAILURE(rc))
+        return rc;
+
+    GCPhysSsdt = GCPhysCur;
+    GCPhysCur = RT_ALIGN_32(GCPhysCur + cbSsdtSize, 16);
+
     GCPhysDsdt = GCPhysCur;
 
@@ -2018 +2041 @@
 
     GCPhysCur = RT_ALIGN_32(GCPhysCur + cbDsdtSize, 16);
+
     if (GCPhysCur > 0x10000)
         return PDMDEV_SET_ERROR(s->pDevIns, VERR_TOO_MUCH_DATA,
@@ -2031 +2055 @@
     if (s->fUseHpet)
         Log((" HPET 0x%08X", GCPhysHpet + addend));
+    Log((" SSDT 0x%08X", GCPhysSsdt + addend));
     Log(("\n"));
 
@@ -2053 +2078 @@
         aGCPhysXsdt[iHpet] = GCPhysHpet + addend;
     }
+    acpiSetupSSDT(s, GCPhysSsdt + addend, pSsdtCode, cbSsdtSize);
+    acpiCleanupSsdt(s->pDevIns, pSsdtCode);
+    aGCPhysRsdt[iSsdt] = GCPhysSsdt + addend;
+    aGCPhysXsdt[iSsdt] = GCPhysSsdt + addend;
 
     rc = acpiSetupRSDT(s, GCPhysRsdt + addend, cAddr, aGCPhysRsdt);

trunk/src/VBox/Devices/PC/vbox-standard.dsl

@@ -263 +263 @@
  * End:
  */
+// $Id$
+/// @file
+//
+// VirtualBox ACPI
+//
+// Copyright (C) 2006-2007 Sun Microsystems, Inc.
+//
+// This file is part of VirtualBox Open Source Edition (OSE), as
+// available from http://www.virtualbox.org. This file is free software;
+// you can redistribute it and/or modify it under the terms of the GNU
+// General Public License (GPL) as published by the Free Software
+// Foundation, in version 2 as it comes in the "COPYING" file of the
+// VirtualBox OSE distribution. VirtualBox OSE is distributed in the
+// hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
+//
+// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
+// Clara, CA 95054 USA or visit http://www.sun.com if you need
+// additional information or have any questions.
+
+DefinitionBlock ("SSDT.aml", "SSDT", 1, "VBOX  ", "VBOXCPUT", 2)
+{
+    // Processor object
+    // #1463: Showing the CPU can make the guest do bad things on it like SpeedStep.
+    // In this case, XP SP2 contains this buggy Intelppm.sys driver which wants to mess
+    // with SpeedStep if it finds a CPU object and when it finds out that it can't, it
+    // tries to unload and crashes (MS probably never tested this code path).
+    // So we enable this ACPI object only for certain guests, which do need it,
+    // if by accident Windows guest seen enabled CPU object, just boot from latest
+    // known good configuration, as it remembers state, even if ACPI object gets disabled.
+    Scope (\_PR)
+    {
+        Processor (CPU0, /* Name */
+                    0x00, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+
+        Processor (CPU1, /* Name */
+                    0x01, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPU2, /* Name */
+                    0x02, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPU3, /* Name */
+                    0x03, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPU4, /* Name */
+                    0x04, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPU5, /* Name */
+                    0x05, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPU6, /* Name */
+                    0x06, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPU7, /* Name */
+                    0x07, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPU8, /* Name */
+                    0x08, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPU9, /* Name */
+                    0x09, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUA, /* Name */
+                    0x0a, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUB, /* Name */
+                    0x0b, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUC, /* Name */
+                    0x0c, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUD, /* Name */
+                    0x0d, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUE, /* Name */
+                    0x0e, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUF, /* Name */
+                    0x0f, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUG, /* Name */
+                    0x10, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUH, /* Name */
+                    0x11, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUI, /* Name */
+                    0x12, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUJ, /* Name */
+                    0x13, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUK, /* Name */
+                    0x14, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUL, /* Name */
+                    0x15, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUM, /* Name */
+                    0x16, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUN, /* Name */
+                    0x17, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUO, /* Name */
+                    0x18, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUP, /* Name */
+                    0x19, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUQ, /* Name */
+                    0x1a, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUR, /* Name */
+                    0x1b, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUS, /* Name */
+                    0x1c, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUT, /* Name */
+                    0x1d, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUU, /* Name */
+                    0x1e, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+        Processor (CPUV, /* Name */
+                    0x1f, /* Id */
+                    0x0,  /* Processor IO ports range start */
+                    0x0   /* Processor IO ports range length */
+                    )
+        {
+        }
+    }
+}
+
+/*
+ * Local Variables:
+ * comment-start: "//"
+ * End:
+ */

trunk/src/VBox/Devices/PC/vbox.dsl

@@ -121 +121 @@
     }
 
-    // Processor object
-    // #1463: Showing the CPU can make the guest do bad things on it like SpeedStep.
-    // In this case, XP SP2 contains this buggy Intelppm.sys driver which wants to mess
-    // with SpeedStep if it finds a CPU object and when it finds out that it can't, it
-    // tries to unload and crashes (MS probably never tested this code path).
-    // So we enable this ACPI object only for certain guests, which do need it,
-    // if by accident Windows guest seen enabled CPU object, just boot from latest
-    // known good configuration, as it remembers state, even if ACPI object gets disabled.
-    Scope (\_PR)
-    {
-        Processor (CPU0, /* Name */
-                   0x00, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPU1, /* Name */
-                   0x01, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPU2, /* Name */
-                   0x02, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPU3, /* Name */
-                   0x03, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPU4, /* Name */
-                   0x04, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPU5, /* Name */
-                   0x05, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPU6, /* Name */
-                   0x06, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPU7, /* Name */
-                   0x07, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPU8, /* Name */
-                   0x08, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPU9, /* Name */
-                   0x09, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUA, /* Name */
-                   0x0a, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUB, /* Name */
-                   0x0b, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUC, /* Name */
-                   0x0c, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUD, /* Name */
-                   0x0d, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUE, /* Name */
-                   0x0e, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUF, /* Name */
-                   0x0f, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUG, /* Name */
-                   0x10, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUH, /* Name */
-                   0x11, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUI, /* Name */
-                   0x12, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUJ, /* Name */
-                   0x13, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUK, /* Name */
-                   0x14, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUL, /* Name */
-                   0x15, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUM, /* Name */
-                   0x16, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUN, /* Name */
-                   0x17, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUO, /* Name */
-                   0x18, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUP, /* Name */
-                   0x19, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUQ, /* Name */
-                   0x1a, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUR, /* Name */
-                   0x1b, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUS, /* Name */
-                   0x1c, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUT, /* Name */
-                   0x1d, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUU, /* Name */
-                   0x1e, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        Processor (CPUV, /* Name */
-                   0x1f, /* Id */
-                   0x0,  /* Processor IO ports range start */
-                   0x0   /* Processor IO ports range length */
-                   )
-        {
-        }
-        
-    }
-
     Scope (\_SB)
     {
@@ -376 +139 @@
             // @todo: maybe make it bitmask instead?
             UCP0,  32,
-            UCP1,  32, 
-            UCP2,  32, 
-            UCP3,  32, 
+            UCP1,  32,
+            UCP2,  32,
+            UCP3,  32,
             MEMH,  32,
             URTC,  32,
+            CPUL,  32,
+            CPUC,  32,
             Offset (0x80),
             ININ, 32,