Changeset 2651 in vbox
- Timestamp:
- May 15, 2007 8:21:06 PM (18 years ago)
- Location:
- trunk/src/VBox
- Files:
-
- 4 edited
-
Devices/PC/BIOS/rombios.c (modified) (3 diffs)
-
Devices/PC/DevPcBios.cpp (modified) (11 diffs)
-
Devices/PC/DevPcBios.h (modified) (1 diff)
-
Main/ConsoleImpl.cpp (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/PC/BIOS/rombios.c
r2557 r2651 768 768 769 769 } ebda_data_t; 770 771 #ifdef VBOX 772 // the last 16 bytes of the EBDA segment are used for the MPS floating 773 // pointer structure (only if an IOAPIC is present) 774 #endif 770 775 771 776 #define EbdaData ((ebda_data_t *) 0) … … 10383 10388 rep 10384 10389 stosw 10385 ;; zero out remaining base memory 10390 ;; zero out remaining base memory except the last 16 bytes of the EBDA 10391 ;; because we store the MP table there 10386 10392 xor eax, eax 10387 10393 xor bx, bx 10388 10394 memory_zero_loop: 10389 10395 add bx, #0x1000 10390 cmp bx, #0x a00010396 cmp bx, #0x9000 10391 10397 jae memory_cleared 10392 10398 mov es, bx … … 10397 10403 jmp memory_zero_loop 10398 10404 memory_cleared: 10405 mov es, bx 10406 xor di, di 10407 mov cx, #0x3f00 10408 rep 10409 stosd 10399 10410 xor bx, bx 10400 10411 #endif -
trunk/src/VBox/Devices/PC/DevPcBios.cpp
r2543 r2651 95 95 /** The boot countdown (in seconds). */ 96 96 uint8_t uBootDelay; 97 /** I/O-APIC enabled? */ 98 uint8_t u8IOAPIC; 97 99 } DEVPCBIOS, *PDEVPCBIOS; 98 100 … … 135 137 #pragma pack(1) 136 138 139 /** DMI header */ 137 140 typedef struct DMIHDR 138 141 { … … 141 144 uint16_t u16Handle; 142 145 } *PDMIHDR; 143 146 AssertCompileSize(DMIHDR, 4); 147 148 /** DMI BIOS information */ 144 149 typedef struct DMIBIOSINF 145 150 { … … 154 159 uint8_t u8CharacteristicsByte2; 155 160 } *PDMIBIOSINF; 156 161 AssertCompileSize(DMIBIOSINF, 0x14); 162 163 /** DMI system information */ 157 164 typedef struct DMISYSTEMINF 158 165 { … … 167 174 uint8_t u8Family; 168 175 } *PDMISYSTEMINF; 176 AssertCompileSize(DMISYSTEMINF, 0x1b); 177 178 /** MPS floating pointer structure */ 179 typedef struct MPSFLOATPTR 180 { 181 uint8_t au8Signature[4]; 182 uint32_t u32MPSAddr; 183 uint8_t u8Length; 184 uint8_t u8SpecRev; 185 uint8_t u8Checksum; 186 uint8_t au8Feature[5]; 187 } *PMPSFLOATPTR; 188 AssertCompileSize(MPSFLOATPTR, 16); 189 190 /** MPS config table header */ 191 typedef struct MPSCFGTBLHEADER 192 { 193 uint8_t au8Signature[4]; 194 uint16_t u16Length; 195 uint8_t u8SpecRev; 196 uint8_t u8Checksum; 197 uint8_t au8OemId[8]; 198 uint8_t au8ProductId[12]; 199 uint32_t u32OemTablePtr; 200 uint16_t u16OemTableSize; 201 uint16_t u16EntryCount; 202 uint32_t u32AddrLocalApic; 203 uint16_t u16ExtTableLength; 204 uint8_t u8ExtTableChecksxum; 205 uint8_t u8Reserved; 206 } *PMPSCFGTBLHEADER; 207 AssertCompileSize(MPSCFGTBLHEADER, 0x2c); 208 209 /** MPS processor entry */ 210 typedef struct MPSPROCENTRY 211 { 212 uint8_t u8EntryType; 213 uint8_t u8LocalApicId; 214 uint8_t u8LocalApicVersion; 215 uint8_t u8CPUFlags; 216 uint32_t u32CPUSignature; 217 uint32_t u32CPUFeatureFlags; 218 uint32_t u32Reserved[2]; 219 } *PMPSPROCENTRY; 220 AssertCompileSize(MPSPROCENTRY, 20); 221 222 /** MPS bus entry */ 223 typedef struct MPSBUSENTRY 224 { 225 uint8_t u8EntryType; 226 uint8_t u8BusId; 227 uint8_t au8BusTypeStr[6]; 228 } *PMPSBUSENTRY; 229 AssertCompileSize(MPSBUSENTRY, 8); 230 231 /** MPS I/O-APIC entry */ 232 typedef struct MPSIOAPICENTRY 233 { 234 uint8_t u8EntryType; 235 uint8_t u8Id; 236 uint8_t u8Version; 237 uint8_t u8Flags; 238 uint32_t u32Addr; 239 } *PMPSIOAPICENTRY; 240 AssertCompileSize(MPSIOAPICENTRY, 8); 241 242 /** MPS I/O-Interrupt entry */ 243 typedef struct MPSIOINTERRUPTENTRY 244 { 245 uint8_t u8EntryType; 246 uint8_t u8Type; 247 uint16_t u16Flags; 248 uint8_t u8SrcBusId; 249 uint8_t u8SrcBusIrq; 250 uint8_t u8DstIOAPICId; 251 uint8_t u8DstIOAPICInt; 252 } *PMPSIOIRQENTRY; 253 AssertCompileSize(MPSIOINTERRUPTENTRY, 8); 169 254 170 255 #pragma pack() … … 647 732 } 648 733 649 650 /** 651 * Reset notification. 652 * 653 * @returns VBox status. 654 * @param pDevIns The device instance data. 655 */ 656 static DECLCALLBACK(void) pcbiosReset(PPDMDEVINS pDevIns) 657 { 658 PDEVPCBIOS pData = PDMINS2DATA(pDevIns, PDEVPCBIOS); 659 LogFlow(("pcbiosReset:\n")); 660 661 pData->u8LogoBank = 0; 662 /** @todo Should we perhaps do pcbiosInitComplete() on reset? */ 663 664 #if 1 665 /* 666 * Paranoia: Check that the BIOS ROM hasn't changed. 667 */ 668 PVM pVM = PDMDevHlpGetVM(pDevIns); 669 /* the low ROM mapping. */ 670 unsigned cb = RT_MIN(g_cbPcBiosBinary, 128 * _1K); 671 const uint8_t *pb1 = (uint8_t *)MMPhysGCPhys2HCVirt(pVM, 0x00100000 - cb, cb); 672 AssertRelease(pb1); 673 const uint8_t *pb2 = &g_abPcBiosBinary[g_cbPcBiosBinary - cb]; 674 if (memcmp(pb1, pb2, cb)) 675 { 676 AssertMsg2("low ROM mismatch! cb=%#x\n", cb); 677 for (unsigned off = 0; off < cb; off++) 678 if (pb1[off] != pb2[off]) 679 AssertMsg2("%05x: %02x expected %02x\n", off, pb1[off], pb2[off]); 680 AssertReleaseFailed(); 681 } 682 683 /* the high ROM mapping. */ 684 pb1 = (uint8_t *)MMPhysGCPhys2HCVirt(pVM, (uint32_t)-g_cbPcBiosBinary, g_cbPcBiosBinary); 685 AssertRelease(pb1); 686 pb2 = &g_abPcBiosBinary[0]; 687 if (memcmp(pb1, pb2, g_cbPcBiosBinary)) 688 { 689 AssertMsg2("high ROM mismatch! g_cbPcBiosBinary=%#x\n", g_cbPcBiosBinary); 690 for (unsigned off = 0; off < g_cbPcBiosBinary; off++) 691 if (pb1[off] != pb2[off]) 692 AssertMsg2("%05x: %02x expected %02x\n", off, pb1[off], pb2[off]); 693 AssertReleaseFailed(); 694 } 695 #endif 696 } 697 698 699 /** 700 * Destruct a device instance. 701 * 702 * Most VM resources are freed by the VM. This callback is provided so that any non-VM 703 * resources can be freed correctly. 704 * 705 * @param pDevIns The device instance data. 706 */ 707 static DECLCALLBACK(int) pcbiosDestruct(PPDMDEVINS pDevIns) 708 { 709 PDEVPCBIOS pData = PDMINS2DATA(pDevIns, PDEVPCBIOS); 710 LogFlow(("pcbiosDestruct:\n")); 711 712 /* 713 * Free MM heap pointers. 714 */ 715 if (pData->pu8LanBoot) 716 { 717 MMR3HeapFree(pData->pu8LanBoot); 718 pData->pu8LanBoot = NULL; 719 } 720 721 if (pData->pszLanBootFile) 722 { 723 MMR3HeapFree(pData->pszLanBootFile); 724 pData->pszLanBootFile = NULL; 725 } 726 727 if (pData->pu8Logo) 728 { 729 MMR3HeapFree(pData->pu8Logo); 730 pData->pu8Logo = NULL; 731 } 732 733 if (pData->pszLogoFile) 734 { 735 MMR3HeapFree(pData->pszLogoFile); 736 pData->pszLogoFile = NULL; 737 } 738 739 return VINF_SUCCESS; 740 } 741 742 743 /** 744 * Convert config value to DEVPCBIOSBOOT. 745 * 746 * @returns VBox status code. 747 * @param pCfgHandle Configuration handle. 748 * @param pszParam The name of the value to read. 749 * @param penmBoot Where to store the boot method. 750 */ 751 static int pcbiosBootFromCfg(PPDMDEVINS pDevIns, PCFGMNODE pCfgHandle, const char *pszParam, DEVPCBIOSBOOT *penmBoot) 752 { 753 char *psz; 754 int rc = CFGMR3QueryStringAlloc(pCfgHandle, pszParam, &psz); 755 if (VBOX_FAILURE(rc)) 756 return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, 757 N_("Configuration error: Querying \"%s\" as a string failed"), 758 pszParam); 759 if (!strcmp(psz, "DVD") || !strcmp(psz, "CDROM")) 760 *penmBoot = DEVPCBIOSBOOT_DVD; 761 else if (!strcmp(psz, "IDE")) 762 *penmBoot = DEVPCBIOSBOOT_HD; 763 else if (!strcmp(psz, "FLOPPY")) 764 *penmBoot = DEVPCBIOSBOOT_FLOPPY; 765 else if (!strcmp(psz, "LAN")) 766 *penmBoot = DEVPCBIOSBOOT_LAN; 767 else if (!strcmp(psz, "NONE")) 768 *penmBoot = DEVPCBIOSBOOT_NONE; 769 else 770 { 771 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, 772 N_("Configuration error: The \"%s\" value \"%s\" is unknown.\n"), 773 pszParam, psz); 774 rc = VERR_INTERNAL_ERROR; 775 } 776 MMR3HeapFree(psz); 777 return rc; 778 } 779 734 /** 735 * Construct the DMI table. 736 * 737 * @param table pointer to DMI table. 738 */ 780 739 #define STRCPY(p, s) do { memcpy (p, s, sizeof(s)); p += sizeof(s); } while (0) 781 static void pcbiosPlantDMITable(uint8_t * table)782 { 783 char *pszStr = (char*) table;740 static void pcbiosPlantDMITable(uint8_t *pTable) 741 { 742 char *pszStr = (char*)pTable; 784 743 int iStrNr; 785 744 … … 835 794 *pszStr++ = '\0'; 836 795 837 AssertMsg(pszStr - (char*) table == VBOX_DMI_TABLE_SIZE,796 AssertMsg(pszStr - (char*)pTable == VBOX_DMI_TABLE_SIZE, 838 797 ("VBOX_DMI_TABLE_SIZE=%d, actual DMI table size is %d", 839 VBOX_DMI_TABLE_SIZE, pszStr - (char*) table));798 VBOX_DMI_TABLE_SIZE, pszStr - (char*)pTable)); 840 799 } 841 842 800 AssertCompile(VBOX_DMI_TABLE_ENTR == 2); 843 801 802 803 /** 804 * Calculate a simple checksum for the MPS table. 805 * 806 * @param data data 807 * @param len size of data 808 */ 809 static uint8_t pcbiosChecksum(const uint8_t * const au8Data, uint32_t u32Length) 810 { 811 uint8_t u8Sum = 0; 812 for (size_t i = 0; i < u32Length; ++i) 813 u8Sum += au8Data[i]; 814 return -u8Sum; 815 } 816 817 /** 818 * Construct the MPS table. Only applicable if IOAPIC is active. 819 * 820 * @param pDevIns The device instance data. 821 * @param addr physical address in guest memory. 822 */ 823 static void pcbiosPlantMPStable(PPDMDEVINS pDevIns, uint8_t *pTable) 824 { 825 /* configuration table */ 826 PMPSCFGTBLHEADER pCfgTab = (MPSCFGTBLHEADER*)pTable; 827 memcpy(pCfgTab->au8Signature, "PCMP", 4); 828 pCfgTab->u8SpecRev = 4; /* 1.4 */ 829 memcpy(pCfgTab->au8OemId, "VBOXCPU ", 8); 830 memcpy(pCfgTab->au8ProductId, "VirtualBox ", 12); 831 pCfgTab->u32OemTablePtr = 0; 832 pCfgTab->u16OemTableSize = 0; 833 pCfgTab->u16EntryCount = 1 /* Processor */ 834 + 1 /* ISA Bus */ 835 + 1 /* I/O-APIC */ 836 + 16 /* Interrupts */; 837 pCfgTab->u32AddrLocalApic = 0xfee00000; 838 pCfgTab->u16ExtTableLength = 0; 839 pCfgTab->u8ExtTableChecksxum = 0; 840 pCfgTab->u8Reserved = 0; 841 842 uint32_t u32Eax, u32Ebx, u32Ecx, u32Edx; 843 uint32_t u32CPUSignature = 0x0520; /* default: Pentium 100 */ 844 uint32_t u32FeatureFlags = 0x0001; /* default: FPU */ 845 PDMDevHlpQueryCPUId(pDevIns, 0, &u32Eax, &u32Ebx, &u32Ecx, &u32Edx); 846 if (u32Eax >= 1) 847 { 848 PDMDevHlpQueryCPUId(pDevIns, 1, &u32Eax, &u32Ebx, &u32Ecx, &u32Edx); 849 u32CPUSignature = u32Eax & 0xfff; 850 /* Local APIC will be enabled later so override it here. Since we provide 851 * an MP table we have an IOAPIC and therefore a Local APIC. */ 852 u32FeatureFlags = u32Edx | X86_CPUID_FEATURE_EDX_APIC; 853 } 854 855 /* one processor so far */ 856 PMPSPROCENTRY pProcEntry = (PMPSPROCENTRY)(pCfgTab+1); 857 pProcEntry->u8EntryType = 0; /* processor entry */ 858 pProcEntry->u8LocalApicId = 0; 859 pProcEntry->u8LocalApicVersion = 0x11; 860 pProcEntry->u8CPUFlags = 2 /* bootstrap processor */ | 1 /* enabled */; 861 pProcEntry->u32CPUSignature = u32CPUSignature; 862 pProcEntry->u32CPUFeatureFlags = u32FeatureFlags; 863 pProcEntry->u32Reserved[0] = 864 pProcEntry->u32Reserved[1] = 0; 865 866 /* ISA bus */ 867 PMPSBUSENTRY pBusEntry = (PMPSBUSENTRY)(pProcEntry+1); 868 pBusEntry->u8EntryType = 1; /* bus entry */ 869 pBusEntry->u8BusId = 0; /* this ID is referenced by the interrupt entries */ 870 memcpy(pBusEntry->au8BusTypeStr, "ISA ", 6); 871 872 /* PCI bus? */ 873 874 /* I/O-APIC. 875 * MP spec: "The configuration table contains one or more entries for I/O APICs. 876 * ... At least one I/O APIC must be enabled." */ 877 PMPSIOAPICENTRY pIOAPICEntry = (PMPSIOAPICENTRY)(pBusEntry+1); 878 pIOAPICEntry->u8EntryType = 2; /* I/O-APIC entry */ 879 pIOAPICEntry->u8Id = 1; /* this ID is referenced by the interrupt entries */ 880 pIOAPICEntry->u8Version = 0x11; 881 pIOAPICEntry->u8Flags = 1 /* enable */; 882 pIOAPICEntry->u32Addr = 0xfec00000; 883 884 PMPSIOIRQENTRY pIrqEntry = (PMPSIOIRQENTRY)(pIOAPICEntry+1); 885 for (int i=0; i<16; i++, pIrqEntry++) 886 { 887 pIrqEntry->u8EntryType = 3; /* I/O interrupt entry */ 888 pIrqEntry->u8Type = 0; /* INT, vectored interrupt */ 889 pIrqEntry->u16Flags = 0; /* polarity of APIC I/O input signal = conforms to bus, 890 trigger mode = conforms to bus */ 891 pIrqEntry->u8SrcBusId = 0; /* ISA bus */ 892 pIrqEntry->u8SrcBusIrq = i; 893 pIrqEntry->u8DstIOAPICId = 1; 894 pIrqEntry->u8DstIOAPICInt = i; 895 } 896 897 pCfgTab->u16Length = (uint8_t*)pIrqEntry - pTable; 898 pCfgTab->u8Checksum = pcbiosChecksum(pTable, pCfgTab->u16Length); 899 900 AssertMsg(pCfgTab->u16Length < 0x1000 - 0x100, 901 ("VBOX_MPS_TABLE_SIZE=%d, maximum allowed size is %d", 902 pCfgTab->u16Length, 0x1000-0x100)); 903 904 MPSFLOATPTR floatPtr; 905 floatPtr.au8Signature[0] = '_'; 906 floatPtr.au8Signature[1] = 'M'; 907 floatPtr.au8Signature[2] = 'P'; 908 floatPtr.au8Signature[3] = '_'; 909 floatPtr.u32MPSAddr = VBOX_MPS_TABLE_BASE; 910 floatPtr.u8Length = 1; /* structure size in paragraphs */ 911 floatPtr.u8SpecRev = 4; /* MPS revision 1.4 */ 912 floatPtr.u8Checksum = 0; 913 floatPtr.au8Feature[0] = 0; 914 floatPtr.au8Feature[1] = 0; 915 floatPtr.au8Feature[2] = 0; 916 floatPtr.au8Feature[3] = 0; 917 floatPtr.au8Feature[4] = 0; 918 floatPtr.u8Checksum = pcbiosChecksum((uint8_t*)&floatPtr, 16); 919 PDMDevHlpPhysWrite (pDevIns, 0x9fff0, &floatPtr, 16); 920 } 921 922 923 /** 924 * Reset notification. 925 * 926 * @returns VBox status. 927 * @param pDevIns The device instance data. 928 */ 929 static DECLCALLBACK(void) pcbiosReset(PPDMDEVINS pDevIns) 930 { 931 PDEVPCBIOS pData = PDMINS2DATA(pDevIns, PDEVPCBIOS); 932 LogFlow(("pcbiosReset:\n")); 933 934 pData->u8LogoBank = 0; 935 /** @todo Should we perhaps do pcbiosInitComplete() on reset? */ 936 937 #if 1 938 /* 939 * Paranoia: Check that the BIOS ROM hasn't changed. 940 */ 941 PVM pVM = PDMDevHlpGetVM(pDevIns); 942 /* the low ROM mapping. */ 943 unsigned cb = RT_MIN(g_cbPcBiosBinary, 128 * _1K); 944 const uint8_t *pb1 = (uint8_t *)MMPhysGCPhys2HCVirt(pVM, 0x00100000 - cb, cb); 945 AssertRelease(pb1); 946 const uint8_t *pb2 = &g_abPcBiosBinary[g_cbPcBiosBinary - cb]; 947 if (memcmp(pb1, pb2, cb)) 948 { 949 AssertMsg2("low ROM mismatch! cb=%#x\n", cb); 950 for (unsigned off = 0; off < cb; off++) 951 if (pb1[off] != pb2[off]) 952 AssertMsg2("%05x: %02x expected %02x\n", off, pb1[off], pb2[off]); 953 AssertReleaseFailed(); 954 } 955 956 /* the high ROM mapping. */ 957 pb1 = (uint8_t *)MMPhysGCPhys2HCVirt(pVM, (uint32_t)-g_cbPcBiosBinary, g_cbPcBiosBinary); 958 AssertRelease(pb1); 959 pb2 = &g_abPcBiosBinary[0]; 960 if (memcmp(pb1, pb2, g_cbPcBiosBinary)) 961 { 962 AssertMsg2("high ROM mismatch! g_cbPcBiosBinary=%#x\n", g_cbPcBiosBinary); 963 for (unsigned off = 0; off < g_cbPcBiosBinary; off++) 964 if (pb1[off] != pb2[off]) 965 AssertMsg2("%05x: %02x expected %02x\n", off, pb1[off], pb2[off]); 966 AssertReleaseFailed(); 967 } 968 #endif 969 970 if (pData->u8IOAPIC) 971 pcbiosPlantMPStable(pDevIns, pData->au8DMIPage + 0x100); 972 } 973 974 975 /** 976 * Destruct a device instance. 977 * 978 * Most VM resources are freed by the VM. This callback is provided so that any non-VM 979 * resources can be freed correctly. 980 * 981 * @param pDevIns The device instance data. 982 */ 983 static DECLCALLBACK(int) pcbiosDestruct(PPDMDEVINS pDevIns) 984 { 985 PDEVPCBIOS pData = PDMINS2DATA(pDevIns, PDEVPCBIOS); 986 LogFlow(("pcbiosDestruct:\n")); 987 988 /* 989 * Free MM heap pointers. 990 */ 991 if (pData->pu8LanBoot) 992 { 993 MMR3HeapFree(pData->pu8LanBoot); 994 pData->pu8LanBoot = NULL; 995 } 996 997 if (pData->pszLanBootFile) 998 { 999 MMR3HeapFree(pData->pszLanBootFile); 1000 pData->pszLanBootFile = NULL; 1001 } 1002 1003 if (pData->pu8Logo) 1004 { 1005 MMR3HeapFree(pData->pu8Logo); 1006 pData->pu8Logo = NULL; 1007 } 1008 1009 if (pData->pszLogoFile) 1010 { 1011 MMR3HeapFree(pData->pszLogoFile); 1012 pData->pszLogoFile = NULL; 1013 } 1014 1015 return VINF_SUCCESS; 1016 } 1017 1018 1019 /** 1020 * Convert config value to DEVPCBIOSBOOT. 1021 * 1022 * @returns VBox status code. 1023 * @param pCfgHandle Configuration handle. 1024 * @param pszParam The name of the value to read. 1025 * @param penmBoot Where to store the boot method. 1026 */ 1027 static int pcbiosBootFromCfg(PPDMDEVINS pDevIns, PCFGMNODE pCfgHandle, const char *pszParam, DEVPCBIOSBOOT *penmBoot) 1028 { 1029 char *psz; 1030 int rc = CFGMR3QueryStringAlloc(pCfgHandle, pszParam, &psz); 1031 if (VBOX_FAILURE(rc)) 1032 return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, 1033 N_("Configuration error: Querying \"%s\" as a string failed"), 1034 pszParam); 1035 if (!strcmp(psz, "DVD") || !strcmp(psz, "CDROM")) 1036 *penmBoot = DEVPCBIOSBOOT_DVD; 1037 else if (!strcmp(psz, "IDE")) 1038 *penmBoot = DEVPCBIOSBOOT_HD; 1039 else if (!strcmp(psz, "FLOPPY")) 1040 *penmBoot = DEVPCBIOSBOOT_FLOPPY; 1041 else if (!strcmp(psz, "LAN")) 1042 *penmBoot = DEVPCBIOSBOOT_LAN; 1043 else if (!strcmp(psz, "NONE")) 1044 *penmBoot = DEVPCBIOSBOOT_NONE; 1045 else 1046 { 1047 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, 1048 N_("Configuration error: The \"%s\" value \"%s\" is unknown.\n"), 1049 pszParam, psz); 1050 rc = VERR_INTERNAL_ERROR; 1051 } 1052 MMR3HeapFree(psz); 1053 return rc; 1054 } 844 1055 845 1056 /** … … 862 1073 int rc; 863 1074 int cb; 864 // char *psz;865 1075 866 1076 Assert(iInstance == 0); … … 883 1093 "ShowBootMenu\0" 884 1094 "DelayBoot\0" 885 "LanBootRom\0")) 1095 "LanBootRom\0" 1096 "IOAPIC\0")) 886 1097 return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES, 887 1098 N_("Invalid configuraton for device pcbios device")); … … 894 1105 return PDMDEV_SET_ERROR(pDevIns, rc, 895 1106 N_("Configuration error: Querying \"RamSize\" as integer failed")); 1107 1108 rc = CFGMR3QueryU8 (pCfgHandle, "IOAPIC", &pData->u8IOAPIC); 1109 if (rc == VERR_CFGM_VALUE_NOT_FOUND) 1110 pData->u8IOAPIC = 1; 1111 else if (VBOX_FAILURE (rc)) 1112 return PDMDEV_SET_ERROR(pDevIns, rc, 1113 N_("Configuration error: Failed to read \"IOAPIC\".")); 896 1114 897 1115 static const char * const s_apszBootDevices[] = { "BootDevice0", "BootDevice1", "BootDevice2", "BootDevice3" }; … … 927 1145 928 1146 pcbiosPlantDMITable(pData->au8DMIPage); 1147 if (pData->u8IOAPIC) 1148 pcbiosPlantMPStable(pDevIns, pData->au8DMIPage + 0x100); 929 1149 930 1150 rc = PDMDevHlpROMRegister(pDevIns, VBOX_DMI_TABLE_BASE, 0x1000, pData->au8DMIPage, "DMI tables"); -
trunk/src/VBox/Devices/PC/DevPcBios.h
r41 r2651 29 29 #define VBOX_DMI_TABLE_VER 0x23 30 30 31 #define VBOX_MPS_TABLE_BASE 0xe1100 32 31 33 #define VBOX_LANBOOT_SEG 0xca00 32 34 -
trunk/src/VBox/Main/ConsoleImpl.cpp
r2635 r2651 4587 4587 rc = CFGMR3InsertString(pCfg, "HardDiskDevice", "piix3ide"); RC_CHECK(); 4588 4588 rc = CFGMR3InsertString(pCfg, "FloppyDevice", "i82078"); RC_CHECK(); 4589 rc = CFGMR3InsertInteger(pCfg, "IOAPIC", fIOAPIC); RC_CHECK(); 4589 4590 4590 4591 DeviceType_T bootDevice; … … 4677 4678 BOOL fACPI; 4678 4679 hrc = biosSettings->COMGETTER(ACPIEnabled)(&fACPI); H(); 4679 if (fACPI || fIOAPIC)4680 if (fACPI) 4680 4681 { 4681 4682 rc = CFGMR3InsertNode(pDevices, "acpi", &pDev); RC_CHECK();
Note:
See TracChangeset
for help on using the changeset viewer.
