Changeset 27627 in vbox
- Timestamp:
- Mar 23, 2010 1:36:42 PM (15 years ago)
- svn:sync-xref-src-repo-rev:
- 59181
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/PC/DevHPET.cpp
r27254 r27627 171 171 uint64_t u64Capabilities; 172 172 /* configuration */ 173 uint64_t u64 Config;173 uint64_t u64HpetConfig; 174 174 /* interrupt status register */ 175 175 uint64_t u64Isr; … … 197 197 198 198 /* 199 * Temporary control to dis ble locking if problems found199 * Temporary control to disable locking if problems found 200 200 */ 201 201 static const bool fHpetLocking = true; … … 247 247 } 248 248 249 static uint64_t updateMasked(uint64_t u64NewValue,250 uint64_t u64OldValue,251 uint64_t u64Mask)249 static uint64_t hpetUpdateMasked(uint64_t u64NewValue, 250 uint64_t u64OldValue, 251 uint64_t u64Mask) 252 252 { 253 253 u64NewValue &= u64Mask; 254 u64NewValue |= u64OldValue & ~u64Mask;254 u64NewValue |= (u64OldValue & ~u64Mask); 255 255 return u64NewValue; 256 256 } 257 257 258 static bool isBitJustSet(uint64_t u64OldValue,259 uint64_t u64NewValue,260 uint64_t u64Mask)258 static bool hpetBitJustSet(uint64_t u64OldValue, 259 uint64_t u64NewValue, 260 uint64_t u64Mask) 261 261 { 262 262 return (!(u64OldValue & u64Mask) && (u64NewValue & u64Mask)); 263 263 } 264 264 265 static bool isBitJustCleared(uint64_t u64OldValue,266 uint64_t u64NewValue,267 uint64_t u64Mask)268 { 269 return ( (u64OldValue & u64Mask) && !(u64NewValue & u64Mask));265 static bool hpetBitJustCleared(uint64_t u64OldValue, 266 uint64_t u64NewValue, 267 uint64_t u64Mask) 268 { 269 return (!!(u64OldValue & u64Mask) && !(u64NewValue & u64Mask)); 270 270 } 271 271 … … 356 356 * timer 1: IRQ8 for both PIC and APIC 357 357 * 358 * ISA IRQ delivery logic will take care of correct delivery 358 * ISA IRQ delivery logic will take care of correct delivery 359 359 * to the different ICs. 360 360 */ 361 361 if ((pTimer->u8TimerNumber <= 1) && 362 (pTimer->CTX_SUFF(pHpet)->u64 Config & HPET_CFG_LEGACY))362 (pTimer->CTX_SUFF(pHpet)->u64HpetConfig & HPET_CFG_LEGACY)) 363 363 return (pTimer->u8TimerNumber == 0) ? 0 : 8; 364 364 else … … 366 366 } 367 367 368 static int timerRegRead32(HpetState* pThis,369 uint32_t iTimerNo,370 uint32_t iTimerReg,371 uint32_t * pValue)368 static int hpetTimerRegRead32(HpetState* pThis, 369 uint32_t iTimerNo, 370 uint32_t iTimerReg, 371 uint32_t * pValue) 372 372 { 373 373 HpetTimer *pTimer; … … 411 411 } 412 412 413 static int configRegRead32(HpetState* pThis,414 uint32_t iIndex,415 uint32_t *pValue)413 static int hpetConfigRegRead32(HpetState* pThis, 414 uint32_t iIndex, 415 uint32_t *pValue) 416 416 { 417 417 switch (iIndex) … … 427 427 case HPET_CFG: 428 428 Log(("read HPET_CFG\n")); 429 *pValue = (uint32_t)(pThis->u64 Config);429 *pValue = (uint32_t)(pThis->u64HpetConfig); 430 430 break; 431 431 case HPET_CFG + 4: 432 432 Log(("read of HPET_CFG + 4\n")); 433 *pValue = (uint32_t)(pThis->u64 Config >> 32);433 *pValue = (uint32_t)(pThis->u64HpetConfig >> 32); 434 434 break; 435 435 case HPET_COUNTER: … … 438 438 uint64_t u64Ticks; 439 439 Log(("read HPET_COUNTER\n")); 440 if (pThis->u64 Config & HPET_CFG_ENABLE)440 if (pThis->u64HpetConfig & HPET_CFG_ENABLE) 441 441 u64Ticks = hpetGetTicks(pThis); 442 442 else … … 457 457 } 458 458 459 static int timerRegWrite32(HpetState* pThis,460 uint32_t iTimerNo,461 uint32_t iTimerReg,462 uint32_t iNewValue)459 static int hpetTimerRegWrite32(HpetState* pThis, 460 uint32_t iTimerNo, 461 uint32_t iTimerReg, 462 uint32_t iNewValue) 463 463 { 464 464 HpetTimer * pTimer; … … 474 474 pTimer = &pThis->aTimers[iTimerNo]; 475 475 476 rc = timerRegRead32(pThis, iTimerNo, iTimerReg, &u32Temp);476 rc = hpetTimerRegRead32(pThis, iTimerNo, iTimerReg, &u32Temp); 477 477 if (RT_FAILURE(rc)) 478 478 return rc; … … 496 496 /** We only care about lower 32-bits so far */ 497 497 pTimer->u64Config = 498 updateMasked(iNewValue, iOldValue, HPET_TN_CFG_WRITE_MASK);498 hpetUpdateMasked(iNewValue, iOldValue, HPET_TN_CFG_WRITE_MASK); 499 499 break; 500 500 } … … 527 527 Log2(("after HPET_TN_CMP cmp=%llx per=%llx\n", pTimer->u64Cmp, pTimer->u64Period)); 528 528 529 if (pThis->u64 Config & HPET_CFG_ENABLE)529 if (pThis->u64HpetConfig & HPET_CFG_ENABLE) 530 530 hpetProgramTimer(pTimer); 531 531 break; … … 552 552 Log2(("after HPET_TN_CMP+4 cmp=%llx per=%llx\n", pTimer->u64Cmp, pTimer->u64Period)); 553 553 554 if (pThis->u64 Config & HPET_CFG_ENABLE)554 if (pThis->u64HpetConfig & HPET_CFG_ENABLE) 555 555 hpetProgramTimer(pTimer); 556 556 break; … … 590 590 } 591 591 592 static int configRegWrite32(HpetState* pThis,593 uint32_t iIndex,594 uint32_t iNewValue)592 static int hpetConfigRegWrite32(HpetState* pThis, 593 uint32_t iIndex, 594 uint32_t iNewValue) 595 595 { 596 596 int rc = VINF_SUCCESS; … … 610 610 Log(("write HPET_CFG: %x\n", iNewValue)); 611 611 612 iOldValue = (uint32_t)(pThis->u64 Config);612 iOldValue = (uint32_t)(pThis->u64HpetConfig); 613 613 614 614 /* … … 616 616 * may request retry in R3 - so we must keep state intact. 617 617 */ 618 if ( isBitJustSet(iOldValue, iNewValue, HPET_CFG_LEGACY))618 if (hpetBitJustSet(iOldValue, iNewValue, HPET_CFG_LEGACY)) 619 619 { 620 620 rc = hpetLegacyMode(pThis, true); 621 621 } 622 else if ( isBitJustCleared(iOldValue, iNewValue, HPET_CFG_LEGACY))622 else if (hpetBitJustCleared(iOldValue, iNewValue, HPET_CFG_LEGACY)) 623 623 { 624 624 rc = hpetLegacyMode(pThis, false); … … 627 627 return rc; 628 628 629 pThis->u64 Config = updateMasked(iNewValue, iOldValue, HPET_CFG_WRITE_MASK);630 if ( isBitJustSet(iOldValue, iNewValue, HPET_CFG_ENABLE))629 pThis->u64HpetConfig = hpetUpdateMasked(iNewValue, iOldValue, HPET_CFG_WRITE_MASK); 630 if (hpetBitJustSet(iOldValue, iNewValue, HPET_CFG_ENABLE)) 631 631 { 632 632 /* Enable main counter and interrupt generation. */ … … 637 637 hpetProgramTimer(&pThis->aTimers[i]); 638 638 } 639 else if ( isBitJustCleared(iOldValue, iNewValue, HPET_CFG_ENABLE))639 else if (hpetBitJustCleared(iOldValue, iNewValue, HPET_CFG_ENABLE)) 640 640 { 641 641 /* Halt main counter and disable interrupt generation. */ … … 649 649 { 650 650 Log(("write HPET_CFG + 4: %x\n", iNewValue)); 651 pThis->u64 Config = updateMasked((uint64_t)iNewValue << 32,652 pThis->u64Config,653 0xffffffff00000000ULL);651 pThis->u64HpetConfig = hpetUpdateMasked((uint64_t)iNewValue << 32, 652 pThis->u64HpetConfig, 653 0xffffffff00000000ULL); 654 654 break; 655 655 } … … 717 717 { 718 718 if ((iIndex >= 0x100) && (iIndex < 0x400)) 719 rc = timerRegRead32(pThis, (iIndex - 0x100) / 0x20, (iIndex - 0x100) % 0x20, (uint32_t*)pv);719 rc = hpetTimerRegRead32(pThis, (iIndex - 0x100) / 0x20, (iIndex - 0x100) % 0x20, (uint32_t*)pv); 720 720 else 721 rc = configRegRead32(pThis, iIndex, (uint32_t*)pv);721 rc = hpetConfigRegRead32(pThis, iIndex, (uint32_t*)pv); 722 722 break; 723 723 } … … 742 742 uint32_t iTimerReg = (iIndex - 0x100) % 0x20; 743 743 744 rc = timerRegRead32(pThis, iTimer, iTimerReg, &value.u32[0]);744 rc = hpetTimerRegRead32(pThis, iTimer, iTimerReg, &value.u32[0]); 745 745 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 746 746 break; 747 rc = timerRegRead32(pThis, iTimer, iTimerReg + 4, &value.u32[1]);747 rc = hpetTimerRegRead32(pThis, iTimer, iTimerReg + 4, &value.u32[1]); 748 748 } 749 749 else 750 750 { 751 rc = configRegRead32(pThis, iIndex, &value.u32[0]);751 rc = hpetConfigRegRead32(pThis, iIndex, &value.u32[0]); 752 752 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 753 753 break; 754 rc = configRegRead32(pThis, iIndex+4, &value.u32[1]);754 rc = hpetConfigRegRead32(pThis, iIndex+4, &value.u32[1]); 755 755 } 756 756 if (rc == VINF_SUCCESS) … … 796 796 { 797 797 if ((iIndex >= 0x100) && (iIndex < 0x400)) 798 rc = timerRegWrite32(pThis,799 (iIndex - 0x100) / 0x20,800 (iIndex - 0x100) % 0x20,801 *(uint32_t*)pv);798 rc = hpetTimerRegWrite32(pThis, 799 (iIndex - 0x100) / 0x20, 800 (iIndex - 0x100) % 0x20, 801 *(uint32_t*)pv); 802 802 else 803 rc = configRegWrite32(pThis, iIndex, *(uint32_t*)pv);803 rc = hpetConfigRegWrite32(pThis, iIndex, *(uint32_t*)pv); 804 804 break; 805 805 } … … 825 825 uint32_t iTimerReg = (iIndex - 0x100) % 0x20; 826 826 827 rc = timerRegWrite32(pThis, iTimer, iTimerReg, value.u32[0]);827 rc = hpetTimerRegWrite32(pThis, iTimer, iTimerReg, value.u32[0]); 828 828 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 829 829 break; 830 rc = timerRegWrite32(pThis, iTimer, iTimerReg + 4, value.u32[1]);830 rc = hpetTimerRegWrite32(pThis, iTimer, iTimerReg + 4, value.u32[1]); 831 831 } 832 832 else 833 833 { 834 rc = configRegWrite32(pThis, iIndex, value.u32[0]);834 rc = hpetConfigRegWrite32(pThis, iIndex, value.u32[0]); 835 835 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 836 836 break; 837 rc = configRegWrite32(pThis, iIndex+4, value.u32[1]);837 rc = hpetConfigRegWrite32(pThis, iIndex+4, value.u32[1]); 838 838 } 839 839 break; … … 915 915 SSMR3PutU64(pSSM, pThis->u64HpetOffset); 916 916 SSMR3PutU64(pSSM, pThis->u64Capabilities); 917 SSMR3PutU64(pSSM, pThis->u64 Config);917 SSMR3PutU64(pSSM, pThis->u64HpetConfig); 918 918 SSMR3PutU64(pSSM, pThis->u64Isr); 919 919 SSMR3PutU64(pSSM, pThis->u64HpetCounter); … … 963 963 SSMR3GetU64(pSSM, &pThis->u64HpetOffset); 964 964 SSMR3GetU64(pSSM, &pThis->u64Capabilities); 965 SSMR3GetU64(pSSM, &pThis->u64 Config);965 SSMR3GetU64(pSSM, &pThis->u64HpetConfig); 966 966 SSMR3GetU64(pSSM, &pThis->u64Isr); 967 967 SSMR3GetU64(pSSM, &pThis->u64HpetCounter); … … 970 970 } 971 971 972 static void irqUpdate(struct HpetTimer *pTimer)972 static void hpetIrqUpdate(struct HpetTimer *pTimer) 973 973 { 974 974 uint32_t irq = getTimerIrq(pTimer); … … 976 976 977 977 /** @todo: is it correct? */ 978 if ( (pTimer->u64Config & HPET_TN_ENABLE) &&979 (pThis->u64Config & HPET_CFG_ENABLE))978 if (!!(pTimer->u64Config & HPET_TN_ENABLE) && 979 !!(pThis->u64HpetConfig & HPET_CFG_ENABLE)) 980 980 { 981 981 Log4(("HPET: raising IRQ %d\n", irq)); … … 1041 1041 1042 1042 /* Should it really be under lock, does it really matter? */ 1043 irqUpdate(pTimer);1043 hpetIrqUpdate(pTimer); 1044 1044 1045 1045 hpetUnlock(pThis); … … 1084 1084 LogFlow(("hpetReset:\n")); 1085 1085 1086 pThis->u64 Config = 0;1086 pThis->u64HpetConfig = 0; 1087 1087 for (i = 0; i < HPET_NUM_TIMERS; i++) 1088 1088 { … … 1094 1094 /* We can do all IRQs */ 1095 1095 uint32_t u32RoutingCap = 0xffffffff; 1096 pTimer->u64Config |= 1096 pTimer->u64Config |= ((uint64_t)u32RoutingCap) << 32; 1097 1097 pTimer->u64Period = 0ULL; 1098 1098 pTimer->u8Wrap = 0; … … 1109 1109 pThis->u64Capabilities = (u32Vendor << 16) | u32Caps; 1110 1110 pThis->u64Capabilities |= ((uint64_t)(HPET_CLK_PERIOD) << 32); 1111 1112 /* Notify PIT/RTC devices */ 1113 hpetLegacyMode(pThis, false); 1111 1114 } 1112 1115 … … 1168 1171 " offset = %016RX64 counter = %016RX64 isr = %016RX64\n" 1169 1172 " legacy mode is %s\n", 1170 pThis->u64 Config,1173 pThis->u64HpetConfig, 1171 1174 pThis->u64HpetOffset, pThis->u64HpetCounter, pThis->u64Isr, 1172 (pThis->u64Config & HPET_CFG_LEGACY) ? "on" : "off");1175 !!(pThis->u64HpetConfig & HPET_CFG_LEGACY) ? "on" : "off"); 1173 1176 pHlp->pfnPrintf(pHlp, 1174 1177 "Timers:\n");
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