Changeset 2927 in vbox for trunk/src/VBox/Devices

Timestamp:

May 30, 2007 7:58:09 AM (18 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

21604

Message:

Clear the interrupt FF when a pending interrupt is masked by a TRP update.

File:

• trunk/src/VBox/Devices/PC/DevAPIC.cpp (modified) (8 diffs)

trunk/src/VBox/Devices/PC/DevAPIC.cpp

@@ -215 +215 @@
     STAMCOUNTER     StatMMIOWriteGC;
     STAMCOUNTER     StatMMIOWriteHC;
+    STAMCOUNTER     StatClearedActiveIrq;
 # endif
 #endif /* VBOX */
@@ -266 +267 @@
 static void apic_init_ipi(APICState *s);
 static void apic_set_irq(APICState *s, int vector_num, int trigger_mode);
-static void apic_update_irq(APICState *s);
+static bool apic_update_irq(APICState *s);
 
 #ifdef VBOX
@@ -284 +285 @@
 PDMBOTHCBDECL(int)  ioapicMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb);
 PDMBOTHCBDECL(void) ioapicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
+
+static void apic_update_tpr(APICState *s, uint32_t val);
 __END_DECLS
 #endif /* VBOX */
@@ -453 +456 @@
     APICState *s = PDMINS2DATA(pDevIns, APICState *);
     LogFlow(("apicSetTPR: val=%#x (trp %#x -> %#x)\n", val, s->tpr, (val & 0x0f) << 4));
-    s->tpr = (val & 0x0f) << 4;
-    apic_update_irq(s);
+    apic_update_tpr(s, (val & 0x0f) << 4);
 }
 
@@ -520 +522 @@
 
 /* signal the CPU if an irq is pending */
-static void apic_update_irq(APICState *s)
+static bool apic_update_irq(APICState *s)
 {
     int irrv, ppr;
@@ -528 +530 @@
         /* Clear any pending APIC interrupt action flag. */
         s->CTXALLSUFF(pApicHlp)->pfnClearInterruptFF(s->CTXSUFF(pDevIns));
-        return;
+        return false;
     }
 #else
-        return;
+        return false;
 #endif /* VBOX */
     irrv = get_highest_priority_int(s->irr);
     if (irrv < 0)
-        return;
+        return false;
     ppr = apic_get_ppr(s);
     if (ppr && (irrv & 0xf0) <= (ppr & 0xf0))
-        return;
+        return false;
 #ifndef VBOX
     cpu_interrupt(s->cpu_env, CPU_INTERRUPT_HARD);
 #else
     s->CTXALLSUFF(pApicHlp)->pfnSetInterruptFF(s->CTXSUFF(pDevIns));
-#endif
-}
+    return true;
+#endif
+}
+
+#ifdef VBOX
+static void apic_update_tpr(APICState *s, uint32_t val)
+{
+    bool fIrqIsActive = false;
+    bool fIrqWasActive = false;
+
+    fIrqWasActive = apic_update_irq(s);
+    s->tpr        = val;
+    fIrqIsActive  = apic_update_irq(s);
+
+    /* If an interrupt is pending and now masked, then clear the FF flag. */
+    if (fIrqWasActive && !fIrqIsActive)
+    {
+        Log(("apic_update_tpr: deactivate interrupt that was masked by the TPR update (%x)\n", val));
+        STAM_COUNTER_INC(&s->StatClearedActiveIrq);
+        s->CTXALLSUFF(pApicHlp)->pfnClearInterruptFF(s->CTXSUFF(pDevIns));
+    }
+}
+#endif
 
 static void apic_set_irq(APICState *s, int vector_num, int trigger_mode)
@@ -988 +1011 @@
         break;
     case 0x08:
+#ifdef VBOX
+        apic_update_tpr(s, val);
+#else
         s->tpr = val;
         apic_update_irq(s);
+#endif
         break;
     case 0x09:
@@ -1769 +1796 @@
     PDMDevHlpSTAMRegister(pDevIns, &pData->StatMMIOWriteGC,    STAMTYPE_COUNTER,  "/PDM/APIC/MMIOWriteGC",  STAMUNIT_OCCURENCES, "Number of APIC MMIO writes in GC.");
     PDMDevHlpSTAMRegister(pDevIns, &pData->StatMMIOWriteHC,    STAMTYPE_COUNTER,  "/PDM/APIC/MMIOWriteHC",  STAMUNIT_OCCURENCES, "Number of APIC MMIO writes in HC.");
+    PDMDevHlpSTAMRegister(pDevIns, &pData->StatClearedActiveIrq, STAMTYPE_COUNTER,  "/PDM/APIC/Masked/ActiveIRQ",  STAMUNIT_OCCURENCES, "Number of cleared irqs.");
 #endif