Changeset 2937 in vbox for trunk/src/VBox/Devices/Network
- Timestamp:
- May 30, 2007 4:27:55 PM (18 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Network/DevPCNet.cpp
r2912 r2937 539 539 *******************************************************************************/ 540 540 #define PRINT_TMD(T) Log2(( \ 541 "TMD0 : TBADR= 0x%08x\n" \541 "TMD0 : TBADR=%#010x\n" \ 542 542 "TMD1 : OWN=%d, ERR=%d, FCS=%d, LTI=%d, " \ 543 543 "ONE=%d, DEF=%d, STP=%d, ENP=%d,\n" \ … … 556 556 557 557 #define PRINT_RMD(R) Log2(( \ 558 "RMD0 : RBADR= 0x%08x\n" \558 "RMD0 : RBADR=%#010x\n" \ 559 559 "RMD1 : OWN=%d, ERR=%d, FRAM=%d, OFLO=%d, " \ 560 560 "CRC=%d, BUFF=%d, STP=%d, ENP=%d,\n " \ … … 785 785 Log(("packet dhost=%02x:%02x:%02x:%02x:%02x:%02x, " \ 786 786 "shost=%02x:%02x:%02x:%02x:%02x:%02x, " \ 787 "type= 0x%04x (bcast=%d)\n", \787 "type=%#06x (bcast=%d)\n", \ 788 788 hdr->ether_dhost[0],hdr->ether_dhost[1],hdr->ether_dhost[2], \ 789 789 hdr->ether_dhost[3],hdr->ether_dhost[4],hdr->ether_dhost[5], \ … … 1026 1026 PCNetState *pData = (PCNetState *)pvUser; 1027 1027 1028 Log(("#%d pcnetHandleRingWriteGC: write to % 08x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, GCPhysFault));1028 Log(("#%d pcnetHandleRingWriteGC: write to %#010x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, GCPhysFault)); 1029 1029 1030 1030 uint32_t cb; … … 1087 1087 PCNetState *pData = PDMINS2DATA(pDevIns, PCNetState *); 1088 1088 1089 Log(("#%d pcnetHandleRingWrite: write to % 08x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, GCPhys));1089 Log(("#%d pcnetHandleRingWrite: write to %#010x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, GCPhys)); 1090 1090 #ifdef VBOX_WITH_STATISTICS 1091 1091 STAM_COUNTER_INC(&CTXSUFF(pData->StatRingWrite)); … … 1257 1257 int rc; 1258 1258 1259 Log(("pcnetUpdateRingHandlers TD %VGp size % x -> %VGp size %x\n", pData->TDRAPhysOld, pData->cbTDRAOld, pData->GCTDRA, pcnetTdraAddr(pData, 0)));1260 Log(("pcnetUpdateRingHandlers RX %VGp size % x -> %VGp size %x\n", pData->RDRAPhysOld, pData->cbRDRAOld, pData->GCRDRA, pcnetRdraAddr(pData, 0)));1259 Log(("pcnetUpdateRingHandlers TD %VGp size %#x -> %VGp size %#x\n", pData->TDRAPhysOld, pData->cbTDRAOld, pData->GCTDRA, pcnetTdraAddr(pData, 0))); 1260 Log(("pcnetUpdateRingHandlers RX %VGp size %#x -> %VGp size %#x\n", pData->RDRAPhysOld, pData->cbRDRAOld, pData->GCRDRA, pcnetRdraAddr(pData, 0))); 1261 1261 1262 1262 /** @todo unregister order not correct! */ … … 1343 1343 { 1344 1344 PPDMDEVINS pDevIns = PCNETSTATE_2_DEVINS(pData); 1345 Log(("#%d pcnetInit: init_addr= 0x%08x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,1345 Log(("#%d pcnetInit: init_addr=%#010x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, 1346 1346 PHYSADDR(pData, CSR_IADR(pData)))); 1347 1347 … … 1371 1371 pData->GCUpperPhys = 0; 1372 1372 PCNET_INIT(); 1373 Log(("#%d initblk.rlen= 0x%02x, initblk.tlen=0x%02x\n",1373 Log(("#%d initblk.rlen=%#04x, initblk.tlen=%#04x\n", 1374 1374 PCNETSTATE_2_DEVINS(pData)->iInstance, initblk.rlen, initblk.tlen)); 1375 1375 } … … 1379 1379 pData->GCUpperPhys = (0xff00 & (uint32_t)pData->aCSR[2]) << 16; 1380 1380 PCNET_INIT(); 1381 Log(("#%d initblk.rlen= 0x%02x, initblk.tlen=0x%02x\n",1381 Log(("#%d initblk.rlen=%#04x, initblk.tlen=%#04x\n", 1382 1382 PCNETSTATE_2_DEVINS(pData)->iInstance, initblk.rlen, initblk.tlen)); 1383 1383 } … … 1399 1399 CSR_CXST(pData) = CSR_CXBC(pData) = CSR_NXST(pData) = CSR_NXBC(pData) = 0; 1400 1400 1401 LogRel(("PCNet#%d: Init: ss32=%d GCRDRA= 0x%08x[%d] GCTDRA=0x%08x[%d]\n",1401 LogRel(("PCNet#%d: Init: ss32=%d GCRDRA=%#010x[%d] GCTDRA=%#010x[%d]\n", 1402 1402 PCNETSTATE_2_DEVINS(pData)->iInstance, BCR_SSIZE32(pData), 1403 1403 pData->GCRDRA, CSR_RCVRL(pData), pData->GCTDRA, CSR_XMTRL(pData))); … … 1498 1498 STAM_PROFILE_ADV_STOP(&pData->CTXSUFF(StatRdtePoll), a); 1499 1499 /* This is not problematic since we don't own the descriptor */ 1500 LogRel(("PCNet#%d: BAD RMD ENTRIES AT 0x%08x (i=%d)\n",1500 LogRel(("PCNet#%d: BAD RMD ENTRIES AT %#010x (i=%d)\n", 1501 1501 PCNETSTATE_2_DEVINS(pData)->iInstance, addr, i)); 1502 1502 return; … … 1529 1529 STAM_PROFILE_ADV_STOP(&pData->CTXSUFF(StatRdtePoll), a); 1530 1530 /* This is not problematic since we don't own the descriptor */ 1531 LogRel(("PCNet#%d: BAD RMD ENTRIES + AT 0x%08x (i=%d)\n",1531 LogRel(("PCNet#%d: BAD RMD ENTRIES + AT %#010x (i=%d)\n", 1532 1532 PCNETSTATE_2_DEVINS(pData)->iInstance, addr, i)); 1533 1533 return; … … 1568 1568 { 1569 1569 STAM_PROFILE_ADV_STOP(&pData->CTXSUFF(StatTdtePoll), a); 1570 LogRel(("PCNet#%d: BAD TMD XDA= 0x%08x\n",1570 LogRel(("PCNet#%d: BAD TMD XDA=%#010x\n", 1571 1571 PCNETSTATE_2_DEVINS(pData)->iInstance, PHYSADDR(pData, cxda))); 1572 1572 return 0; … … 1663 1663 RMD rmd; 1664 1664 pcnetRmdLoad(pData, &rmd, PHYSADDR(pData, GCPhys)); 1665 LogRel((" % 08x\n", rmd.rmd1));1665 LogRel((" %#010x\n", rmd.rmd1)); 1666 1666 GCPhys += cb; 1667 1667 } … … 1761 1761 pData->aCSR[0] |= 0x0400; 1762 1762 1763 Log(("#%d RCVRC=%d CRDA= 0x%08x BLKS=%d\n", PCNETSTATE_2_DEVINS(pData)->iInstance,1763 Log(("#%d RCVRC=%d CRDA=%#010x BLKS=%d\n", PCNETSTATE_2_DEVINS(pData)->iInstance, 1764 1764 CSR_RCVRC(pData), PHYSADDR(pData, CSR_CRDA(pData)), pktcount)); 1765 1765 #ifdef PCNET_DEBUG_RMD … … 2023 2023 2024 2024 #ifdef PCNET_DEBUG_TMD 2025 Log2(("#%d TMDLOAD 0x%08x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, PHYSADDR(pData, CSR_CXDA(pData))));2025 Log2(("#%d TMDLOAD %#010x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, PHYSADDR(pData, CSR_CXDA(pData)))); 2026 2026 PRINT_TMD(&tmd); 2027 2027 #endif … … 2281 2281 #ifdef LOG_ENABLED 2282 2282 TMD dummy; 2283 Log2(("#%d pcnetPollTimer time=% 08x TDMD=%d TXON=%d POLL=%d TDTE=%d TDRA=%x\n",2283 Log2(("#%d pcnetPollTimer time=%#010x TDMD=%d TXON=%d POLL=%d TDTE=%d TDRA=%#x\n", 2284 2284 PCNETSTATE_2_DEVINS(pData)->iInstance, RTTimeMilliTS(), CSR_TDMD(pData), CSR_TXON(pData), 2285 2285 !CSR_DPOLL(pData), pcnetTdtePoll(pData, &dummy), pData->GCTDRA)); 2286 Log2(("#%d pcnetPollTimer: CSR_CXDA=% x CSR_XMTRL=%d CSR_XMTRC=%d\n",2286 Log2(("#%d pcnetPollTimer: CSR_CXDA=%#x CSR_XMTRL=%d CSR_XMTRC=%d\n", 2287 2287 PCNETSTATE_2_DEVINS(pData)->iInstance, CSR_CXDA(pData), CSR_XMTRL(pData), CSR_XMTRC(pData))); 2288 2288 #endif … … 2292 2292 TMD tmd; 2293 2293 pcnetTmdLoad(pData, &tmd, PHYSADDR(pData, CSR_CXDA(pData))); 2294 Log2(("#%d pcnetPollTimer: TMDLOAD 0x%08x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, PHYSADDR(pData, CSR_CXDA(pData))));2294 Log2(("#%d pcnetPollTimer: TMDLOAD %#010x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, PHYSADDR(pData, CSR_CXDA(pData)))); 2295 2295 PRINT_TMD(&tmd); 2296 2296 } … … 2333 2333 int rc = VINF_SUCCESS; 2334 2334 #ifdef PCNET_DEBUG_CSR 2335 Log(("#%d pcnetCSRWriteU16: rap=%d val= 0x%04x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val));2335 Log(("#%d pcnetCSRWriteU16: rap=%d val=%#06x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val)); 2336 2336 #endif 2337 2337 switch (u32RAP) … … 2357 2357 } 2358 2358 #endif 2359 LOG_REGISTER(("PCNet#%d: WRITE CSR%d, % 04x => %04x (%04x)\n",2359 LOG_REGISTER(("PCNet#%d: WRITE CSR%d, %#06x => %#06x (%#06x)\n", 2360 2360 PCNETSTATE_2_DEVINS(pData)->iInstance, 2361 2361 u32RAP, new_value, csr0, pData->aCSR[0])); … … 2426 2426 if (CSR_STOP(pData) || CSR_SPND(pData)) 2427 2427 break; 2428 LOG_REGISTER(("PCNet#%d: WRITE CSR%d, % 04x\n",2428 LOG_REGISTER(("PCNet#%d: WRITE CSR%d, %#06x\n", 2429 2429 PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val)); 2430 2430 return rc; 2431 2431 case 3: /* Interrupt Mask and Deferral Control */ 2432 LOG_REGISTER(("PCNet#%d: WRITE CSR%d, % 04x\n",2432 LOG_REGISTER(("PCNet#%d: WRITE CSR%d, %#06x\n", 2433 2433 PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val)); 2434 2434 break; 2435 2435 case 4: /* Test and Features Control */ 2436 LOG_REGISTER(("PCNet#%d: WRITE CSR%d, % 04x\n",2436 LOG_REGISTER(("PCNet#%d: WRITE CSR%d, %#06x\n", 2437 2437 PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val)); 2438 2438 pData->aCSR[4] &= ~(val & 0x026a); … … 2441 2441 break; 2442 2442 case 5: /* Extended Control and Interrupt 1 */ 2443 LOG_REGISTER(("PCNet#%d: WRITE CSR%d, % 04x\n",2443 LOG_REGISTER(("PCNet#%d: WRITE CSR%d, %#06x\n", 2444 2444 PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val)); 2445 2445 pData->aCSR[5] &= ~(val & 0x0a90); … … 2465 2465 return pcnetCSRWriteU16(pData, 2, val); 2466 2466 case 58: /* Software Style */ 2467 LOG_REGISTER(("PCNet#%d: WRITE SW_STYLE, % 04x\n",2467 LOG_REGISTER(("PCNet#%d: WRITE SW_STYLE, %#06x\n", 2468 2468 PCNETSTATE_2_DEVINS(pData)->iInstance, val)); 2469 2469 rc = pcnetBCRWriteU16(pData, BCR_SWS, val); … … 2500 2500 default: 2501 2501 val = pData->aCSR[u32RAP]; 2502 LOG_REGISTER(("PCNet#%d: read CSR%d => % 04x\n",2502 LOG_REGISTER(("PCNet#%d: read CSR%d => %#06x\n", 2503 2503 PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val)); 2504 2504 } 2505 2505 #ifdef PCNET_DEBUG_CSR 2506 Log(("#%d pcnetCSRReadU16: u32RAP=%d val= 0x%04x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,2506 Log(("#%d pcnetCSRReadU16: u32RAP=%d val=%#06x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, 2507 2507 u32RAP, val)); 2508 2508 #endif … … 2515 2515 u32RAP &= 0x7f; 2516 2516 #ifdef PCNET_DEBUG_BCR 2517 Log2(("#%d pcnetBCRWriteU16: u32RAP=%d val= 0x%04x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,2517 Log2(("#%d pcnetBCRWriteU16: u32RAP=%d val=%#06x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, 2518 2518 u32RAP, val)); 2519 2519 #endif … … 2527 2527 { 2528 2528 default: 2529 Log(("Bad SWSTYLE= 0x%02x\n", val & 0xff));2529 Log(("Bad SWSTYLE=%#04x\n", val & 0xff)); 2530 2530 // fall through 2531 2531 case 0: … … 2546 2546 break; 2547 2547 } 2548 LOG_REGISTER(("PCNet#%d: WRITE SW_STYLE, % 04x\n",2548 LOG_REGISTER(("PCNet#%d: WRITE SW_STYLE, %#06x\n", 2549 2549 PCNETSTATE_2_DEVINS(pData)->iInstance, val)); 2550 Log(("BCR_SWS= 0x%04x\n", val));2550 Log(("BCR_SWS=%#06x\n", val)); 2551 2551 pData->aCSR[58] = val; 2552 2552 /* fall through */ … … 2561 2561 case BCR_PLAT: 2562 2562 case BCR_MIIADDR: 2563 LOG_REGISTER(("PCNet#%d: WRITE BCR%d, % 04x\n",2563 LOG_REGISTER(("PCNet#%d: WRITE BCR%d, %#06x\n", 2564 2564 PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val)); 2565 2565 pData->aBCR[u32RAP] = val; … … 2567 2567 2568 2568 case BCR_MIIMDR: 2569 LOG_REGISTER(("PCNet#%d: WRITE MII%d, % 04x\n",2569 LOG_REGISTER(("PCNet#%d: WRITE MII%d, %#06x\n", 2570 2570 PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val)); 2571 2571 pData->aMII[pData->aBCR[BCR_MIIADDR] & 0x1f] = val; … … 2698 2698 } 2699 2699 #ifdef PCNET_DEBUG_BCR 2700 Log2(("#%d pcnetBCRReadU16: u32RAP=%d val= 0x%04x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,2700 Log2(("#%d pcnetBCRReadU16: u32RAP=%d val=%#06x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, 2701 2701 u32RAP, val)); 2702 2702 #endif … … 2743 2743 addr &= 0x0f; 2744 2744 val &= 0xff; 2745 Log(("#%d pcnetAPROMWriteU8: addr= 0x%08x val=0x%02x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,2745 Log(("#%d pcnetAPROMWriteU8: addr=%#010x val=%#04x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, 2746 2746 addr, val)); 2747 2747 /* Check APROMWE bit to enable write access */ … … 2753 2753 { 2754 2754 uint32_t val = pData->aPROM[addr &= 0x0f]; 2755 Log(("#%d pcnetAPROMReadU8: addr= 0x%08x val=0x%02x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,2755 Log(("#%d pcnetAPROMReadU8: addr=%#010x val=%#04x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, 2756 2756 addr, val)); 2757 2757 return val; … … 2763 2763 2764 2764 #ifdef PCNET_DEBUG_IO 2765 Log2(("#%d pcnetIoportWriteU16: addr= 0x%08x val=0x%04x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,2765 Log2(("#%d pcnetIoportWriteU16: addr=%#010x val=%#06x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, 2766 2766 addr, val)); 2767 2767 #endif … … 2823 2823 skip_update_irq: 2824 2824 #ifdef PCNET_DEBUG_IO 2825 Log2(("#%d pcnetIoportReadU16: addr= 0x%08x val=0x%04x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,2825 Log2(("#%d pcnetIoportReadU16: addr=%#010x val=%#06x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, 2826 2826 addr, val & 0xffff)); 2827 2827 #endif … … 2834 2834 2835 2835 #ifdef PCNET_DEBUG_IO 2836 Log2(("#%d pcnetIoportWriteU32: addr= 0x%08x val=0x%08x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,2836 Log2(("#%d pcnetIoportWriteU32: addr=%#010x val=%#010x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, 2837 2837 addr, val)); 2838 2838 #endif … … 2902 2902 skip_update_irq: 2903 2903 #ifdef PCNET_DEBUG_IO 2904 Log2(("#%d pcnetIoportReadU32: addr= 0x%08x val=0x%08x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,2904 Log2(("#%d pcnetIoportReadU32: addr=%#010x val=%#010x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, 2905 2905 addr, val)); 2906 2906 #endif … … 2911 2911 { 2912 2912 #ifdef PCNET_DEBUG_IO 2913 Log2(("#%d pcnetMMIOWriteU8: addr= 0x%08x val=0x%02x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,2913 Log2(("#%d pcnetMMIOWriteU8: addr=%#010x val=%#04x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, 2914 2914 addr, val)); 2915 2915 #endif … … 2924 2924 val = pcnetAPROMReadU8(pData, addr); 2925 2925 #ifdef PCNET_DEBUG_IO 2926 Log2(("#%d pcnetMMIOReadU8: addr= 0x%08x val=0x%02x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,2926 Log2(("#%d pcnetMMIOReadU8: addr=%#010x val=%#04x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, 2927 2927 addr, val & 0xff)); 2928 2928 #endif … … 2933 2933 { 2934 2934 #ifdef PCNET_DEBUG_IO 2935 Log2(("#%d pcnetMMIOWriteU16: addr= 0x%08x val=0x%04x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,2935 Log2(("#%d pcnetMMIOWriteU16: addr=%#010x val=%#06x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, 2936 2936 addr, val)); 2937 2937 #endif … … 2959 2959 } 2960 2960 #ifdef PCNET_DEBUG_IO 2961 Log2(("#%d pcnetMMIOReadU16: addr= 0x%08x val = 0x%04x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,2961 Log2(("#%d pcnetMMIOReadU16: addr=%#010x val = %#06x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, 2962 2962 addr, val & 0xffff)); 2963 2963 #endif … … 2968 2968 { 2969 2969 #ifdef PCNET_DEBUG_IO 2970 Log2(("#%d pcnetMMIOWriteU32: addr= 0x%08x val=0x%08x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,2970 Log2(("#%d pcnetMMIOWriteU32: addr=%#010x val=%#010x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, 2971 2971 addr, val)); 2972 2972 #endif … … 3000 3000 } 3001 3001 #ifdef PCNET_DEBUG_IO 3002 Log2(("#%d pcnetMMIOReadU32: addr= 0x%08x val=0x%08x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,3002 Log2(("#%d pcnetMMIOReadU32: addr=%#010x val=%#010x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, 3003 3003 addr, val)); 3004 3004 #endif … … 3444 3444 3445 3445 pHlp->pfnPrintf(pHlp, 3446 "CSR0=% 04RX32:\n",3446 "CSR0=%#06x:\n", 3447 3447 pData->aCSR[0]); 3448 3448 3449 3449 pHlp->pfnPrintf(pHlp, 3450 "CSR1=% 04RX32:\n",3450 "CSR1=%#06x:\n", 3451 3451 pData->aCSR[1]); 3452 3452 3453 3453 pHlp->pfnPrintf(pHlp, 3454 "CSR2=% 04RX32:\n",3454 "CSR2=%#06x:\n", 3455 3455 pData->aCSR[2]); 3456 3456 3457 3457 pHlp->pfnPrintf(pHlp, 3458 "CSR3=% 04RX32: BSWP=%d EMBA=%d DXMT2PD=%d LAPPEN=%d DXSUFLO=%d IDONM=%d TINTM=%d RINTM=%d MERRM=%d MISSM=%d BABLM=%d\n",3458 "CSR3=%#06x: BSWP=%d EMBA=%d DXMT2PD=%d LAPPEN=%d DXSUFLO=%d IDONM=%d TINTM=%d RINTM=%d MERRM=%d MISSM=%d BABLM=%d\n", 3459 3459 pData->aCSR[3], 3460 3460 !!(pData->aCSR[3] & BIT(2)), !!(pData->aCSR[3] & BIT(3)), !!(pData->aCSR[3] & BIT(4)), CSR_LAPPEN(pData), … … 3463 3463 3464 3464 pHlp->pfnPrintf(pHlp, 3465 "CSR4=% 04RX32: JABM=%d JAB=%d TXSTRM=%d TXSTRT=%d RCVCOOM=%d RCVCCO=%d UINT=%d UINTCMD=%d\n"3466 " MFCOM=%d MFCO=%d ASTRP_RCV=%d APAD_XMT=%d DPOLL=%d TIMER=%d EMAPLUS=%d EN124=%d\n",3465 "CSR4=%#06x: JABM=%d JAB=%d TXSTRM=%d TXSTRT=%d RCVCOOM=%d RCVCCO=%d UINT=%d UINTCMD=%d\n" 3466 " MFCOM=%d MFCO=%d ASTRP_RCV=%d APAD_XMT=%d DPOLL=%d TIMER=%d EMAPLUS=%d EN124=%d\n", 3467 3467 pData->aCSR[4], 3468 3468 !!(pData->aCSR[4] & BIT( 0)), !!(pData->aCSR[4] & BIT( 1)), !!(pData->aCSR[4] & BIT( 2)), !!(pData->aCSR[4] & BIT( 3)), … … 3472 3472 3473 3473 pHlp->pfnPrintf(pHlp, 3474 "CSR5=% 04RX32:\n",3474 "CSR5=%#06x:\n", 3475 3475 pData->aCSR[5]); 3476 3476 3477 3477 pHlp->pfnPrintf(pHlp, 3478 "CSR6=% 04RX32: RLEN=%03x* TLEN=%03x* [* encoded]\n",3478 "CSR6=%#06x: RLEN=%#x* TLEN=%#x* [* encoded]\n", 3479 3479 pData->aCSR[6], 3480 3480 (pData->aCSR[6] >> 8) & 0xf, (pData->aCSR[6] >> 12) & 0xf); 3481 3481 3482 3482 pHlp->pfnPrintf(pHlp, 3483 "CSR8..11=% 04RX32,%04RX32,%04RX32,%04RX32: LADRF=%016RX64\n",3483 "CSR8..11=%#06x,%#06x,%#06x,%#06x: LADRF=%#018llx\n", 3484 3484 pData->aCSR[8], pData->aCSR[9], pData->aCSR[10], pData->aCSR[11], 3485 3485 (uint64_t)(pData->aCSR[ 8] & 0xffff) … … 3489 3489 3490 3490 pHlp->pfnPrintf(pHlp, 3491 "CSR12..14=% 04RX32,%04RX32,%04RX32: PADR=%02x %02x %02x %02x %02x%02x (Current MAC Address)\n",3491 "CSR12..14=%#06x,%#06x,%#06x: PADR=%02x:%02x:%02x:%02x:%02x:%02x (Current MAC Address)\n", 3492 3492 pData->aCSR[12], pData->aCSR[13], pData->aCSR[14], 3493 3493 pData->aCSR[12] & 0xff, … … 3499 3499 3500 3500 pHlp->pfnPrintf(pHlp, 3501 "CSR15=% 04RX32: DXR=%d DTX=%d LOOP=%d DXMTFCS=%d FCOLL=%d DRTY=%d INTL=%d PORTSEL=%d LTR=%d\n"3502 " MENDECL=%d DAPC=%d DLNKTST=%d DRCVPV=%d DRCVBC=%d PROM=%d\n",3501 "CSR15=%#06x: DXR=%d DTX=%d LOOP=%d DXMTFCS=%d FCOLL=%d DRTY=%d INTL=%d PORTSEL=%d LTR=%d\n" 3502 " MENDECL=%d DAPC=%d DLNKTST=%d DRCVPV=%d DRCVBC=%d PROM=%d\n", 3503 3503 pData->aCSR[15], 3504 3504 !!(pData->aCSR[15] & BIT( 0)), !!(pData->aCSR[15] & BIT( 1)), !!(pData->aCSR[15] & BIT( 2)), !!(pData->aCSR[15] & BIT( 3)), … … 3508 3508 3509 3509 pHlp->pfnPrintf(pHlp, 3510 "CSR46=% 04RX32: POLL=%04x (Poll Time Counter)\n",3510 "CSR46=%#06x: POLL=%#06x (Poll Time Counter)\n", 3511 3511 pData->aCSR[46], pData->aCSR[46] & 0xffff); 3512 3512 3513 3513 pHlp->pfnPrintf(pHlp, 3514 "CSR47=% 04RX32: POLLINT=%04x (Poll Time Interval)\n",3514 "CSR47=%#06x: POLLINT=%#06x (Poll Time Interval)\n", 3515 3515 pData->aCSR[47], pData->aCSR[47] & 0xffff); 3516 3516 3517 3517 pHlp->pfnPrintf(pHlp, 3518 "CSR58=% 04RX32: SWSTYLE=%02x%s SSIZE32=%d CSRPCNET=%d APERRENT=%d\n",3518 "CSR58=%#06x: SWSTYLE=%d %s SSIZE32=%d CSRPCNET=%d APERRENT=%d\n", 3519 3519 pData->aCSR[58], 3520 3520 pData->aCSR[58] & 0x7f, … … 3564 3564 "%04x %RGp:%c%c RBADR=%08RX32 BCNT=%03x MCNT=%03x " 3565 3565 "OWN=%d ERR=%d FRAM=%d OFLO=%d CRC=%d BUFF=%d STP=%d ENP=%d BPE=%d " 3566 "PAM=%d LAFM=%d BAM=%d RCC=%02x RPC=%02x ONES=% x ZEROS=%d\n",3566 "PAM=%d LAFM=%d BAM=%d RCC=%02x RPC=%02x ONES=%#x ZEROS=%d\n", 3567 3567 i, GCPhys, i + 1 == CSR_RCVRC(pData) ? '*' : ' ', GCPhys == CSR_CRDA(pData) ? '*' : ' ', 3568 3568 rmd.rmd0.rbadr, 4096 - rmd.rmd1.bcnt, rmd.rmd2.mcnt, … … 3604 3604 "%04x %RGp:%c%c TBADR=%08RX32 BCNT=%03x OWN=%d " 3605 3605 "ERR=%d NOFCS=%d LTINT=%d ONE=%d DEF=%d STP=%d ENP=%d BPE=%d " 3606 "BUFF=%d UFLO=%d EXDEF=%d LCOL=%d LCAR=%d RTRY=%d TDR=%03x TRC=% x ONES=%x\n"3606 "BUFF=%d UFLO=%d EXDEF=%d LCOL=%d LCAR=%d RTRY=%d TDR=%03x TRC=%#x ONES=%#x\n" 3607 3607 , 3608 3608 i, GCPhys, i + 1 == CSR_XMTRC(pData) ? '*' : ' ', GCPhys == CSR_CXDA(pData) ? '*' : ' ',
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