Changeset 30263 in vbox for trunk/include

Timestamp:

Jun 16, 2010 6:31:42 PM (15 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

62771

Message:

VMM,REM: Only invalidate hidden registers when using raw-mode. Fixes save restore during mode switching code like the windows boot menu. (#5057)

Location:

trunk/include/VBox

Files:

• cpum.h (modified) (3 diffs)
• selm.h (modified) (1 diff)

trunk/include/VBox/cpum.h

@@ -878 +878 @@
 VMMDECL(PCCPUMCTXCORE)  CPUMGetGuestCtxCore(PVMCPU pVCpu);
 VMMDECL(void)           CPUMSetGuestCtxCore(PVMCPU pVCpu, PCCPUMCTXCORE pCtxCore);
-VMMDECL(int)            CPUMRawEnter(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore);
-VMMDECL(int)            CPUMRawLeave(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, int rc);
+VMMR3DECL(int)          CPUMR3RawEnter(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore);
+VMMR3DECL(int)          CPUMR3RawLeave(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, int rc);
 VMMDECL(uint32_t)       CPUMRawGetEFlags(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore);
 VMMDECL(void)           CPUMRawSetEFlags(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, uint32_t eflags);
@@ -890 +890 @@
  * @{
  */
-#define CPUM_CHANGED_FPU_REM            RT_BIT(0)
-#define CPUM_CHANGED_CR0                RT_BIT(1)
-#define CPUM_CHANGED_CR4                RT_BIT(2)
-#define CPUM_CHANGED_GLOBAL_TLB_FLUSH   RT_BIT(3)
-#define CPUM_CHANGED_CR3                RT_BIT(4)
-#define CPUM_CHANGED_GDTR               RT_BIT(5)
-#define CPUM_CHANGED_IDTR               RT_BIT(6)
-#define CPUM_CHANGED_LDTR               RT_BIT(7)
-#define CPUM_CHANGED_TR                 RT_BIT(8)
-#define CPUM_CHANGED_SYSENTER_MSR       RT_BIT(9)
-#define CPUM_CHANGED_HIDDEN_SEL_REGS    RT_BIT(10)
-#define CPUM_CHANGED_CPUID              RT_BIT(11)
-#define CPUM_CHANGED_ALL                (CPUM_CHANGED_FPU_REM|CPUM_CHANGED_CR0|CPUM_CHANGED_CR3|CPUM_CHANGED_CR4|CPUM_CHANGED_GDTR|CPUM_CHANGED_IDTR|CPUM_CHANGED_LDTR|CPUM_CHANGED_TR|CPUM_CHANGED_SYSENTER_MSR|CPUM_CHANGED_HIDDEN_SEL_REGS|CPUM_CHANGED_CPUID)
+#define CPUM_CHANGED_FPU_REM                    RT_BIT(0)
+#define CPUM_CHANGED_CR0                        RT_BIT(1)
+#define CPUM_CHANGED_CR4                        RT_BIT(2)
+#define CPUM_CHANGED_GLOBAL_TLB_FLUSH           RT_BIT(3)
+#define CPUM_CHANGED_CR3                        RT_BIT(4)
+#define CPUM_CHANGED_GDTR                       RT_BIT(5)
+#define CPUM_CHANGED_IDTR                       RT_BIT(6)
+#define CPUM_CHANGED_LDTR                       RT_BIT(7)
+#define CPUM_CHANGED_TR                         RT_BIT(8)
+#define CPUM_CHANGED_SYSENTER_MSR               RT_BIT(9)
+#define CPUM_CHANGED_HIDDEN_SEL_REGS            RT_BIT(10)
+#define CPUM_CHANGED_CPUID                      RT_BIT(11)
+#define CPUM_CHANGED_ALL                        \
+    ( CPUM_CHANGED_FPU_REM | CPUM_CHANGED_CR0 | CPUM_CHANGED_CR3 | CPUM_CHANGED_CR4 | CPUM_CHANGED_GDTR | CPUM_CHANGED_IDTR \
+     | CPUM_CHANGED_LDTR | CPUM_CHANGED_TR | CPUM_CHANGED_SYSENTER_MSR | CPUM_CHANGED_HIDDEN_SEL_REGS | CPUM_CHANGED_CPUID )
+/** This one is used by raw-mode to indicate that the hidden register
+ * information is not longer reliable and have to be re-determined.
+ *
+ * @remarks This must not be part of CPUM_CHANGED_ALL! */
+#define CPUM_CHANGED_HIDDEN_SEL_REGS_INVALID    RT_BIT(12)
 /** @} */
 
-VMMDECL(unsigned)       CPUMGetAndClearChangedFlagsREM(PVMCPU pVCpu);
 VMMDECL(void)           CPUMSetChangedFlags(PVMCPU pVCpu, uint32_t fChangedFlags);
+VMMR3DECL(uint32_t)     CPUMR3RemEnter(PVMCPU pVCpu, uint32_t *puCpl);
+VMMR3DECL(void)         CPUMR3RemLeave(PVMCPU pVCpu, bool fNoOutOfSyncSels);
 VMMDECL(bool)           CPUMSupportsFXSR(PVM pVM);
 VMMDECL(bool)           CPUMIsHostUsingSysEnter(PVM pVM);
@@ -917 +925 @@
 VMMDECL(void)           CPUMDeactivateHyperDebugState(PVMCPU pVCpu);
 VMMDECL(uint32_t)       CPUMGetGuestCPL(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore);
-VMMDECL(bool)           CPUMAreHiddenSelRegsValid(PVM pVM);
+VMMDECL(bool)           CPUMAreHiddenSelRegsValid(PVMCPU pVCpu);
 VMMDECL(CPUMMODE)       CPUMGetGuestMode(PVMCPU pVCpu);
 

trunk/include/VBox/selm.h

@@ -76 +76 @@
 
 VMMDECL(int)        SELMToFlatEx(PVM pVM, DIS_SELREG SelReg, PCCPUMCTXCORE pCtxCore, RTGCPTR Addr, unsigned fFlags, PRTGCPTR ppvGC);
-VMMDECL(int)        SELMToFlatBySelEx(PVM pVM, X86EFLAGS eflags, RTSEL Sel, RTGCPTR Addr, PCPUMSELREGHID pHiddenSel, unsigned fFlags, PRTGCPTR ppvGC, uint32_t *pcb);
-VMMDECL(int)        SELMValidateAndConvertCSAddr(PVM pVM, X86EFLAGS eflags, RTSEL SelCPL, RTSEL SelCS, PCPUMSELREGHID pHiddenCSSel, RTGCPTR Addr, PRTGCPTR ppvFlat);
-VMMDECL(int)        SELMValidateAndConvertCSAddrGCTrap(PVM pVM, X86EFLAGS eflags, RTSEL SelCPL, RTSEL SelCS, RTGCPTR Addr, PRTGCPTR ppvFlat, uint32_t *pcBits);
-VMMDECL(DISCPUMODE) SELMGetCpuModeFromSelector(PVM pVM, X86EFLAGS eflags, RTSEL Sel, PCPUMSELREGHID pHiddenSel);
+VMMDECL(int)        SELMToFlatBySelEx(PVM pVM, X86EFLAGS eflags, RTSEL Sel, RTGCPTR Addr, PCCPUMSELREGHID pHiddenSel,
+                                      unsigned fFlags, PRTGCPTR ppvGC, uint32_t *pcb);
+VMMDECL(int)        SELMValidateAndConvertCSAddr(PVM pVM, X86EFLAGS eflags, RTSEL SelCPL, RTSEL SelCS,
+                                                 PCCPUMSELREGHID pHiddenCSSel, RTGCPTR Addr, PRTGCPTR ppvFlat);
+VMMDECL(int)        SELMValidateAndConvertCSAddrGCTrap(PVM pVM, X86EFLAGS eflags, RTSEL SelCPL, RTSEL SelCS, RTGCPTR Addr,
+                                                       PRTGCPTR ppvFlat, uint32_t *pcBits);
+VMMDECL(DISCPUMODE) SELMGetCpuModeFromSelector(PVM pVM, X86EFLAGS eflags, RTSEL Sel, PCCPUMSELREGHID pHiddenSel);
 VMMDECL(int)        SELMGetLDTFromSel(PVM pVM, RTSEL SelLdt, PRTGCPTR ppvLdt, unsigned *pcbLimit);