- Timestamp:
- Jun 27, 2010 7:43:20 PM (15 years ago)
- svn:sync-xref-src-repo-rev:
- 63124
- Location:
- trunk
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/dbgf.h
r30060 r30453 857 857 /** No address in the output. */ 858 858 #define DBGF_DISAS_FLAGS_NO_ADDRESS RT_BIT(5) 859 /** Disassemble in the default mode of the specific context. */ 860 #define DBGF_DISAS_FLAGS_DEFAULT_MODE UINT32_C(0x00000000) 861 /** Disassemble in 16-bit mode. */ 862 #define DBGF_DISAS_FLAGS_16BIT_MODE UINT32_C(0x10000000) 863 /** Disassemble in 16-bit mode with real mode address translation. */ 864 #define DBGF_DISAS_FLAGS_16BIT_REAL_MODE UINT32_C(0x20000000) 865 /** Disassemble in 32-bit mode. */ 866 #define DBGF_DISAS_FLAGS_32BIT_MODE UINT32_C(0x30000000) 867 /** Disassemble in 64-bit mode. */ 868 #define DBGF_DISAS_FLAGS_64BIT_MODE UINT32_C(0x40000000) 869 /** The dissassembly mode mask. */ 870 #define DBGF_DISAS_FLAGS_MODE_MASK UINT32_C(0x70000000) 871 /** Mask containing the valid flags. */ 872 #define DBGF_DISAS_FLAGS_VALID_MASK UINT32_C(0x7000003f) 859 873 /** @} */ 860 874 … … 862 876 #define DBGF_SEL_FLAT 1 863 877 864 VMMR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, VMCPUID idCpu, RTSEL Sel, RTGCPTR GCPtr, unsigned fFlags, char *pszOutput, uint32_t cchOutput, uint32_t *pcbInstr); 878 VMMR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, VMCPUID idCpu, RTSEL Sel, RTGCPTR GCPtr, uint32_t fFlags, 879 char *pszOutput, uint32_t cbOutput, uint32_t *pcbInstr); 865 880 VMMR3DECL(int) DBGFR3DisasInstrCurrent(PVMCPU pVCpu, char *pszOutput, uint32_t cbOutput); 866 881 VMMR3DECL(int) DBGFR3DisasInstrCurrentLogInternal(PVMCPU pVCpu, const char *pszPrefix); -
trunk/src/VBox/VMM/DBGFDisas.cpp
r30263 r30453 93 93 * @param pSelInfo The selector info. 94 94 * @param enmMode The guest paging mode. 95 * @param fFlags DBGF_DISAS_FLAGS_XXX. 95 96 * @param GCPtr The GC pointer (selector offset). 96 97 * @param pState The disas CPU state. 97 98 */ 98 static int dbgfR3DisasInstrFirst(PVM pVM, PVMCPU pVCpu, PDBGFSELINFO pSelInfo, PGMMODE enmMode, RTGCPTR GCPtr, PDBGFDISASSTATE pState) 99 static int dbgfR3DisasInstrFirst(PVM pVM, PVMCPU pVCpu, PDBGFSELINFO pSelInfo, PGMMODE enmMode, 100 RTGCPTR GCPtr, uint32_t fFlags, PDBGFDISASSTATE pState) 99 101 { 100 102 pState->GCPtrSegBase = pSelInfo->GCPtrBase; … … 111 113 pState->fLocked = false; 112 114 pState->f64Bits = enmMode >= PGMMODE_AMD64 && pSelInfo->u.Raw.Gen.u1Long; 115 116 DISCPUMODE enmCpuMode; 117 switch (fFlags & DBGF_DISAS_FLAGS_MODE_MASK) 118 { 119 case DBGF_DISAS_FLAGS_DEFAULT_MODE: 120 enmCpuMode = pState->f64Bits 121 ? CPUMODE_64BIT 122 : pSelInfo->u.Raw.Gen.u1DefBig 123 ? CPUMODE_32BIT 124 : CPUMODE_16BIT; 125 break; 126 case DBGF_DISAS_FLAGS_16BIT_MODE: 127 case DBGF_DISAS_FLAGS_16BIT_REAL_MODE: 128 enmCpuMode = CPUMODE_16BIT; 129 break; 130 case DBGF_DISAS_FLAGS_32BIT_MODE: 131 enmCpuMode = CPUMODE_32BIT; 132 break; 133 case DBGF_DISAS_FLAGS_64BIT_MODE: 134 enmCpuMode = CPUMODE_64BIT; 135 break; 136 } 137 113 138 uint32_t cbInstr; 114 139 int rc = DISCoreOneEx(GCPtr, 115 pState->f64Bits 116 ? CPUMODE_64BIT 117 : pSelInfo->u.Raw.Gen.u1DefBig 118 ? CPUMODE_32BIT 119 : CPUMODE_16BIT, 140 enmCpuMode, 120 141 dbgfR3DisasInstrRead, 121 142 &pState->Cpu, … … 302 323 * A combination of the DBGF_DISAS_FLAGS_* \#defines. 303 324 * @param pszOutput Output buffer. 304 * @param c chOutputSize of the output buffer.325 * @param cbOutput Size of the output buffer. 305 326 * @param pcbInstr Where to return the size of the instruction. 306 327 */ 307 328 static DECLCALLBACK(int) 308 dbgfR3DisasInstrExOnVCpu(PVM pVM, PVMCPU pVCpu, RTSEL Sel, PRTGCPTR pGCPtr, u nsignedfFlags,309 char *pszOutput, uint32_t c chOutput, uint32_t *pcbInstr)329 dbgfR3DisasInstrExOnVCpu(PVM pVM, PVMCPU pVCpu, RTSEL Sel, PRTGCPTR pGCPtr, uint32_t fFlags, 330 char *pszOutput, uint32_t cbOutput, uint32_t *pcbInstr) 310 331 { 311 332 VMCPU_ASSERT_EMT(pVCpu); … … 315 336 * Get the Sel and GCPtr if fFlags requests that. 316 337 */ 317 PCCPUMCTXCORE pCtxCore= NULL;318 CPUMSELREGHID *pHiddenSel = NULL;338 PCCPUMCTXCORE pCtxCore = NULL; 339 PCPUMSELREGHID pHiddenSel = NULL; 319 340 int rc; 320 341 if (fFlags & (DBGF_DISAS_FLAGS_CURRENT_GUEST | DBGF_DISAS_FLAGS_CURRENT_HYPER)) … … 334 355 * we recently visited REM, we'll not search for the selector there. 335 356 */ 336 DBGFSELINFO SelInfo;337 const PGMMODE enmMode= PGMGetGuestMode(pVCpu);338 bool fRealModeAddress = false;357 DBGFSELINFO SelInfo; 358 const PGMMODE enmMode = PGMGetGuestMode(pVCpu); 359 bool fRealModeAddress = false; 339 360 340 361 if ( pHiddenSel … … 352 373 353 374 SelInfo.u.Raw.au32[0] = 0; 354 SelInfo.u.Raw.au32[1] = 375 SelInfo.u.Raw.au32[1] = 0; 355 376 SelInfo.u.Raw.Gen.u16LimitLow = 0xffff; 356 377 SelInfo.u.Raw.Gen.u4LimitHigh = 0xf; … … 402 423 else if ( !(fFlags & DBGF_DISAS_FLAGS_CURRENT_HYPER) 403 424 && ( (pCtxCore && pCtxCore->eflags.Bits.u1VM) 404 || enmMode == PGMMODE_REAL) ) 425 || enmMode == PGMMODE_REAL 426 || (fFlags & DBGF_DISAS_FLAGS_MODE_MASK) == DBGF_DISAS_FLAGS_16BIT_REAL_MODE 427 ) 428 ) 405 429 { /* V86 mode or real mode - real mode addressing */ 406 430 SelInfo.Sel = Sel; … … 425 449 if (RT_FAILURE(rc)) 426 450 { 427 RTStrPrintf(pszOutput, c chOutput, "Sel=%04x -> %Rrc\n", Sel, rc);451 RTStrPrintf(pszOutput, cbOutput, "Sel=%04x -> %Rrc\n", Sel, rc); 428 452 return rc; 429 453 } … … 434 458 */ 435 459 DBGFDISASSTATE State; 436 rc = dbgfR3DisasInstrFirst(pVM, pVCpu, &SelInfo, enmMode, GCPtr, &State);460 rc = dbgfR3DisasInstrFirst(pVM, pVCpu, &SelInfo, enmMode, GCPtr, fFlags, &State); 437 461 if (RT_FAILURE(rc)) 438 462 { 439 RTStrPrintf(pszOutput, c chOutput, "Disas -> %Rrc\n", rc);463 RTStrPrintf(pszOutput, cbOutput, "Disas -> %Rrc\n", rc); 440 464 return rc; 441 465 } … … 456 480 { 457 481 if (fFlags & DBGF_DISAS_FLAGS_NO_ADDRESS) 458 RTStrPrintf(pszOutput, c chOutput, "%s", szBuf);482 RTStrPrintf(pszOutput, cbOutput, "%s", szBuf); 459 483 else if (fRealModeAddress) 460 RTStrPrintf(pszOutput, c chOutput, "%04x:%04x %s", Sel, (unsigned)GCPtr, szBuf);484 RTStrPrintf(pszOutput, cbOutput, "%04x:%04x %s", Sel, (unsigned)GCPtr, szBuf); 461 485 else if (Sel == DBGF_SEL_FLAT) 462 486 { 463 487 if (enmMode >= PGMMODE_AMD64) 464 RTStrPrintf(pszOutput, c chOutput, "%RGv %s", GCPtr, szBuf);488 RTStrPrintf(pszOutput, cbOutput, "%RGv %s", GCPtr, szBuf); 465 489 else 466 RTStrPrintf(pszOutput, c chOutput, "%08RX32 %s", (uint32_t)GCPtr, szBuf);490 RTStrPrintf(pszOutput, cbOutput, "%08RX32 %s", (uint32_t)GCPtr, szBuf); 467 491 } 468 492 else 469 493 { 470 494 if (enmMode >= PGMMODE_AMD64) 471 RTStrPrintf(pszOutput, c chOutput, "%04x:%RGv %s", Sel, GCPtr, szBuf);495 RTStrPrintf(pszOutput, cbOutput, "%04x:%RGv %s", Sel, GCPtr, szBuf); 472 496 else 473 RTStrPrintf(pszOutput, c chOutput, "%04x:%08RX32 %s", Sel, (uint32_t)GCPtr, szBuf);497 RTStrPrintf(pszOutput, cbOutput, "%04x:%08RX32 %s", Sel, (uint32_t)GCPtr, szBuf); 474 498 } 475 499 } … … 481 505 AssertRC(rc); 482 506 if (fFlags & DBGF_DISAS_FLAGS_NO_ADDRESS) 483 RTStrPrintf(pszOutput, c chOutput, "%.*Rhxs%*s %s",507 RTStrPrintf(pszOutput, cbOutput, "%.*Rhxs%*s %s", 484 508 cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "", 485 509 szBuf); 486 510 else if (fRealModeAddress) 487 RTStrPrintf(pszOutput, c chOutput, "%04x:%04x %.*Rhxs%*s %s",511 RTStrPrintf(pszOutput, cbOutput, "%04x:%04x %.*Rhxs%*s %s", 488 512 Sel, (unsigned)GCPtr, 489 513 cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "", … … 492 516 { 493 517 if (enmMode >= PGMMODE_AMD64) 494 RTStrPrintf(pszOutput, c chOutput, "%RGv %.*Rhxs%*s %s",518 RTStrPrintf(pszOutput, cbOutput, "%RGv %.*Rhxs%*s %s", 495 519 GCPtr, 496 520 cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "", 497 521 szBuf); 498 522 else 499 RTStrPrintf(pszOutput, c chOutput, "%08RX32 %.*Rhxs%*s %s",523 RTStrPrintf(pszOutput, cbOutput, "%08RX32 %.*Rhxs%*s %s", 500 524 (uint32_t)GCPtr, 501 525 cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "", … … 505 529 { 506 530 if (enmMode >= PGMMODE_AMD64) 507 RTStrPrintf(pszOutput, c chOutput, "%04x:%RGv %.*Rhxs%*s %s",531 RTStrPrintf(pszOutput, cbOutput, "%04x:%RGv %.*Rhxs%*s %s", 508 532 Sel, GCPtr, 509 533 cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "", 510 534 szBuf); 511 535 else 512 RTStrPrintf(pszOutput, c chOutput, "%04x:%08RX32 %.*Rhxs%*s %s",536 RTStrPrintf(pszOutput, cbOutput, "%04x:%08RX32 %.*Rhxs%*s %s", 513 537 Sel, (uint32_t)GCPtr, 514 538 cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "", … … 536 560 * @param fFlags Flags controlling where to start and how to format. 537 561 * A combination of the DBGF_DISAS_FLAGS_* \#defines. 538 * @param pszOutput Output buffer. 539 * @param cchOutput Size of the output buffer. 562 * @param pszOutput Output buffer. This will always be properly 563 * terminated if @a cbOutput is greater than zero. 564 * @param cbOutput Size of the output buffer. 540 565 * @param pcbInstr Where to return the size of the instruction. 541 566 * … … 543 568 * address conversion. 544 569 */ 545 VMMR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, VMCPUID idCpu, RTSEL Sel, RTGCPTR GCPtr, unsigned fFlags, 546 char *pszOutput, uint32_t cchOutput, uint32_t *pcbInstr) 547 { 570 VMMR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, VMCPUID idCpu, RTSEL Sel, RTGCPTR GCPtr, uint32_t fFlags, 571 char *pszOutput, uint32_t cbOutput, uint32_t *pcbInstr) 572 { 573 AssertReturn(cbOutput > 0, VERR_INVALID_PARAMETER); 574 *pszOutput = '\0'; 548 575 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE); 549 576 AssertReturn(idCpu < pVM->cCpus, VERR_INVALID_CPU_ID); 577 AssertReturn(!(fFlags & ~DBGF_DISAS_FLAGS_VALID_MASK), VERR_INVALID_PARAMETER); 578 AssertReturn((fFlags & DBGF_DISAS_FLAGS_MODE_MASK) <= DBGF_DISAS_FLAGS_64BIT_MODE, VERR_INVALID_PARAMETER); 550 579 551 580 /* … … 557 586 if ( pVCpu 558 587 && pVCpu->idCpu == idCpu) 559 rc = dbgfR3DisasInstrExOnVCpu(pVM, pVCpu, Sel, &GCPtr, fFlags, pszOutput, c chOutput, pcbInstr);588 rc = dbgfR3DisasInstrExOnVCpu(pVM, pVCpu, Sel, &GCPtr, fFlags, pszOutput, cbOutput, pcbInstr); 560 589 else 561 590 rc = VMR3ReqCallWait(pVM, idCpu, (PFNRT)dbgfR3DisasInstrExOnVCpu, 8, 562 pVM, VMMGetCpuById(pVM, idCpu), Sel, &GCPtr, fFlags, pszOutput, c chOutput, pcbInstr);591 pVM, VMMGetCpuById(pVM, idCpu), Sel, &GCPtr, fFlags, pszOutput, cbOutput, pcbInstr); 563 592 return rc; 564 593 } … … 571 600 * @returns VBox status code. 572 601 * @param pVCpu VMCPU handle. 573 * @param pszOutput Output buffer. 574 * @param cchOutput Size of the output buffer. 575 */ 576 VMMR3DECL(int) DBGFR3DisasInstrCurrent(PVMCPU pVCpu, char *pszOutput, uint32_t cchOutput) 577 { 602 * @param pszOutput Output buffer. This will always be properly 603 * terminated if @a cbOutput is greater than zero. 604 * @param cbOutput Size of the output buffer. 605 */ 606 VMMR3DECL(int) DBGFR3DisasInstrCurrent(PVMCPU pVCpu, char *pszOutput, uint32_t cbOutput) 607 { 608 AssertReturn(cbOutput > 0, VERR_INVALID_PARAMETER); 578 609 *pszOutput = '\0'; 579 610 AssertReturn(pVCpu, VERR_INVALID_CONTEXT); 580 return DBGFR3DisasInstrEx(pVCpu->pVMR3, pVCpu->idCpu, 0, 0, DBGF_DISAS_FLAGS_CURRENT_GUEST, 581 pszOutput, cchOutput, NULL); 611 return DBGFR3DisasInstrEx(pVCpu->pVMR3, pVCpu->idCpu, 0, 0, 612 DBGF_DISAS_FLAGS_CURRENT_GUEST | DBGF_DISAS_FLAGS_DEFAULT_MODE, 613 pszOutput, cbOutput, NULL); 582 614 } 583 615 … … 621 653 { 622 654 char szBuf[256]; 623 szBuf[0] = '\0';624 int rc = DBGFR3DisasInstrEx(pVCpu->pVMR3, pVCpu->idCpu, Sel, GCPtr, 0,&szBuf[0], sizeof(szBuf), NULL);655 int rc = DBGFR3DisasInstrEx(pVCpu->pVMR3, pVCpu->idCpu, Sel, GCPtr, DBGF_DISAS_FLAGS_DEFAULT_MODE, 656 &szBuf[0], sizeof(szBuf), NULL); 625 657 if (RT_FAILURE(rc)) 626 658 RTStrPrintf(szBuf, sizeof(szBuf), "DBGFR3DisasInstrLog(, %RTsel, %RGv) failed with rc=%Rrc\n", Sel, GCPtr, rc); -
trunk/src/VBox/VMM/HWACCM.cpp
r30105 r30453 1625 1625 char szOutput[256]; 1626 1626 1627 rc = DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, CPUMGetGuestCS(pVCpu), pInstrGC, 0, szOutput, sizeof(szOutput), 0); 1627 rc = DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, CPUMGetGuestCS(pVCpu), pInstrGC, DBGF_DISAS_FLAGS_DEFAULT_MODE, 1628 szOutput, sizeof(szOutput), NULL); 1628 1629 if (RT_SUCCESS(rc)) 1629 1630 Log(("Patched instr: %s\n", szOutput)); … … 1648 1649 1649 1650 #ifdef LOG_ENABLED 1650 rc = DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, CPUMGetGuestCS(pVCpu), pInstrGC, 0, szOutput, sizeof(szOutput), 0); 1651 rc = DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, CPUMGetGuestCS(pVCpu), pInstrGC, DBGF_DISAS_FLAGS_DEFAULT_MODE, 1652 szOutput, sizeof(szOutput), NULL); 1651 1653 if (RT_SUCCESS(rc)) 1652 1654 Log(("Original instr: %s\n", szOutput)); … … 1871 1873 #ifdef LOG_ENABLED 1872 1874 char szOutput[256]; 1873 rc = DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCtx->rip, 0, szOutput, sizeof(szOutput), 0); 1875 rc = DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCtx->rip, DBGF_DISAS_FLAGS_DEFAULT_MODE, 1876 szOutput, sizeof(szOutput), NULL); 1874 1877 if (RT_SUCCESS(rc)) 1875 1878 Log(("Failed to patch instr: %s\n", szOutput)); … … 1936 1939 1937 1940 #ifdef LOG_ENABLED 1938 rc = DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCtx->rip, 0, szOutput, sizeof(szOutput), 0); 1941 rc = DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCtx->rip, DBGF_DISAS_FLAGS_DEFAULT_MODE, 1942 szOutput, sizeof(szOutput), NULL); 1939 1943 if (RT_SUCCESS(rc)) 1940 1944 Log(("Original instr: %s\n", szOutput)); … … 2066 2070 uint32_t cb; 2067 2071 2068 rc = DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pInstr, 0, szOutput, sizeof(szOutput), &cb); 2072 rc = DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pInstr, DBGF_DISAS_FLAGS_DEFAULT_MODE, 2073 szOutput, sizeof(szOutput), &cb); 2069 2074 if (RT_SUCCESS(rc)) 2070 2075 Log(("Patch instr %s\n", szOutput)); … … 2085 2090 2086 2091 #ifdef LOG_ENABLED 2087 rc = DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCtx->rip, 0, szOutput, sizeof(szOutput), 0); 2092 rc = DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCtx->rip, DBGF_DISAS_FLAGS_DEFAULT_MODE, 2093 szOutput, sizeof(szOutput), NULL); 2088 2094 if (RT_SUCCESS(rc)) 2089 2095 Log(("Jump: %s\n", szOutput)); … … 2109 2115 2110 2116 #ifdef LOG_ENABLED 2111 rc = DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCtx->rip, 0, szOutput, sizeof(szOutput), 0); 2117 rc = DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCtx->rip, DBGF_DISAS_FLAGS_DEFAULT_MODE, 2118 szOutput, sizeof(szOutput), NULL); 2112 2119 if (RT_SUCCESS(rc)) 2113 2120 Log(("Failed to patch instr: %s\n", szOutput)); -
trunk/src/VBox/VMM/PATM/PATM.cpp
r30326 r30453 5851 5851 #ifdef DEBUG 5852 5852 char szBuf[256]; 5853 szBuf[0] = '\0';5854 DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCurPatchInstrGC, 0,szBuf, sizeof(szBuf), NULL);5853 DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCurPatchInstrGC, DBGF_DISAS_FLAGS_DEFAULT_MODE, 5854 szBuf, sizeof(szBuf), NULL); 5855 5855 Log(("DIRTY: %s\n", szBuf)); 5856 5856 #endif … … 5913 5913 #ifdef DEBUG 5914 5914 char szBuf[256]; 5915 szBuf[0] = '\0';5916 DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCurInstrGC, 0,szBuf, sizeof(szBuf), NULL);5915 DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCurInstrGC, DBGF_DISAS_FLAGS_DEFAULT_MODE, 5916 szBuf, sizeof(szBuf), NULL); 5917 5917 Log(("NEW: %s\n", szBuf)); 5918 5918 #endif … … 5929 5929 #ifdef DEBUG 5930 5930 char szBuf[256]; 5931 szBuf[0] = '\0';5932 DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCurInstrGC, 0,szBuf, sizeof(szBuf), NULL);5931 DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCurInstrGC, DBGF_DISAS_FLAGS_DEFAULT_MODE, 5932 szBuf, sizeof(szBuf), NULL); 5933 5933 Log(("NEW: %s (FAILED)\n", szBuf)); 5934 5934 #endif … … 5966 5966 #ifdef DEBUG 5967 5967 char szBuf[256]; 5968 szBuf[0] = '\0';5969 DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCurPatchInstrGC, 0,szBuf, sizeof(szBuf), NULL);5968 DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCurPatchInstrGC, DBGF_DISAS_FLAGS_DEFAULT_MODE, 5969 szBuf, sizeof(szBuf), NULL); 5970 5970 Log(("FILL: %s\n", szBuf)); 5971 5971 #endif … … 5978 5978 #ifdef DEBUG 5979 5979 char szBuf[256]; 5980 szBuf[0] = '\0';5981 DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCurPatchInstrGC + i, 0, szBuf, sizeof(szBuf), NULL);5980 DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pCurPatchInstrGC + i, 5981 DBGF_DISAS_FLAGS_DEFAULT_MODE, szBuf, sizeof(szBuf), NULL); 5982 5982 Log(("FILL: %s\n", szBuf)); 5983 5983 #endif … … 6170 6170 6171 6171 char szBuf[256]; 6172 szBuf[0] = '\0'; 6173 DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pEip, 0, szBuf, sizeof(szBuf), NULL); 6172 DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, pCtx->cs, pEip, DBGF_DISAS_FLAGS_DEFAULT_MODE, szBuf, sizeof(szBuf), NULL); 6174 6173 6175 6174 /* Very bad. We crashed in emitted code. Probably stack? */ -
trunk/src/VBox/VMM/VMMGuruMeditation.cpp
r30083 r30453 495 495 /* Disassemble the instruction. */ 496 496 char szInstr[256]; 497 rc2 = DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, 0, 0, DBGF_DISAS_FLAGS_CURRENT_HYPER, &szInstr[0], sizeof(szInstr), NULL); 497 rc2 = DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, 0, 0, DBGF_DISAS_FLAGS_CURRENT_HYPER | DBGF_DISAS_FLAGS_DEFAULT_MODE, 498 &szInstr[0], sizeof(szInstr), NULL); 498 499 if (RT_SUCCESS(rc2)) 499 500 pHlp->pfnPrintf(pHlp, -
trunk/src/recompiler/VBoxRecompiler.c
r30263 r30453 3820 3820 cs, 3821 3821 eip, 3822 0,3822 DBGF_DISAS_FLAGS_DEFAULT_MODE, 3823 3823 szBuf, sizeof(szBuf), 3824 3824 &cbInstr);
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