Changeset 30590 in vbox
- Timestamp:
- Jul 2, 2010 6:21:50 PM (15 years ago)
- svn:sync-xref-src-repo-rev:
- 63315
- Location:
- trunk/src/VBox/VMM/VMMR0
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r30263 r30590 956 956 VMMR0DECL(int) SVMR0RunGuestCode(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx) 957 957 { 958 STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatEntry, x); 959 STAM_PROFILE_ADV_SET_STOPPED(&pVCpu->hwaccm.s.StatExit1); 960 STAM_PROFILE_ADV_SET_STOPPED(&pVCpu->hwaccm.s.StatExit2); 961 958 962 int rc = VINF_SUCCESS; 959 963 uint64_t exitCode = (uint64_t)SVM_EXIT_INVALID; … … 971 975 #endif 972 976 973 STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatEntry, x);974 975 977 pVMCB = (SVM_VMCB *)pVCpu->hwaccm.s.svm.pVMCB; 976 978 AssertMsgReturn(pVMCB, ("Invalid pVMCB\n"), VERR_EM_INTERNAL_ERROR); … … 979 981 */ 980 982 ResumeExecution: 983 if (!STAM_PROFILE_ADV_IS_RUNNING(&pVCpu->hwaccm.s.StatEntry)) 984 STAM_PROFILE_ADV_STOP_START(&pVCpu->hwaccm.s.StatExit2, &pVCpu->hwaccm.s.StatEntry, x); 981 985 Assert(!HWACCMR0SuspendPending()); 982 986 … … 1050 1054 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TO_R3); 1051 1055 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatSwitchToR3); 1052 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);1053 1056 rc = RT_UNLIKELY(VM_FF_ISPENDING(pVM, VM_FF_PGM_NO_MEMORY)) ? VINF_EM_NO_MEMORY : VINF_EM_RAW_TO_R3; 1054 1057 goto end; … … 1060 1063 || VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_REQUEST)) 1061 1064 { 1062 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);1063 1065 rc = VINF_EM_PENDING_REQUEST; 1064 1066 goto end; … … 1068 1070 if (VM_FF_ISPENDING(pVM, VM_FF_PGM_POOL_FLUSH_PENDING)) 1069 1071 { 1070 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);1071 1072 rc = VINF_PGM_POOL_FLUSH_PENDING; 1072 1073 goto end; … … 1099 1100 rc = SVMR0CheckPendingInterrupt(pVM, pVCpu, pVMCB, pCtx); 1100 1101 if (RT_FAILURE(rc)) 1101 {1102 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);1103 1102 goto end; 1104 }1105 1103 1106 1104 /* TPR caching using CR8 is only available in 64 bits mode or with 32 bits guests when X86_CPUID_AMD_FEATURE_ECX_CR8L is supported. */ … … 1151 1149 1152 1150 /* All done! Let's start VM execution. */ 1153 STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatInGC, x);1154 1151 1155 1152 /* Enable nested paging if necessary (disabled each time after #VMEXIT). */ … … 1183 1180 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 1184 1181 { 1185 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);1186 1182 VMMR0LogFlushEnable(pVCpu); 1187 1183 goto end; … … 1195 1191 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED_EXEC); 1196 1192 #endif 1193 STAM_PROFILE_ADV_STOP_START(&pVCpu->hwaccm.s.StatEntry, &pVCpu->hwaccm.s.StatInGC, x); 1197 1194 1198 1195 pCpu = HWACCMR0GetCurrentCpu(); … … 1297 1294 TMNotifyEndOfExecution(pVCpu); 1298 1295 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED); 1296 STAM_PROFILE_ADV_STOP_START(&pVCpu->hwaccm.s.StatInGC, &pVCpu->hwaccm.s.StatExit1, x); 1299 1297 ASMSetFlags(uOldEFlags); 1300 1298 #ifdef VBOX_WITH_VMMR0_DISABLE_PREEMPTION 1301 1299 uOldEFlags = ~(RTCCUINTREG)0; 1302 1300 #endif 1303 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatInGC, x);1304 1301 1305 1302 /* … … 1308 1305 * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! 1309 1306 */ 1310 1311 STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatExit1, x);1312 1307 1313 1308 /* Reason for the VM exit */ … … 1582 1577 } 1583 1578 1579 STAM_PROFILE_ADV_STOP_START(&pVCpu->hwaccm.s.StatExit1, &pVCpu->hwaccm.s.StatExit2, x); 1580 1584 1581 /* Deal with the reason of the VM-exit. */ 1585 1582 switch (exitCode) … … 1620 1617 1621 1618 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event); 1622 1623 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);1624 1619 goto ResumeExecution; 1625 1620 } … … 1642 1637 1643 1638 /* Continue execution. */ 1644 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);1645 1639 pVCpu->hwaccm.s.fContextUseFlags |= HWACCM_CHANGED_GUEST_CR0; 1646 1640 … … 1657 1651 1658 1652 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event); 1659 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);1660 1653 goto ResumeExecution; 1661 1654 } … … 1685 1678 1686 1679 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event); 1687 1688 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);1689 1680 goto ResumeExecution; 1690 1681 } … … 1735 1726 1736 1727 TRPMResetTrap(pVCpu); 1737 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);1738 1728 goto ResumeExecution; 1739 1729 } … … 1761 1751 1762 1752 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event); 1763 1764 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);1765 1753 goto ResumeExecution; 1766 1754 } … … 1792 1780 1793 1781 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event); 1794 1795 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);1796 1782 goto ResumeExecution; 1797 1783 } … … 1838 1824 Log(("Trap %x at %04x:%RGv esi=%x\n", vector, pCtx->cs, (RTGCPTR)pCtx->rip, pCtx->esi)); 1839 1825 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event); 1840 1841 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);1842 1826 goto ResumeExecution; 1843 1827 } … … 1909 1893 1910 1894 TRPMResetTrap(pVCpu); 1911 1912 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);1913 1895 goto ResumeExecution; 1914 1896 } … … 1945 1927 pCtx->rip += 2; /* Note! hardcoded opcode size! */ 1946 1928 /* Continue execution.*/ 1947 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);1948 1929 goto ResumeExecution; 1949 1930 … … 1957 1938 /* Update EIP and continue execution. */ 1958 1939 pCtx->rip += 2; /* Note! hardcoded opcode size! */ 1959 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);1960 1940 goto ResumeExecution; 1961 1941 } … … 1974 1954 /* Update EIP and continue execution. */ 1975 1955 pCtx->rip += 2; /* Note! hardcoded opcode size! */ 1976 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);1977 1956 goto ResumeExecution; 1978 1957 } … … 2005 1984 /* Update EIP and continue execution. */ 2006 1985 pCtx->rip += 3; /* Note! hardcoded opcode size! */ 2007 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);2008 1986 goto ResumeExecution; 2009 1987 } … … 2065 2043 2066 2044 /* Only resume if successful. */ 2067 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);2068 2045 goto ResumeExecution; 2069 2046 } … … 2087 2064 2088 2065 /* Only resume if successful. */ 2089 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);2090 2066 goto ResumeExecution; 2091 2067 } … … 2116 2092 rc = CPUMR0LoadGuestDebugState(pVM, pVCpu, pCtx, false /* exclude DR6 */); 2117 2093 AssertRC(rc); 2118 2119 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);2120 2094 goto ResumeExecution; 2121 2095 } … … 2128 2102 2129 2103 /* Only resume if successful. */ 2130 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);2131 2104 goto ResumeExecution; 2132 2105 } … … 2156 2129 rc = CPUMR0LoadGuestDebugState(pVM, pVCpu, pCtx, false /* exclude DR6 */); 2157 2130 AssertRC(rc); 2158 2159 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);2160 2131 goto ResumeExecution; 2161 2132 } … … 2167 2138 2168 2139 /* Only resume if successful. */ 2169 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);2170 2140 goto ResumeExecution; 2171 2141 } … … 2320 2290 2321 2291 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event); 2322 2323 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);2324 2292 goto ResumeExecution; 2325 2293 } 2326 2294 } 2327 2295 } 2328 2329 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);2330 2296 goto ResumeExecution; 2331 2297 } … … 2420 2386 Log(("Forced #UD trap at %RGv\n", (RTGCPTR)pCtx->rip)); 2421 2387 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event); 2422 2423 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);2424 2388 goto ResumeExecution; 2425 2389 } … … 2448 2412 2449 2413 /* Only resume if successful. */ 2450 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);2451 2414 goto ResumeExecution; 2452 2415 } … … 2461 2424 2462 2425 /* Only resume if successful. */ 2463 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);2464 2426 goto ResumeExecution; 2465 2427 } … … 2556 2518 #endif 2557 2519 2520 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2, x); 2558 2521 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x); 2522 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x); 2559 2523 return rc; 2560 2524 } -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r30390 r30590 1585 1585 1586 1586 /* When the guest's FPU state is active, then we no longer care about 1587 * the FPU related bits. 1587 * the FPU related bits. 1588 1588 */ 1589 1589 if (CPUMIsGuestFPUStateActive(pVCpu) == false) … … 2239 2239 VMMR0DECL(int) VMXR0RunGuestCode(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx) 2240 2240 { 2241 STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatEntry, x); 2242 STAM_PROFILE_ADV_SET_STOPPED(&pVCpu->hwaccm.s.StatExit1); 2243 STAM_PROFILE_ADV_SET_STOPPED(&pVCpu->hwaccm.s.StatExit2); 2244 2241 2245 int rc = VINF_SUCCESS; 2242 2246 RTGCUINTREG val; … … 2258 2262 uint64_t u64LastTime = RTTimeMilliTS(); 2259 2263 #endif 2260 #ifdef VBOX_WITH_STATISTICS2261 bool fStatEntryStarted = true;2262 bool fStatExit2Started = false;2263 #endif2264 2264 2265 2265 Assert(!(pVM->hwaccm.s.vmx.msr.vmx_proc_ctls2.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC2_VIRT_APIC) || (pVCpu->hwaccm.s.vmx.pVAPIC && pVM->hwaccm.s.vmx.pAPIC)); … … 2276 2276 Log2(("\nE")); 2277 2277 2278 STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatEntry, x);2279 2280 2278 #ifdef VBOX_STRICT 2281 2279 { … … 2346 2344 */ 2347 2345 ResumeExecution: 2348 STAM_STATS({ 2349 if (fStatExit2Started) { STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2, y); fStatExit2Started = false; } 2350 if (!fStatEntryStarted) { STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatEntry, x); fStatEntryStarted = true; } 2351 }); 2346 if (!STAM_REL_PROFILE_ADV_IS_RUNNING(&pVCpu->hwaccm.s.StatEntry)) 2347 STAM_REL_PROFILE_ADV_STOP_START(&pVCpu->hwaccm.s.StatExit2, &pVCpu->hwaccm.s.StatEntry, x); 2352 2348 AssertMsg(pVCpu->hwaccm.s.idEnteredCpu == RTMpCpuId(), 2353 2349 ("Expected %d, I'm %d; cResume=%d exitReason=%RGv exitQualification=%RGv\n", … … 2428 2424 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TO_R3); 2429 2425 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatSwitchToR3); 2430 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);2431 2426 rc = RT_UNLIKELY(VM_FF_ISPENDING(pVM, VM_FF_PGM_NO_MEMORY)) ? VINF_EM_NO_MEMORY : VINF_EM_RAW_TO_R3; 2432 2427 goto end; … … 2438 2433 || VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_REQUEST)) 2439 2434 { 2440 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);2441 2435 rc = VINF_EM_PENDING_REQUEST; 2442 2436 goto end; … … 2446 2440 if (VM_FF_ISPENDING(pVM, VM_FF_PGM_POOL_FLUSH_PENDING)) 2447 2441 { 2448 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);2449 2442 rc = VINF_PGM_POOL_FLUSH_PENDING; 2450 2443 goto end; … … 2599 2592 pVM->hwaccm.s.vmx.pfnSetupTaggedTLB(pVM, pVCpu); 2600 2593 2601 STAM_STATS({ STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x); fStatEntryStarted = false; });2602 2603 2594 /* Manual save and restore: 2604 2595 * - General purpose registers except RIP, RSP … … 2614 2605 2615 2606 /* All done! Let's start VM execution. */ 2616 STAM_PROFILE_ADV_ST ART(&pVCpu->hwaccm.s.StatInGC, z);2607 STAM_PROFILE_ADV_STOP_START(&pVCpu->hwaccm.s.StatEntry, &pVCpu->hwaccm.s.StatInGC, x); 2617 2608 Assert(idCpuCheck == RTMpCpuId()); 2618 2609 … … 2654 2645 } 2655 2646 2647 STAM_PROFILE_ADV_STOP_START(&pVCpu->hwaccm.s.StatInGC, &pVCpu->hwaccm.s.StatExit1, x); 2656 2648 ASMSetFlags(uOldEFlags); 2657 2649 #ifdef VBOX_WITH_VMMR0_DISABLE_PREEMPTION … … 2670 2662 * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! 2671 2663 */ 2672 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatInGC, z);2673 2664 2674 2665 if (RT_UNLIKELY(rc != VINF_SUCCESS)) … … 2679 2670 } 2680 2671 2681 STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatExit1, v);2682 2672 /* Success. Query the guest state and figure out what has happened. */ 2683 2673 … … 2757 2747 } 2758 2748 2759 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, v); 2760 STAM_STATS({ STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatExit2, y); fStatExit2Started = true; }); 2749 STAM_PROFILE_ADV_STOP_START(&pVCpu->hwaccm.s.StatExit1, &pVCpu->hwaccm.s.StatExit2, x); 2761 2750 2762 2751 /* Some cases don't need a complete resync of the guest CPU state; handle them here. */ … … 2774 2763 if ( RTThreadPreemptIsPendingTrusty() 2775 2764 && !RTThreadPreemptIsPending(NIL_RTTHREAD)) 2776 { 2777 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2Sub3, y3); 2778 goto ResumeExecution; 2779 } 2765 goto ResumeExecution; 2780 2766 #endif 2781 2767 /* External interrupt; leave to allow it to be dispatched again. */ … … 3032 3018 rc = VMXR0InjectEvent(pVM, pVCpu, pCtx, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(intInfo), cbInstr, errCode); 3033 3019 AssertRC(rc); 3020 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2Sub3, y3); 3034 3021 goto ResumeExecution; 3035 3022 } 3036 3023 if (rc == VINF_SUCCESS) 3024 { 3025 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2Sub3, y3); 3037 3026 goto ResumeExecution; 3027 } 3038 3028 Log(("Debugger BP at %04x:%RGv (rc=%Rrc)\n", pCtx->cs, pCtx->rip, rc)); 3039 3029 break; … … 3891 3881 LogFlow(("VMX_EXIT_TPR\n")); 3892 3882 /* RIP is already set to the next instruction and the TPR has been synced back. Just resume. */ 3893 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2Sub1, y1);3894 3883 goto ResumeExecution; 3895 3884 … … 3912 3901 rc = VBOXSTRICTRC_TODO(IOMMMIOPhysHandler(pVM, (uAccessType == VMX_APIC_ACCESS_TYPE_LINEAR_READ) ? 0 : X86_TRAP_PF_RW, CPUMCTX2CORE(pCtx), GCPhys)); 3913 3902 if (rc == VINF_SUCCESS) 3914 {3915 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2Sub1, y1);3916 3903 goto ResumeExecution; /* rip already updated */ 3917 }3918 3904 break; 3919 3905 } … … 3927 3913 3928 3914 case VMX_EXIT_PREEMPTION_TIMER: /* 52 VMX-preemption timer expired. The preemption timer counted down to zero. */ 3929 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2Sub1, y1);3930 3915 goto ResumeExecution; 3931 3916 … … 4155 4140 #endif 4156 4141 4157 STAM_STATS({ 4158 if (fStatExit2Started) STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2, y); 4159 else if (fStatEntryStarted) STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x); 4160 }); 4142 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2, x); 4143 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x); 4144 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x); 4161 4145 Log2(("X")); 4162 4146 return rc;
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