Index: trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp	(revision 30588)
+++ trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp	(revision 30590)
@@ -956,4 +956,8 @@
 VMMR0DECL(int) SVMR0RunGuestCode(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
 {
+    STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatEntry, x);
+    STAM_PROFILE_ADV_SET_STOPPED(&pVCpu->hwaccm.s.StatExit1);
+    STAM_PROFILE_ADV_SET_STOPPED(&pVCpu->hwaccm.s.StatExit2);
+
     int         rc = VINF_SUCCESS;
     uint64_t    exitCode = (uint64_t)SVM_EXIT_INVALID;
@@ -971,6 +975,4 @@
 #endif
 
-    STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatEntry, x);
-
     pVMCB = (SVM_VMCB *)pVCpu->hwaccm.s.svm.pVMCB;
     AssertMsgReturn(pVMCB, ("Invalid pVMCB\n"), VERR_EM_INTERNAL_ERROR);
@@ -979,4 +981,6 @@
      */
 ResumeExecution:
+    if (!STAM_PROFILE_ADV_IS_RUNNING(&pVCpu->hwaccm.s.StatEntry))
+        STAM_PROFILE_ADV_STOP_START(&pVCpu->hwaccm.s.StatExit2, &pVCpu->hwaccm.s.StatEntry, x);
     Assert(!HWACCMR0SuspendPending());
 
@@ -1050,5 +1054,4 @@
                 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TO_R3);
                 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatSwitchToR3);
-                STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
                 rc = RT_UNLIKELY(VM_FF_ISPENDING(pVM, VM_FF_PGM_NO_MEMORY)) ? VINF_EM_NO_MEMORY : VINF_EM_RAW_TO_R3;
                 goto end;
@@ -1060,5 +1063,4 @@
             ||  VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_REQUEST))
         {
-            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
             rc = VINF_EM_PENDING_REQUEST;
             goto end;
@@ -1068,5 +1070,4 @@
         if (VM_FF_ISPENDING(pVM, VM_FF_PGM_POOL_FLUSH_PENDING))
         {
-            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
             rc = VINF_PGM_POOL_FLUSH_PENDING;
             goto end;
@@ -1099,8 +1100,5 @@
     rc = SVMR0CheckPendingInterrupt(pVM, pVCpu, pVMCB, pCtx);
     if (RT_FAILURE(rc))
-    {
-        STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
         goto end;
-    }
 
     /* TPR caching using CR8 is only available in 64 bits mode or with 32 bits guests when X86_CPUID_AMD_FEATURE_ECX_CR8L is supported. */
@@ -1151,5 +1149,4 @@
 
     /* All done! Let's start VM execution. */
-    STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatInGC, x);
 
     /* Enable nested paging if necessary (disabled each time after #VMEXIT). */
@@ -1183,5 +1180,4 @@
     if (RT_UNLIKELY(rc != VINF_SUCCESS))
     {
-        STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
         VMMR0LogFlushEnable(pVCpu);
         goto end;
@@ -1195,4 +1191,5 @@
     VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED_EXEC);
 #endif
+    STAM_PROFILE_ADV_STOP_START(&pVCpu->hwaccm.s.StatEntry, &pVCpu->hwaccm.s.StatInGC, x);
 
     pCpu = HWACCMR0GetCurrentCpu();
@@ -1297,9 +1294,9 @@
     TMNotifyEndOfExecution(pVCpu);
     VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
+    STAM_PROFILE_ADV_STOP_START(&pVCpu->hwaccm.s.StatInGC, &pVCpu->hwaccm.s.StatExit1, x);
     ASMSetFlags(uOldEFlags);
 #ifdef VBOX_WITH_VMMR0_DISABLE_PREEMPTION
     uOldEFlags = ~(RTCCUINTREG)0;
 #endif
-    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatInGC, x);
 
     /*
@@ -1308,6 +1305,4 @@
      * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
      */
-
-    STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatExit1, x);
 
     /* Reason for the VM exit */
@@ -1582,4 +1577,6 @@
     }
 
+    STAM_PROFILE_ADV_STOP_START(&pVCpu->hwaccm.s.StatExit1, &pVCpu->hwaccm.s.StatExit2, x);
+
     /* Deal with the reason of the VM-exit. */
     switch (exitCode)
@@ -1620,6 +1617,4 @@
 
                 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event);
-
-                STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
                 goto ResumeExecution;
             }
@@ -1642,5 +1637,4 @@
 
                 /* Continue execution. */
-                STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
                 pVCpu->hwaccm.s.fContextUseFlags |= HWACCM_CHANGED_GUEST_CR0;
 
@@ -1657,5 +1651,4 @@
 
             SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event);
-            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
             goto ResumeExecution;
         }
@@ -1685,6 +1678,4 @@
 
                 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event);
-
-                STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
                 goto ResumeExecution;
             }
@@ -1735,5 +1726,4 @@
 
                 TRPMResetTrap(pVCpu);
-                STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
                 goto ResumeExecution;
             }
@@ -1761,6 +1751,4 @@
 
                 SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event);
-
-                STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
                 goto ResumeExecution;
             }
@@ -1792,6 +1780,4 @@
 
             SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event);
-
-            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
             goto ResumeExecution;
         }
@@ -1838,6 +1824,4 @@
             Log(("Trap %x at %04x:%RGv esi=%x\n", vector, pCtx->cs, (RTGCPTR)pCtx->rip, pCtx->esi));
             SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event);
-
-            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
             goto ResumeExecution;
         }
@@ -1909,6 +1893,4 @@
 
             TRPMResetTrap(pVCpu);
-
-            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
             goto ResumeExecution;
         }
@@ -1945,5 +1927,4 @@
         pCtx->rip += 2;     /* Note! hardcoded opcode size! */
         /* Continue execution.*/
-        STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
         goto ResumeExecution;
 
@@ -1957,5 +1938,4 @@
             /* Update EIP and continue execution. */
             pCtx->rip += 2;             /* Note! hardcoded opcode size! */
-            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
             goto ResumeExecution;
         }
@@ -1974,5 +1954,4 @@
             /* Update EIP and continue execution. */
             pCtx->rip += 2;             /* Note! hardcoded opcode size! */
-            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
             goto ResumeExecution;
         }
@@ -2005,5 +1984,4 @@
             /* Update EIP and continue execution. */
             pCtx->rip += 3;             /* Note! hardcoded opcode size! */
-            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
             goto ResumeExecution;
         }
@@ -2065,5 +2043,4 @@
 
             /* Only resume if successful. */
-            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
             goto ResumeExecution;
         }
@@ -2087,5 +2064,4 @@
 
             /* Only resume if successful. */
-            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
             goto ResumeExecution;
         }
@@ -2116,6 +2092,4 @@
             rc = CPUMR0LoadGuestDebugState(pVM, pVCpu, pCtx, false /* exclude DR6 */);
             AssertRC(rc);
-
-            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
             goto ResumeExecution;
         }
@@ -2128,5 +2102,4 @@
 
             /* Only resume if successful. */
-            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
             goto ResumeExecution;
         }
@@ -2156,6 +2129,4 @@
             rc = CPUMR0LoadGuestDebugState(pVM, pVCpu, pCtx, false /* exclude DR6 */);
             AssertRC(rc);
-
-            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
             goto ResumeExecution;
         }
@@ -2167,5 +2138,4 @@
 
             /* Only resume if successful. */
-            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
             goto ResumeExecution;
         }
@@ -2320,12 +2290,8 @@
 
                             SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event);
-
-                            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
                             goto ResumeExecution;
                         }
                     }
                 }
-
-                STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
                 goto ResumeExecution;
             }
@@ -2420,6 +2386,4 @@
         Log(("Forced #UD trap at %RGv\n", (RTGCPTR)pCtx->rip));
         SVMR0InjectEvent(pVCpu, pVMCB, pCtx, &Event);
-
-        STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
         goto ResumeExecution;
     }
@@ -2448,5 +2412,4 @@
 
             /* Only resume if successful. */
-            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
             goto ResumeExecution;
         }
@@ -2461,5 +2424,4 @@
 
             /* Only resume if successful. */
-            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
             goto ResumeExecution;
         }
@@ -2556,5 +2518,7 @@
 #endif
 
+    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2, x);
     STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
+    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
     return rc;
 }
Index: trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp	(revision 30588)
+++ trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp	(revision 30590)
@@ -1585,5 +1585,5 @@
 
         /* When the guest's FPU state is active, then we no longer care about
-         * the FPU related bits. 
+         * the FPU related bits.
          */
         if (CPUMIsGuestFPUStateActive(pVCpu) == false)
@@ -2239,4 +2239,8 @@
 VMMR0DECL(int) VMXR0RunGuestCode(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
 {
+    STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatEntry, x);
+    STAM_PROFILE_ADV_SET_STOPPED(&pVCpu->hwaccm.s.StatExit1);
+    STAM_PROFILE_ADV_SET_STOPPED(&pVCpu->hwaccm.s.StatExit2);
+
     int         rc = VINF_SUCCESS;
     RTGCUINTREG val;
@@ -2258,8 +2262,4 @@
     uint64_t    u64LastTime = RTTimeMilliTS();
 #endif
-#ifdef VBOX_WITH_STATISTICS
-    bool fStatEntryStarted = true;
-    bool fStatExit2Started = false;
-#endif
 
     Assert(!(pVM->hwaccm.s.vmx.msr.vmx_proc_ctls2.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC2_VIRT_APIC) || (pVCpu->hwaccm.s.vmx.pVAPIC && pVM->hwaccm.s.vmx.pAPIC));
@@ -2276,6 +2276,4 @@
     Log2(("\nE"));
 
-    STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatEntry, x);
-
 #ifdef VBOX_STRICT
     {
@@ -2346,8 +2344,6 @@
      */
 ResumeExecution:
-    STAM_STATS({
-        if (fStatExit2Started)   { STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2, y); fStatExit2Started = false; }
-        if (!fStatEntryStarted) { STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatEntry, x); fStatEntryStarted = true; }
-    });
+    if (!STAM_REL_PROFILE_ADV_IS_RUNNING(&pVCpu->hwaccm.s.StatEntry))
+        STAM_REL_PROFILE_ADV_STOP_START(&pVCpu->hwaccm.s.StatExit2, &pVCpu->hwaccm.s.StatEntry, x);
     AssertMsg(pVCpu->hwaccm.s.idEnteredCpu == RTMpCpuId(),
               ("Expected %d, I'm %d; cResume=%d exitReason=%RGv exitQualification=%RGv\n",
@@ -2428,5 +2424,4 @@
                 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_TO_R3);
                 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatSwitchToR3);
-                STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
                 rc = RT_UNLIKELY(VM_FF_ISPENDING(pVM, VM_FF_PGM_NO_MEMORY)) ? VINF_EM_NO_MEMORY : VINF_EM_RAW_TO_R3;
                 goto end;
@@ -2438,5 +2433,4 @@
             ||  VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_REQUEST))
         {
-            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
             rc = VINF_EM_PENDING_REQUEST;
             goto end;
@@ -2446,5 +2440,4 @@
         if (VM_FF_ISPENDING(pVM, VM_FF_PGM_POOL_FLUSH_PENDING))
         {
-            STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
             rc = VINF_PGM_POOL_FLUSH_PENDING;
             goto end;
@@ -2599,6 +2592,4 @@
     pVM->hwaccm.s.vmx.pfnSetupTaggedTLB(pVM, pVCpu);
 
-    STAM_STATS({ STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x); fStatEntryStarted = false; });
-
     /* Manual save and restore:
      * - General purpose registers except RIP, RSP
@@ -2614,5 +2605,5 @@
 
     /* All done! Let's start VM execution. */
-    STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatInGC, z);
+    STAM_PROFILE_ADV_STOP_START(&pVCpu->hwaccm.s.StatEntry, &pVCpu->hwaccm.s.StatInGC, x);
     Assert(idCpuCheck == RTMpCpuId());
 
@@ -2654,4 +2645,5 @@
     }
 
+    STAM_PROFILE_ADV_STOP_START(&pVCpu->hwaccm.s.StatInGC, &pVCpu->hwaccm.s.StatExit1, x);
     ASMSetFlags(uOldEFlags);
 #ifdef VBOX_WITH_VMMR0_DISABLE_PREEMPTION
@@ -2670,5 +2662,4 @@
      * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
      */
-    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatInGC, z);
 
     if (RT_UNLIKELY(rc != VINF_SUCCESS))
@@ -2679,5 +2670,4 @@
     }
 
-    STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatExit1, v);
     /* Success. Query the guest state and figure out what has happened. */
 
@@ -2757,6 +2747,5 @@
     }
 
-    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, v);
-    STAM_STATS({ STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatExit2, y); fStatExit2Started = true; });
+    STAM_PROFILE_ADV_STOP_START(&pVCpu->hwaccm.s.StatExit1, &pVCpu->hwaccm.s.StatExit2, x);
 
     /* Some cases don't need a complete resync of the guest CPU state; handle them here. */
@@ -2774,8 +2763,5 @@
             if (    RTThreadPreemptIsPendingTrusty()
                 &&  !RTThreadPreemptIsPending(NIL_RTTHREAD))
-            {
-                    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2Sub3, y3);
-                    goto ResumeExecution;
-            }
+                goto ResumeExecution;
 #endif
             /* External interrupt; leave to allow it to be dispatched again. */
@@ -3032,8 +3018,12 @@
                     rc = VMXR0InjectEvent(pVM, pVCpu, pCtx, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(intInfo), cbInstr, errCode);
                     AssertRC(rc);
+                    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2Sub3, y3);
                     goto ResumeExecution;
                 }
                 if (rc == VINF_SUCCESS)
+                {
+                    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2Sub3, y3);
                     goto ResumeExecution;
+                }
                 Log(("Debugger BP at %04x:%RGv (rc=%Rrc)\n", pCtx->cs, pCtx->rip, rc));
                 break;
@@ -3891,5 +3881,4 @@
         LogFlow(("VMX_EXIT_TPR\n"));
         /* RIP is already set to the next instruction and the TPR has been synced back. Just resume. */
-        STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2Sub1, y1);
         goto ResumeExecution;
 
@@ -3912,8 +3901,5 @@
             rc = VBOXSTRICTRC_TODO(IOMMMIOPhysHandler(pVM, (uAccessType == VMX_APIC_ACCESS_TYPE_LINEAR_READ) ? 0 : X86_TRAP_PF_RW, CPUMCTX2CORE(pCtx), GCPhys));
             if (rc == VINF_SUCCESS)
-            {
-                STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2Sub1, y1);
                 goto ResumeExecution;   /* rip already updated */
-            }
             break;
         }
@@ -3927,5 +3913,4 @@
 
     case VMX_EXIT_PREEMPTION_TIMER:     /* 52 VMX-preemption timer expired. The preemption timer counted down to zero. */
-        STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2Sub1, y1);
         goto ResumeExecution;
 
@@ -4155,8 +4140,7 @@
 #endif
 
-    STAM_STATS({
-        if (fStatExit2Started)      STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2, y);
-        else if (fStatEntryStarted) STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
-    });
+    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2, x);
+    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit1, x);
+    STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatEntry, x);
     Log2(("X"));
     return rc;
