Index: trunk/src/VBox/VMM/VMMAll/PGMAll.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMAll/PGMAll.cpp	(revision 31141)
+++ trunk/src/VBox/VMM/VMMAll/PGMAll.cpp	(revision 31167)
@@ -69,5 +69,5 @@
 *******************************************************************************/
 DECLINLINE(int) pgmShwGetLongModePDPtr(PVMCPU pVCpu, RTGCPTR64 GCPtr, PX86PML4E *ppPml4e, PX86PDPT *ppPdpt, PX86PDPAE *ppPD);
-DECLINLINE(int) pgmShwGetPaePoolPagePD(PPGMCPU pPGM, RTGCPTR GCPtr, PPGMPOOLPAGE *ppShwPde);
+DECLINLINE(int) pgmShwGetPaePoolPagePD(PVMCPU pVCpu, RTGCPTR GCPtr, PPGMPOOLPAGE *ppShwPde);
 #ifndef IN_RC
 static int pgmShwSyncLongModePDPtr(PVMCPU pVCpu, RTGCPTR64 GCPtr, X86PGPAEUINT uGstPml4e, X86PGPAEUINT uGstPdpe, PX86PDPAE *ppPD);
@@ -920,5 +920,5 @@
 {
     const unsigned iPdPt    = (GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_PAE;
-    PX86PDPT       pPdpt    = pgmShwGetPaePDPTPtr(&pVCpu->pgm.s);
+    PX86PDPT       pPdpt    = pgmShwGetPaePDPTPtr(pVCpu);
     PX86PDPE       pPdpe    = &pPdpt->a[iPdPt];
     PVM            pVM      = pVCpu->CTX_SUFF(pVM);
@@ -1010,14 +1010,15 @@
  *
  * @returns Pointer to the PDE.
- * @param   pPGM        Pointer to the PGMCPU instance data.
+ * @param   pVCpu       The current CPU.
  * @param   GCPtr       The address.
  * @param   ppShwPde    Receives the address of the pgm pool page for the shadow page directory
  */
-DECLINLINE(int) pgmShwGetPaePoolPagePD(PPGMCPU pPGM, RTGCPTR GCPtr, PPGMPOOLPAGE *ppShwPde)
+DECLINLINE(int) pgmShwGetPaePoolPagePD(PVMCPU pVCpu, RTGCPTR GCPtr, PPGMPOOLPAGE *ppShwPde)
 {
     const unsigned  iPdPt = (GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_PAE;
-    PX86PDPT        pPdpt = pgmShwGetPaePDPTPtr(pPGM);
-
-    Assert(PGMIsLockOwner(PGMCPU2VM(pPGM)));
+    PX86PDPT        pPdpt = pgmShwGetPaePDPTPtr(pVCpu);
+    PVM             pVM   = pVCpu->CTX_SUFF(pVM);
+
+    Assert(PGMIsLockOwner(pVM));
 
     AssertReturn(pPdpt, VERR_PAGE_DIRECTORY_PTR_NOT_PRESENT);    /* can't happen */
@@ -1030,5 +1031,5 @@
 
     /* Fetch the pgm pool shadow descriptor. */
-    PPGMPOOLPAGE pShwPde = pgmPoolGetPage(PGMCPU2PGM(pPGM)->CTX_SUFF(pPool), pPdpt->a[iPdPt].u & X86_PDPE_PG_MASK);
+    PPGMPOOLPAGE pShwPde = pgmPoolGetPage(pVM->pgm.s.CTX_SUFF(pPool), pPdpt->a[iPdPt].u & X86_PDPE_PG_MASK);
     AssertReturn(pShwPde, VERR_INTERNAL_ERROR);
 
@@ -1060,5 +1061,5 @@
     PPGMPOOL       pPool         = pVM->pgm.s.CTX_SUFF(pPool);
     const unsigned iPml4         = (GCPtr >> X86_PML4_SHIFT) & X86_PML4_MASK;
-    PX86PML4E      pPml4e        = pgmShwGetLongModePML4EPtr(pPGM, iPml4);
+    PX86PML4E      pPml4e        = pgmShwGetLongModePML4EPtr(pVCpu, iPml4);
     bool           fNestedPagingOrNoGstPaging = pVM->pgm.s.fNestedPaging || !CPUMIsGuestPagingEnabled(pVCpu);
     PPGMPOOLPAGE   pShwPage;
@@ -1159,5 +1160,5 @@
     PPGMCPU         pPGM = &pVCpu->pgm.s;
     const unsigned  iPml4 = (GCPtr >> X86_PML4_SHIFT) & X86_PML4_MASK;
-    PCX86PML4E      pPml4e = pgmShwGetLongModePML4EPtr(pPGM, iPml4);
+    PCX86PML4E      pPml4e = pgmShwGetLongModePML4EPtr(pVCpu, iPml4);
 
     Assert(PGMIsLockOwner(PGMCPU2VM(pPGM)));
@@ -1202,5 +1203,4 @@
 static int pgmShwGetEPTPDPtr(PVMCPU pVCpu, RTGCPTR64 GCPtr, PEPTPDPT *ppPdpt, PEPTPD *ppPD)
 {
-    PPGMCPU        pPGM  = &pVCpu->pgm.s;
     PVM            pVM   = pVCpu->CTX_SUFF(pVM);
     const unsigned iPml4 = (GCPtr >> EPT_PML4_SHIFT) & EPT_PML4_MASK;
@@ -1214,5 +1214,5 @@
     Assert(PGMIsLockOwner(pVM));
 
-    pPml4 = (PEPTPML4)PGMPOOL_PAGE_2_PTR_BY_PGMCPU(pPGM, pPGM->CTX_SUFF(pShwPageCR3));
+    pPml4 = (PEPTPML4)PGMPOOL_PAGE_2_PTR(pVM, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));
     Assert(pPml4);
 
Index: trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/PGMAllBth.h	(revision 31141)
+++ trunk/src/VBox/VMM/VMMAll/PGMAllBth.h	(revision 31167)
@@ -511,5 +511,5 @@
 #  if PGM_SHW_TYPE == PGM_TYPE_32BIT
     const unsigned  iPDDst = pvFault >> SHW_PD_SHIFT;
-    PX86PD          pPDDst = pgmShwGet32BitPDPtr(&pVCpu->pgm.s);
+    PX86PD          pPDDst = pgmShwGet32BitPDPtr(pVCpu);
 
 #  elif PGM_SHW_TYPE == PGM_TYPE_PAE
@@ -1068,5 +1068,5 @@
 # if PGM_SHW_TYPE == PGM_TYPE_32BIT
     const unsigned  iPDDst    = (GCPtrPage >> SHW_PD_SHIFT) & SHW_PD_MASK;
-    PX86PDE         pPdeDst   = pgmShwGet32BitPDEPtr(&pVCpu->pgm.s, GCPtrPage);
+    PX86PDE         pPdeDst   = pgmShwGet32BitPDEPtr(pVCpu, GCPtrPage);
 
     /* Fetch the pgm pool shadow descriptor. */
@@ -1076,5 +1076,5 @@
 # elif PGM_SHW_TYPE == PGM_TYPE_PAE
     const unsigned  iPdpt     = (GCPtrPage >> X86_PDPT_SHIFT);
-    PX86PDPT        pPdptDst  = pgmShwGetPaePDPTPtr(&pVCpu->pgm.s);
+    PX86PDPT        pPdptDst  = pgmShwGetPaePDPTPtr(pVCpu);
 
     /* If the shadow PDPE isn't present, then skip the invalidate. */
@@ -1091,9 +1091,9 @@
 
     /* Fetch the pgm pool shadow descriptor. */
-    rc = pgmShwGetPaePoolPagePD(&pVCpu->pgm.s, GCPtrPage, &pShwPde);
+    rc = pgmShwGetPaePoolPagePD(pVCpu, GCPtrPage, &pShwPde);
     AssertRCSuccessReturn(rc, rc);
     Assert(pShwPde);
 
-    pPDDst             = (PX86PDPAE)PGMPOOL_PAGE_2_PTR_BY_PGM(&pVM->pgm.s, pShwPde);
+    pPDDst             = (PX86PDPAE)PGMPOOL_PAGE_2_PTR(pVM, pShwPde);
     PX86PDEPAE pPdeDst = &pPDDst->a[iPDDst];
 
@@ -1727,5 +1727,5 @@
 # if PGM_SHW_TYPE == PGM_TYPE_32BIT
     const unsigned  iPDDst   = (GCPtrPage >> SHW_PD_SHIFT) & SHW_PD_MASK;
-    PX86PDE         pPdeDst  = pgmShwGet32BitPDEPtr(&pVCpu->pgm.s, GCPtrPage);
+    PX86PDE         pPdeDst  = pgmShwGet32BitPDEPtr(pVCpu, GCPtrPage);
 
     /* Fetch the pgm pool shadow descriptor. */
@@ -1739,9 +1739,9 @@
 
     /* Fetch the pgm pool shadow descriptor. */
-    int rc2 = pgmShwGetPaePoolPagePD(&pVCpu->pgm.s, GCPtrPage, &pShwPde);
+    int rc2 = pgmShwGetPaePoolPagePD(pVCpu, GCPtrPage, &pShwPde);
     AssertRCSuccessReturn(rc2, rc2);
     Assert(pShwPde);
 
-    pPDDst             = (PX86PDPAE)PGMPOOL_PAGE_2_PTR_BY_PGM(&pVM->pgm.s, pShwPde);
+    pPDDst             = (PX86PDPAE)PGMPOOL_PAGE_2_PTR(pVM, pShwPde);
     PX86PDEPAE pPdeDst = &pPDDst->a[iPDDst];
 
@@ -2057,8 +2057,8 @@
      */
 #  if PGM_SHW_TYPE == PGM_TYPE_32BIT
-    X86PDE          PdeDst = pgmShwGet32BitPDE(&pVCpu->pgm.s, GCPtrPage);
+    X86PDE          PdeDst = pgmShwGet32BitPDE(pVCpu, GCPtrPage);
 
 #  elif PGM_SHW_TYPE == PGM_TYPE_PAE
-    X86PDEPAE       PdeDst = pgmShwGetPaePDE(&pVCpu->pgm.s, GCPtrPage);
+    X86PDEPAE       PdeDst = pgmShwGetPaePDE(pVCpu, GCPtrPage);
 
 #  elif PGM_SHW_TYPE == PGM_TYPE_AMD64
@@ -2480,5 +2480,5 @@
 # if PGM_SHW_TYPE == PGM_TYPE_32BIT
     const unsigned  iPDDst   = GCPtrPage >> SHW_PD_SHIFT;
-    PSHWPDE         pPdeDst  = pgmShwGet32BitPDEPtr(&pVCpu->pgm.s, GCPtrPage);
+    PSHWPDE         pPdeDst  = pgmShwGet32BitPDEPtr(pVCpu, GCPtrPage);
 
     /* Fetch the pgm pool shadow descriptor. */
@@ -2493,9 +2493,9 @@
 
     /* Fetch the pgm pool shadow descriptor. */
-    rc = pgmShwGetPaePoolPagePD(&pVCpu->pgm.s, GCPtrPage, &pShwPde);
+    rc = pgmShwGetPaePoolPagePD(pVCpu, GCPtrPage, &pShwPde);
     AssertRCSuccessReturn(rc, rc);
     Assert(pShwPde);
 
-    pPDDst  = (PX86PDPAE)PGMPOOL_PAGE_2_PTR_BY_PGM(&pVM->pgm.s, pShwPde);
+    pPDDst  = (PX86PDPAE)PGMPOOL_PAGE_2_PTR(pVM, pShwPde);
     pPdeDst = &pPDDst->a[iPDDst];
 
@@ -2934,5 +2934,5 @@
 # if PGM_SHW_TYPE == PGM_TYPE_32BIT
     const unsigned  iPDDst  = (GCPtrPage >> SHW_PD_SHIFT) & SHW_PD_MASK;
-    PSHWPDE         pPdeDst = pgmShwGet32BitPDEPtr(&pVCpu->pgm.s, GCPtrPage);
+    PSHWPDE         pPdeDst = pgmShwGet32BitPDEPtr(pVCpu, GCPtrPage);
 
     /* Fetch the pgm pool shadow descriptor. */
@@ -2947,9 +2947,9 @@
 
     /* Fetch the pgm pool shadow descriptor. */
-    rc = pgmShwGetPaePoolPagePD(&pVCpu->pgm.s, GCPtrPage, &pShwPde);
+    rc = pgmShwGetPaePoolPagePD(pVCpu, GCPtrPage, &pShwPde);
     AssertRCSuccessReturn(rc, rc);
     Assert(pShwPde);
 
-    pPDDst  = (PX86PDPAE)PGMPOOL_PAGE_2_PTR_BY_PGM(&pVM->pgm.s, pShwPde);
+    pPDDst  = (PX86PDPAE)PGMPOOL_PAGE_2_PTR(pVM, pShwPde);
     pPdeDst = &pPDDst->a[iPDDst];
 
@@ -3172,5 +3172,5 @@
 
 # if PGM_SHW_TYPE == PGM_TYPE_32BIT
-        const X86PDE    PdeDst = pgmShwGet32BitPDE(&pVCpu->pgm.s, GCPtrPage);
+        const X86PDE    PdeDst = pgmShwGet32BitPDE(pVCpu, GCPtrPage);
 # elif PGM_SHW_TYPE == PGM_TYPE_PAE
         const unsigned  iPDDst = ((GCPtrPage >> SHW_PD_SHIFT) & SHW_PD_MASK);
@@ -3334,5 +3334,5 @@
      */
 # if PGM_SHW_TYPE == PGM_TYPE_32BIT
-    PX86PDE         pPdeDst = pgmShwGet32BitPDEPtr(&pVCpu->pgm.s, GCPtrPage);
+    PX86PDE         pPdeDst = pgmShwGet32BitPDEPtr(pVCpu, GCPtrPage);
 
 # elif PGM_SHW_TYPE == PGM_TYPE_PAE
@@ -3656,5 +3656,5 @@
 
         pPml4eSrc     = pgmGstGetLongModePML4EPtr(pVCpu, iPml4);
-        pPml4eDst     = pgmShwGetLongModePML4EPtr(&pVCpu->pgm.s, iPml4);
+        pPml4eDst     = pgmShwGetLongModePML4EPtr(pVCpu, iPml4);
 
         /* Fetch the pgm pool shadow descriptor if the shadow pml4e is present. */
@@ -3712,5 +3712,5 @@
             X86PDPE         PdpeSrc;
             PGSTPD          pPDSrc    = pgmGstGetPaePDPtr(pVCpu, GCPtr, &iPDSrc, &PdpeSrc);
-            PX86PDPT        pPdptDst  = pgmShwGetPaePDPTPtr(&pVCpu->pgm.s);
+            PX86PDPT        pPdptDst  = pgmShwGetPaePDPTPtr(pVCpu);
 #  else
             PX86PML4E       pPml4eSrcIgn;
@@ -3780,5 +3780,5 @@
             GSTPD const    *pPDSrc = pgmGstGet32bitPDPtr(pVCpu);
 #  if PGM_SHW_TYPE == PGM_TYPE_32BIT
-            PCX86PD         pPDDst = pgmShwGet32BitPDPtr(&pVCpu->pgm.s);
+            PCX86PD         pPDDst = pgmShwGet32BitPDPtr(pVCpu);
 #  endif
 # endif /* PGM_GST_TYPE == PGM_TYPE_32BIT */
@@ -3794,5 +3794,5 @@
             {
 # if PGM_SHW_TYPE == PGM_TYPE_PAE
-                const SHWPDE PdeDst = *pgmShwGetPaePDEPtr(pPGM, GCPtr);
+                const SHWPDE PdeDst = *pgmShwGetPaePDEPtr(pVCpu, GCPtr);
 # else
                 const SHWPDE PdeDst = pPDDst->a[iPDDst];
Index: trunk/src/VBox/VMM/VMMAll/PGMAllMap.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMAll/PGMAllMap.cpp	(revision 31141)
+++ trunk/src/VBox/VMM/VMMAll/PGMAllMap.cpp	(revision 31167)
@@ -245,5 +245,5 @@
             case PGMMODE_32_BIT:
             {
-                PX86PD pShw32BitPd = pgmShwGet32BitPDPtr(&pVCpu->pgm.s);
+                PX86PD pShw32BitPd = pgmShwGet32BitPDPtr(pVCpu);
                 AssertFatal(pShw32BitPd);
 #ifdef IN_RC    /* Lock mapping to prevent it from being reused during pgmPoolFree. */
@@ -272,5 +272,5 @@
                 const uint32_t  iPdPt     = iNewPDE / 256;
                 unsigned        iPaePde   = iNewPDE * 2 % 512;
-                PX86PDPT        pShwPdpt  = pgmShwGetPaePDPTPtr(&pVCpu->pgm.s);
+                PX86PDPT        pShwPdpt  = pgmShwGetPaePDPTPtr(pVCpu);
                 Assert(pShwPdpt);
 #ifdef IN_RC    /* Lock mapping to prevent it from being reused during pgmShwSyncPaePDPtr. */
@@ -284,5 +284,5 @@
                  *       accessed bit causes invalid VT-x guest state errors.
                  */
-                PX86PDPAE pShwPaePd = pgmShwGetPaePDPtr(&pVCpu->pgm.s, iPdPt << X86_PDPT_SHIFT);
+                PX86PDPAE pShwPaePd = pgmShwGetPaePDPtr(pVCpu, iPdPt << X86_PDPT_SHIFT);
                 if (!pShwPaePd)
                 {
@@ -407,5 +407,5 @@
         &&  pShwPageCR3 != pVCpu->pgm.s.CTX_SUFF(pShwPageCR3))
     {
-        pCurrentShwPdpt = pgmShwGetPaePDPTPtr(&pVCpu->pgm.s);
+        pCurrentShwPdpt = pgmShwGetPaePDPTPtr(pVCpu);
 #ifdef IN_RC    /* Lock mapping to prevent it from being reused (currently not possible). */
         if (pCurrentShwPdpt)
@@ -426,5 +426,5 @@
             case PGMMODE_32_BIT:
             {
-                PX86PD          pShw32BitPd = (PX86PD)PGMPOOL_PAGE_2_PTR_BY_PGM(&pVM->pgm.s, pShwPageCR3);
+                PX86PD          pShw32BitPd = (PX86PD)PGMPOOL_PAGE_2_PTR(pVM, pShwPageCR3);
                 AssertFatal(pShw32BitPd);
 
@@ -439,6 +439,6 @@
                 const unsigned  iPdpt     = iOldPDE / 256;      /* iOldPDE * 2 / 512; iOldPDE is in 4 MB pages */
                 unsigned        iPaePde   = iOldPDE * 2 % 512;
-                PX86PDPT        pShwPdpt  = (PX86PDPT)PGMPOOL_PAGE_2_PTR_BY_PGM(&pVM->pgm.s, pShwPageCR3);
-                PX86PDPAE       pShwPaePd = pgmShwGetPaePDPtr(&pVCpu->pgm.s, pShwPdpt, (iPdpt << X86_PDPT_SHIFT));
+                PX86PDPT        pShwPdpt  = (PX86PDPT)PGMPOOL_PAGE_2_PTR(pVM, pShwPageCR3);
+                PX86PDPAE       pShwPaePd = pgmShwGetPaePDPtr(pVCpu, pShwPdpt, (iPdpt << X86_PDPT_SHIFT));
 
                 /*
@@ -538,5 +538,5 @@
             case PGMMODE_32_BIT:
             {
-                PCX86PD         pShw32BitPd = (PCX86PD)PGMPOOL_PAGE_2_PTR_BY_PGM(&pVM->pgm.s, pShwPageCR3);
+                PCX86PD         pShw32BitPd = (PCX86PD)PGMPOOL_PAGE_2_PTR(pVM, pShwPageCR3);
                 AssertFatal(pShw32BitPd);
 
@@ -553,6 +553,6 @@
                 const unsigned  iPdpt     = iPDE / 256;         /* iPDE * 2 / 512; iPDE is in 4 MB pages */
                 unsigned        iPaePDE   = iPDE * 2 % 512;
-                PX86PDPT        pShwPdpt  = (PX86PDPT)PGMPOOL_PAGE_2_PTR_BY_PGM(&pVM->pgm.s, pShwPageCR3);
-                PCX86PDPAE      pShwPaePd = pgmShwGetPaePDPtr(&pVCpu->pgm.s, pShwPdpt, iPdpt << X86_PDPT_SHIFT);
+                PX86PDPT        pShwPdpt  = (PX86PDPT)PGMPOOL_PAGE_2_PTR(pVM, pShwPageCR3);
+                PCX86PDPAE      pShwPaePd = pgmShwGetPaePDPtr(pVCpu, pShwPdpt, iPdpt << X86_PDPT_SHIFT);
                 AssertFatal(pShwPaePd);
 
Index: trunk/src/VBox/VMM/VMMAll/PGMAllShw.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/PGMAllShw.h	(revision 31141)
+++ trunk/src/VBox/VMM/VMMAll/PGMAllShw.h	(revision 31167)
@@ -151,5 +151,5 @@
 
     /* PML4 */
-    X86PML4E        Pml4e = pgmShwGetLongModePML4E(&pVCpu->pgm.s, GCPtr);
+    X86PML4E        Pml4e = pgmShwGetLongModePML4E(pVCpu, GCPtr);
     if (!Pml4e.n.u1Present)
         return VERR_PAGE_TABLE_NOT_PRESENT;
@@ -180,5 +180,5 @@
 
 # elif PGM_SHW_TYPE == PGM_TYPE_PAE
-    X86PDEPAE       Pde = pgmShwGetPaePDE(&pVCpu->pgm.s, GCPtr);
+    X86PDEPAE       Pde = pgmShwGetPaePDE(pVCpu, GCPtr);
 
 # elif PGM_SHW_TYPE == PGM_TYPE_EPT
@@ -197,5 +197,5 @@
 
 # else /* PGM_TYPE_32BIT */
-    X86PDE          Pde = pgmShwGet32BitPDE(&pVCpu->pgm.s, GCPtr);
+    X86PDE          Pde = pgmShwGet32BitPDE(pVCpu, GCPtr);
 # endif
     if (!Pde.n.u1Present)
@@ -317,5 +317,5 @@
         X86PDEPAE       Pde;
         /* PML4 */
-        X86PML4E        Pml4e = pgmShwGetLongModePML4E(&pVCpu->pgm.s, GCPtr);
+        X86PML4E        Pml4e = pgmShwGetLongModePML4E(pVCpu, GCPtr);
         if (!Pml4e.n.u1Present)
             return VERR_PAGE_TABLE_NOT_PRESENT;
@@ -340,5 +340,5 @@
 
 # elif PGM_SHW_TYPE == PGM_TYPE_PAE
-        X86PDEPAE       Pde = pgmShwGetPaePDE(&pVCpu->pgm.s, GCPtr);
+        X86PDEPAE       Pde = pgmShwGetPaePDE(pVCpu, GCPtr);
 
 # elif PGM_SHW_TYPE == PGM_TYPE_EPT
@@ -357,5 +357,5 @@
 
 # else /* PGM_TYPE_32BIT */
-        X86PDE          Pde = pgmShwGet32BitPDE(&pVCpu->pgm.s, GCPtr);
+        X86PDE          Pde = pgmShwGet32BitPDE(pVCpu, GCPtr);
 # endif
         if (!Pde.n.u1Present)
