Changeset 31170 in vbox for trunk/src/VBox/VMM

Timestamp:

Jul 28, 2010 3:20:02 PM (14 years ago)

Author:

vboxsync

Message:

PGM: More inline cleanup (prep for tracking dynamic mappings in raw-mode).

Location:

trunk/src/VBox/VMM

Files:

• PGMInline.h (modified) (22 diffs)
• PGMInternal.h (modified) (6 diffs)
• PGMPool.cpp (modified) (1 diff)
• VMMAll/PGMAll.cpp (modified) (9 diffs)
• VMMAll/PGMAllBth.h (modified) (12 diffs)
• VMMAll/PGMAllMap.cpp (modified) (4 diffs)
• VMMAll/PGMAllPhys.cpp (modified) (6 diffs)
• VMMAll/PGMAllPool.cpp (modified) (1 diff)
• VMMR0/PGMR0DynMap.cpp (modified) (10 diffs)

trunk/src/VBox/VMM/PGMInline.h

@@ -293 +293 @@
  *
  * @returns VINF_SUCCESS. Will bail out to ring-3 on failure.
- * @param   pPGM        Pointer to the PVM instance data.
+ * @param   pVCpu       The current CPU.
  * @param   HCPhys      The physical address of the page.
  * @param   ppv         Where to store the mapping address.
  */
-DECLINLINE(int) pgmR0DynMapHCPageInlined(PPGM pPGM, RTHCPHYS HCPhys, void **ppv)
-{
-    PVM         pVM     = PGM2VM(pPGM);
-    PPGMCPU     pPGMCPU = (PPGMCPU)((uint8_t *)VMMGetCpu(pVM) + pPGM->offVCpuPGM); /* very pretty ;-) */
-    PPGMMAPSET  pSet    = &pPGMCPU->AutoSet;
-
-    STAM_PROFILE_START(&pPGMCPU->CTX_SUFF(pStats)->StatR0DynMapHCPageInl, a);
+DECLINLINE(int) pgmR0DynMapHCPageInlined(PVMCPU pVCpu, RTHCPHYS HCPhys, void **ppv)
+{
+    PPGMMAPSET  pSet    = &pVCpu->pgm.s.AutoSet;
+
+    STAM_PROFILE_START(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatR0DynMapHCPageInl, a);
     Assert(!(HCPhys & PAGE_OFFSET_MASK));
     Assert(pSet->cEntries <= RT_ELEMENTS(pSet->aEntries));
@@ -313 +311 @@
     {
         *ppv = pSet->aEntries[iEntry].pvPage;
-        STAM_COUNTER_INC(&pPGMCPU->CTX_SUFF(pStats)->StatR0DynMapHCPageInlHits);
+        STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatR0DynMapHCPageInlHits);
     }
     else
     {
-        STAM_COUNTER_INC(&pPGMCPU->CTX_SUFF(pStats)->StatR0DynMapHCPageInlMisses);
-        pgmR0DynMapHCPageCommon(pVM, pSet, HCPhys, ppv);
-    }
-
-    STAM_PROFILE_STOP(&pPGMCPU->CTX_SUFF(pStats)->StatR0DynMapHCPageInl, a);
+        STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatR0DynMapHCPageInlMisses);
+        pgmR0DynMapHCPageCommon(pSet, HCPhys, ppv);
+    }
+
+    STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatR0DynMapHCPageInl, a);
     return VINF_SUCCESS;
 }
@@ -331 +329 @@
  *
  * @returns See PGMDynMapGCPage.
- * @param   pPGM        Pointer to the PVM instance data.
+ * @param   pVCpu       The current CPU.
  * @param   GCPhys      The guest physical address of the page.
  * @param   ppv         Where to store the mapping address.
  */
-DECLINLINE(int) pgmR0DynMapGCPageInlined(PPGM pPGM, RTGCPHYS GCPhys, void **ppv)
-{
-    PVM     pVM     = PGM2VM(pPGM);
-    PPGMCPU pPGMCPU = (PPGMCPU)((uint8_t *)VMMGetCpu(pVM) + pPGM->offVCpuPGM); /* very pretty ;-) */
-
-    STAM_PROFILE_START(&pPGMCPU->CTX_SUFF(pStats)->StatR0DynMapGCPageInl, a);
+DECLINLINE(int) pgmR0DynMapGCPageInlined(PVMCPU pVCpu, RTGCPHYS GCPhys, void **ppv)
+{
+    STAM_PROFILE_START(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatR0DynMapGCPageInl, a);
     AssertMsg(!(GCPhys & PAGE_OFFSET_MASK), ("%RGp\n", GCPhys));
 
@@ -346 +341 @@
      * Get the ram range.
      */
-    PPGMRAMRANGE    pRam = pPGM->CTX_SUFF(pRamRanges);
-    RTGCPHYS        off = GCPhys - pRam->GCPhys;
+    PVM             pVM  = pVCpu->CTX_SUFF(pVM);
+    PPGMRAMRANGE    pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
+    RTGCPHYS        off  = GCPhys - pRam->GCPhys;
     if (RT_UNLIKELY(off >= pRam->cb
         /** @todo   || page state stuff */))
     {
         /* This case is not counted into StatR0DynMapGCPageInl. */
-        STAM_COUNTER_INC(&pPGMCPU->CTX_SUFF(pStats)->StatR0DynMapGCPageInlRamMisses);
+        STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatR0DynMapGCPageInlRamMisses);
         return PGMDynMapGCPage(pVM, GCPhys, ppv);
     }
 
     RTHCPHYS HCPhys = PGM_PAGE_GET_HCPHYS(&pRam->aPages[off >> PAGE_SHIFT]);
-    STAM_COUNTER_INC(&pPGMCPU->CTX_SUFF(pStats)->StatR0DynMapGCPageInlRamHits);
+    STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatR0DynMapGCPageInlRamHits);
 
     /*
      * pgmR0DynMapHCPageInlined with out stats.
      */
-    PPGMMAPSET pSet = &pPGMCPU->AutoSet;
+    PPGMMAPSET pSet = &pVCpu->pgm.s.AutoSet;
     Assert(!(HCPhys & PAGE_OFFSET_MASK));
     Assert(pSet->cEntries <= RT_ELEMENTS(pSet->aEntries));
@@ -372 +368 @@
     {
         *ppv = pSet->aEntries[iEntry].pvPage;
-        STAM_COUNTER_INC(&pPGMCPU->CTX_SUFF(pStats)->StatR0DynMapGCPageInlHits);
+        STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatR0DynMapGCPageInlHits);
     }
     else
     {
-        STAM_COUNTER_INC(&pPGMCPU->CTX_SUFF(pStats)->StatR0DynMapGCPageInlMisses);
-        pgmR0DynMapHCPageCommon(pVM, pSet, HCPhys, ppv);
-    }
-
-    STAM_PROFILE_STOP(&pPGMCPU->CTX_SUFF(pStats)->StatR0DynMapGCPageInl, a);
+        STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatR0DynMapGCPageInlMisses);
+        pgmR0DynMapHCPageCommon(pSet, HCPhys, ppv);
+    }
+
+    STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatR0DynMapGCPageInl, a);
     return VINF_SUCCESS;
 }
@@ -390 +386 @@
  *
  * @returns See PGMDynMapGCPage.
- * @param   pPGM        Pointer to the PVM instance data.
+ * @param   pVCpu       The current CPU.
  * @param   HCPhys      The physical address of the page.
  * @param   ppv         Where to store the mapping address.
  */
-DECLINLINE(int) pgmR0DynMapGCPageOffInlined(PPGM pPGM, RTGCPHYS GCPhys, void **ppv)
-{
-    PVM     pVM     = PGM2VM(pPGM);
-    PPGMCPU pPGMCPU = (PPGMCPU)((uint8_t *)VMMGetCpu(pVM) + pPGM->offVCpuPGM); /* very pretty ;-) */
-
-    STAM_PROFILE_START(&pPGMCPU->StatR0DynMapGCPageInl, a);
+DECLINLINE(int) pgmR0DynMapGCPageOffInlined(PVMCPU pVCpu, RTGCPHYS GCPhys, void **ppv)
+{
+    STAM_PROFILE_START(&pVCpu->pgm.s.StatR0DynMapGCPageInl, a);
 
     /*
      * Get the ram range.
      */
-    PPGMRAMRANGE    pRam = pPGM->CTX_SUFF(pRamRanges);
-    RTGCPHYS        off = GCPhys - pRam->GCPhys;
+    PVM             pVM  = pVCpu->CTX_SUFF(pVM);
+    PPGMRAMRANGE    pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
+    RTGCPHYS        off  = GCPhys - pRam->GCPhys;
     if (RT_UNLIKELY(off >= pRam->cb
         /** @todo   || page state stuff */))
     {
         /* This case is not counted into StatR0DynMapGCPageInl. */
-        STAM_COUNTER_INC(&pPGMCPU->CTX_SUFF(pStats)->StatR0DynMapGCPageInlRamMisses);
+        STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatR0DynMapGCPageInlRamMisses);
         return PGMDynMapGCPageOff(pVM, GCPhys, ppv);
     }
 
     RTHCPHYS HCPhys = PGM_PAGE_GET_HCPHYS(&pRam->aPages[off >> PAGE_SHIFT]);
-    STAM_COUNTER_INC(&pPGMCPU->CTX_SUFF(pStats)->StatR0DynMapGCPageInlRamHits);
+    STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatR0DynMapGCPageInlRamHits);
 
     /*
      * pgmR0DynMapHCPageInlined with out stats.
      */
-    PPGMMAPSET pSet = &pPGMCPU->AutoSet;
+    PPGMMAPSET pSet = &pVCpu->pgm.s.AutoSet;
     Assert(!(HCPhys & PAGE_OFFSET_MASK));
     Assert(pSet->cEntries <= RT_ELEMENTS(pSet->aEntries));
@@ -430 +424 @@
     {
         *ppv = (void *)((uintptr_t)pSet->aEntries[iEntry].pvPage | (PAGE_OFFSET_MASK & (uintptr_t)GCPhys));
-        STAM_COUNTER_INC(&pPGMCPU->CTX_SUFF(pStats)->StatR0DynMapGCPageInlHits);
+        STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatR0DynMapGCPageInlHits);
     }
     else
     {
-        STAM_COUNTER_INC(&pPGMCPU->CTX_SUFF(pStats)->StatR0DynMapGCPageInlMisses);
-        pgmR0DynMapHCPageCommon(pVM, pSet, HCPhys, ppv);
+        STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatR0DynMapGCPageInlMisses);
+        pgmR0DynMapHCPageCommon(pSet, HCPhys, ppv);
         *ppv = (void *)((uintptr_t)*ppv | (PAGE_OFFSET_MASK & (uintptr_t)GCPhys));
     }
 
-    STAM_PROFILE_STOP(&pPGMCPU->CTX_SUFF(pStats)->StatR0DynMapGCPageInl, a);
+    STAM_PROFILE_STOP(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatR0DynMapGCPageInl, a);
     return VINF_SUCCESS;
 }
@@ -453 +447 @@
  * @param   pPage       The page.
  */
-DECLINLINE(void *) pgmPoolMapPageInlined(PPGM pPGM, PPGMPOOLPAGE pPage)
+DECLINLINE(void *) pgmPoolMapPageInlined(PVM pVM, PPGMPOOLPAGE pPage)
 {
     if (pPage->idx >= PGMPOOL_IDX_FIRST)
     {
-        Assert(pPage->idx < pPGM->CTX_SUFF(pPool)->cCurPages);
+        Assert(pPage->idx < pVM->pgm.s.CTX_SUFF(pPool)->cCurPages);
         void *pv;
 # ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
-        pgmR0DynMapHCPageInlined(pPGM, pPage->Core.Key, &pv);
+        pgmR0DynMapHCPageInlined(VMMGetCpu(pVM), pPage->Core.Key, &pv);
 # else
-        PGMDynMapHCPage(PGM2VM(pPGM), pPage->Core.Key, &pv);
+        PGMDynMapHCPage(pVM, pPage->Core.Key, &pv);
 # endif
         return pv;
@@ -477 +471 @@
  *
  * @returns The address corresponding to HCPhys.
- * @param   pPGM        Pointer to the PVM instance data.
+ * @param   pVM         The VM handle.
  * @param   HCPhys      HC Physical address of the page.
  */
-DECLINLINE(void *) pgmDynMapHCPageOff(PPGM pPGM, RTHCPHYS HCPhys)
+DECLINLINE(void *) pgmDynMapHCPageOff(PVM pVM, RTHCPHYS HCPhys)
 {
     void *pv;
 # ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
-    pgmR0DynMapHCPageInlined(pPGM, HCPhys & ~(RTHCPHYS)PAGE_OFFSET_MASK, &pv);
+    pgmR0DynMapHCPageInlined(VMMGetCpu(pVM), HCPhys & ~(RTHCPHYS)PAGE_OFFSET_MASK, &pv);
 # else
-    PGMDynMapHCPage(PGM2VM(pPGM), HCPhys & ~(RTHCPHYS)PAGE_OFFSET_MASK, &pv);
+    PGMDynMapHCPage(pVM, HCPhys & ~(RTHCPHYS)PAGE_OFFSET_MASK, &pv);
 # endif
     pv = (void *)((uintptr_t)pv | ((uintptr_t)HCPhys & PAGE_OFFSET_MASK));
@@ -617 +611 @@
 {
 #ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
-    int rc = pgmR0DynMapGCPageInlined(&pVCpu->CTX_SUFF(pVM)->pgm.s, pVCpu->pgm.s.GCPhysCR3, (void **)ppPd);
+    int rc = pgmR0DynMapGCPageInlined(pVCpu, pVCpu->pgm.s.GCPhysCR3, (void **)ppPd);
     if (RT_FAILURE(rc))
     {
@@ -642 +636 @@
 #ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
     PX86PD pGuestPD = NULL;
-    int rc = pgmR0DynMapGCPageInlined(&pVCpu->CTX_SUFF(pVM)->pgm.s, pVCpu->pgm.s.GCPhysCR3, (void **)&pGuestPD);
+    int rc = pgmR0DynMapGCPageInlined(pVCpu, pVCpu->pgm.s.GCPhysCR3, (void **)&pGuestPD);
     if (RT_FAILURE(rc))
     {
@@ -671 +665 @@
 {
 #ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
-    int rc = pgmR0DynMapGCPageOffInlined(&pVCpu->CTX_SUFF(pVM)->pgm.s, pVCpu->pgm.s.GCPhysCR3, (void **)ppPdpt);
+    int rc = pgmR0DynMapGCPageOffInlined(pVCpu, pVCpu->pgm.s.GCPhysCR3, (void **)ppPdpt);
     if (RT_FAILURE(rc))
     {
@@ -715 +709 @@
 #ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
     PX86PDPT pGuestPDPT = NULL;
-    int rc = pgmR0DynMapGCPageOffInlined(&pVCpu->CTX_SUFF(pVM)->pgm.s, pVCpu->pgm.s.GCPhysCR3, (void **)&pGuestPDPT);
+    int rc = pgmR0DynMapGCPageOffInlined(pVCpu, pVCpu->pgm.s.GCPhysCR3, (void **)&pGuestPDPT);
     AssertRCReturn(rc, NULL);
 #else
@@ -751 +745 @@
 #ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
             PX86PDPAE   pGuestPD = NULL;
-            int rc = pgmR0DynMapGCPageInlined(&pVCpu->CTX_SUFF(pVM)->pgm.s,
+            int rc = pgmR0DynMapGCPageInlined(pVCpu,
                                               pGuestPDPT->a[iPdpt].u & X86_PDPE_PG_MASK,
                                               (void **)&pGuestPD);
@@ -803 +797 @@
 #ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
     PX86PDPAE   pGuestPD = NULL;
-    int rc = pgmR0DynMapGCPageInlined(&pVCpu->CTX_SUFF(pVM)->pgm.s,
+    int rc = pgmR0DynMapGCPageInlined(pVCpu,
                                       pGuestPDPT->a[iPdpt].u & X86_PDPE_PG_MASK,
                                       (void **)&pGuestPD);
@@ -834 +828 @@
 {
 #ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
-    int rc = pgmR0DynMapGCPageInlined(&pVCpu->CTX_SUFF(pVM)->pgm.s, pVCpu->pgm.s.GCPhysCR3, (void **)ppPml4);
+    int rc = pgmR0DynMapGCPageInlined(pVCpu, pVCpu->pgm.s.GCPhysCR3, (void **)ppPml4);
     if (RT_FAILURE(rc))
     {
@@ -876 +870 @@
 #ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
     PX86PML4 pGuestPml4;
-    int rc = pgmR0DynMapGCPageInlined(&pVCpu->CTX_SUFF(pVM)->pgm.s, pVCpu->pgm.s.GCPhysCR3, (void **)&pGuestPml4);
+    int rc = pgmR0DynMapGCPageInlined(pVCpu, pVCpu->pgm.s.GCPhysCR3, (void **)&pGuestPml4);
     AssertRCReturn(rc, NULL);
 #else
@@ -998 +992 @@
 DECLINLINE(PX86PD) pgmShwGet32BitPDPtr(PVMCPU pVCpu)
 {
-    return (PX86PD)PGMPOOL_PAGE_2_PTR(pVCpu->CTX_SUFF(pVM), pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));
+    return (PX86PD)PGMPOOL_PAGE_2_PTR_V2(pVCpu->CTX_SUFF(pVM), pVCpu, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));
 }
 
@@ -1049 +1043 @@
 DECLINLINE(PX86PDPT) pgmShwGetPaePDPTPtr(PVMCPU pVCpu)
 {
-    return (PX86PDPT)PGMPOOL_PAGE_2_PTR(pVCpu->CTX_SUFF(pVM), pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));
+    return (PX86PDPT)PGMPOOL_PAGE_2_PTR_V2(pVCpu->CTX_SUFF(pVM), pVCpu, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));
 }
 
@@ -1073 +1067 @@
     AssertReturn(pShwPde, NULL);
 
-    return (PX86PDPAE)PGMPOOL_PAGE_2_PTR(pVM, pShwPde);
+    return (PX86PDPAE)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPde);
 }
 
@@ -1096 +1090 @@
     AssertReturn(pShwPde, NULL);
 
-    return (PX86PDPAE)PGMPOOL_PAGE_2_PTR(pVM, pShwPde);
+    return (PX86PDPAE)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPde);
 }
 
@@ -1148 +1142 @@
 DECLINLINE(PX86PML4) pgmShwGetLongModePML4Ptr(PVMCPU pVCpu)
 {
-    return (PX86PML4)PGMPOOL_PAGE_2_PTR(pVCpu->CTX_SUFF(pVM), pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));
+    return (PX86PML4)PGMPOOL_PAGE_2_PTR_V2(pVCpu->CTX_SUFF(pVM), pVCpu, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));
 }
 

trunk/src/VBox/VMM/PGMInternal.h

@@ -241 +241 @@
 #elif defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
 # define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) \
-     pgmR0DynMapHCPageInlined(&(pVM)->pgm.s, HCPhys, (void **)(ppv))
+     pgmR0DynMapHCPageInlined(VMMGetCpu(pVM), HCPhys, (void **)(ppv))
 #else
 # define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) \
@@ -264 +264 @@
 #elif defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
 # define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) \
-     pgmR0DynMapGCPageInlined(&(pVM)->pgm.s, GCPhys, (void **)(ppv))
+     pgmR0DynMapGCPageInlined(VMMGetCpu(pVM), GCPhys, (void **)(ppv))
 #else
 # define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) \
@@ -284 +284 @@
 #ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
 # define PGM_GCPHYS_2_PTR_BY_VMCPU(pVCpu, GCPhys, ppv) \
-     pgmR0DynMapGCPageInlined(&(pVCpu)->CTX_SUFF(pVM)->pgm.s, GCPhys, (void **)(ppv))
+     pgmR0DynMapGCPageInlined(pVCpu, GCPhys, (void **)(ppv))
 #else
 # define PGM_GCPHYS_2_PTR_BY_VMCPU(pVCpu, GCPhys, ppv) \
      PGM_GCPHYS_2_PTR((pVCpu)->CTX_SUFF(pVM), GCPhys, ppv)
-#endif
-
-/** @def PGM_GCPHYS_2_PTR_BY_PGMCPU
- * Maps a GC physical page address to a virtual address.
- *
- * @returns VBox status code.
- * @param   pPGM    Pointer to the PGM instance data.
- * @param   GCPhys  The GC physical address to map to a virtual one.
- * @param   ppv     Where to store the virtual address. No need to cast this.
- *
- * @remark  In GC this uses PGMGCDynMapGCPage(), so it will consume of the
- *          small page window employeed by that function. Be careful.
- * @remark  There is no need to assert on the result.
- */
-#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
-# define PGM_GCPHYS_2_PTR_BY_PGMCPU(pPGM, GCPhys, ppv) \
-     pgmR0DynMapGCPageInlined(PGMCPU2PGM(pPGM), GCPhys, (void **)(ppv))
-#else
-# define PGM_GCPHYS_2_PTR_BY_PGMCPU(pPGM, GCPhys, ppv) \
-     PGM_GCPHYS_2_PTR(PGMCPU2VM(pPGM), GCPhys, ppv)
 #endif
 
@@ -2160 +2140 @@
  */
 #if defined(IN_RC)
-# define PGMPOOL_PAGE_2_PTR(pVM, pPage)  pgmPoolMapPageInlined(&(pVM)->pgm.s, (pPage))
+# define PGMPOOL_PAGE_2_PTR(pVM, pPage)  pgmPoolMapPageInlined((pVM), (pPage))
 #elif defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
-# define PGMPOOL_PAGE_2_PTR(pVM, pPage)  pgmPoolMapPageInlined(&(pVM)->pgm.s, (pPage))
+# define PGMPOOL_PAGE_2_PTR(pVM, pPage)  pgmPoolMapPageInlined((pVM), (pPage))
 #elif defined(VBOX_STRICT)
 # define PGMPOOL_PAGE_2_PTR(pVM, pPage)  pgmPoolMapPageStrict(pPage)
@@ -2172 +2152 @@
 #else
 # define PGMPOOL_PAGE_2_PTR(pVM, pPage)  ((pPage)->pvPageR3)
+#endif
+
+
+/** @def PGMPOOL_PAGE_2_PTR_V2
+ * Maps a pool page pool into the current context, taking both VM and VMCPU.
+ *
+ * @returns VBox status code.
+ * @param   pVM     The VM handle.
+ * @param   pVCpu   The current CPU.
+ * @param   pPage   The pool page.
+ *
+ * @remark  In RC this uses PGMGCDynMapHCPage(), so it will consume of the
+ *          small page window employeed by that function. Be careful.
+ * @remark  There is no need to assert on the result.
+ */
+#if defined(IN_RC)
+# define PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pPage)   pgmPoolMapPageInlined((pVM), (pPage))
+#elif defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
+# define PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pPage)   pgmPoolMapPageInlined((pVM), (pPage))
+#else
+# define PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pPage)   PGMPOOL_PAGE_2_PTR((pVM), (pPage))
 #endif
 
@@ -3581 +3582 @@
 #endif /* IN_RING3 */
 #ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
-int             pgmR0DynMapHCPageCommon(PVM pVM, PPGMMAPSET pSet, RTHCPHYS HCPhys, void **ppv);
+int             pgmR0DynMapHCPageCommon(PPGMMAPSET pSet, RTHCPHYS HCPhys, void **ppv);
 #endif
 int             pgmPoolAllocEx(PVM pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, PGMPOOLACCESS enmAccess, uint16_t iUser, uint32_t iUserTable, PPPGMPOOLPAGE ppPage, bool fLockPage = false);

trunk/src/VBox/VMM/PGMPool.cpp

@@ -637 +637 @@
                     if (pPage->cPresent)
                     {
-                        void *pvShw = PGMPOOL_PAGE_2_PTR(pPool->CTX_SUFF(pVM), pPage);
+                        void *pvShw = PGMPOOL_PAGE_2_PTR_V2(pPool->CTX_SUFF(pVM), pVCpu, pPage);
                         STAM_PROFILE_START(&pPool->StatZeroPage, z);
 #if 0

trunk/src/VBox/VMM/VMMAll/PGMAll.cpp

@@ -1001 +1001 @@
         pgmPoolCacheUsed(pPool, pShwPage);
     }
-    *ppPD = (PX86PDPAE)PGMPOOL_PAGE_2_PTR(pVM, pShwPage);
+    *ppPD = (PX86PDPAE)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPage);
     return VINF_SUCCESS;
 }
@@ -1105 +1105 @@
 
     const unsigned iPdPt = (GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_AMD64;
-    PX86PDPT  pPdpt = (PX86PDPT)PGMPOOL_PAGE_2_PTR(pVM, pShwPage);
+    PX86PDPT  pPdpt = (PX86PDPT)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPage);
     PX86PDPE  pPdpe = &pPdpt->a[iPdPt];
 
@@ -1142 +1142 @@
              | (uGstPdpe & ~(X86_PDPE_PG_MASK | X86_PDPE_AVL_MASK | X86_PDPE_PCD | X86_PDPE_PWT));
 
-    *ppPD = (PX86PDPAE)PGMPOOL_PAGE_2_PTR(pVM, pShwPage);
+    *ppPD = (PX86PDPAE)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPage);
     return VINF_SUCCESS;
 }
@@ -1179 +1179 @@
 
     const unsigned  iPdPt = (GCPtr >> X86_PDPT_SHIFT) & X86_PDPT_MASK_AMD64;
-    PCX86PDPT       pPdpt = *ppPdpt = (PX86PDPT)PGMPOOL_PAGE_2_PTR(pVM, pShwPage);
+    PCX86PDPT       pPdpt = *ppPdpt = (PX86PDPT)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPage);
     if (!pPdpt->a[iPdPt].n.u1Present)
         return VERR_PAGE_DIRECTORY_PTR_NOT_PRESENT;
@@ -1186 +1186 @@
     AssertReturn(pShwPage, VERR_INTERNAL_ERROR);
 
-    *ppPD = (PX86PDPAE)PGMPOOL_PAGE_2_PTR(pVM, pShwPage);
+    *ppPD = (PX86PDPAE)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPage);
     return VINF_SUCCESS;
 }
@@ -1214 +1214 @@
     Assert(PGMIsLockOwner(pVM));
 
-    pPml4 = (PEPTPML4)PGMPOOL_PAGE_2_PTR(pVM, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));
+    pPml4 = (PEPTPML4)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));
     Assert(pPml4);
 
@@ -1242 +1242 @@
 
     const unsigned iPdPt = (GCPtr >> EPT_PDPT_SHIFT) & EPT_PDPT_MASK;
-    PEPTPDPT  pPdpt = (PEPTPDPT)PGMPOOL_PAGE_2_PTR(pVM, pShwPage);
+    PEPTPDPT  pPdpt = (PEPTPDPT)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPage);
     PEPTPDPTE pPdpe = &pPdpt->a[iPdPt];
 
@@ -1270 +1270 @@
     pPdpe->n.u1Execute  = 1;
 
-    *ppPD = (PEPTPD)PGMPOOL_PAGE_2_PTR(pVM, pShwPage);
+    *ppPD = (PEPTPD)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPage);
     return VINF_SUCCESS;
 }
@@ -2289 +2289 @@
             //Log(("PGMDynMapGCPage: GCPhys=%RGp pPage=%R[pgmpage]\n", GCPhys, pPage));
 #ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
-            rc = pgmR0DynMapHCPageInlined(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage), ppv);
+            rc = pgmR0DynMapHCPageInlined(VMMGetCpu(pVM), PGM_PAGE_GET_HCPHYS(pPage), ppv);
 #else
             rc = PGMDynMapHCPage(pVM, PGM_PAGE_GET_HCPHYS(pPage), ppv);

trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

@@ -1095 +1095 @@
     Assert(pShwPde);
 
-    pPDDst             = (PX86PDPAE)PGMPOOL_PAGE_2_PTR(pVM, pShwPde);
+    pPDDst             = (PX86PDPAE)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPde);
     PX86PDEPAE pPdeDst = &pPDDst->a[iPDDst];
 
@@ -1232 +1232 @@
 # if 0 /* likely cause of a major performance regression; must be SyncPageWorkerTrackDeref then */
                 const unsigned iPTEDst = (GCPtrPage >> SHW_PT_SHIFT) & SHW_PT_MASK;
-                PSHWPT pPT = (PSHWPT)PGMPOOL_PAGE_2_PTR(pVM, pShwPage);
+                PSHWPT pPT = (PSHWPT)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPage);
                 if (pPT->a[iPTEDst].n.u1Present)
                 {
@@ -1743 +1743 @@
     Assert(pShwPde);
 
-    pPDDst             = (PX86PDPAE)PGMPOOL_PAGE_2_PTR(pVM, pShwPde);
+    pPDDst             = (PX86PDPAE)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPde);
     PX86PDEPAE pPdeDst = &pPDDst->a[iPDDst];
 
@@ -1820 +1820 @@
         if (PdeSrc.n.u1Accessed)
         {
-            PSHWPT pPTDst = (PSHWPT)PGMPOOL_PAGE_2_PTR(pVM, pShwPage);
+            PSHWPT pPTDst = (PSHWPT)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPage);
             if (!fBigPage)
             {
@@ -2107 +2107 @@
 
     PPGMPOOLPAGE  pShwPage = pgmPoolGetPage(pPool, PdeDst.u & SHW_PDE_PG_MASK);
-    PSHWPT        pPTDst   = (PSHWPT)PGMPOOL_PAGE_2_PTR(pVM, pShwPage);
+    PSHWPT        pPTDst   = (PSHWPT)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPage);
 
     Assert(cPages == 1 || !(uErr & X86_TRAP_PF_P));
@@ -2312 +2312 @@
             if (pShwPage)
             {
-                PSHWPT      pPTDst   = (PSHWPT)PGMPOOL_PAGE_2_PTR(pVM, pShwPage);
+                PSHWPT      pPTDst   = (PSHWPT)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPage);
                 PSHWPTE     pPteDst  = &pPTDst->a[(GCPtrPage >> SHW_PT_SHIFT) & SHW_PT_MASK];
                 if (    pPteDst->n.u1Present
@@ -2360 +2360 @@
         if (pShwPage)
         {
-            PSHWPT      pPTDst   = (PSHWPT)PGMPOOL_PAGE_2_PTR(pVM, pShwPage);
+            PSHWPT      pPTDst   = (PSHWPT)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPage);
             PSHWPTE     pPteDst  = &pPTDst->a[(GCPtrPage >> SHW_PT_SHIFT) & SHW_PT_MASK];
             if (pPteDst->n.u1Present)    /** @todo Optimize accessed bit emulation? */
@@ -2497 +2497 @@
     Assert(pShwPde);
 
-    pPDDst  = (PX86PDPAE)PGMPOOL_PAGE_2_PTR(pVM, pShwPde);
+    pPDDst  = (PX86PDPAE)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPde);
     pPdeDst = &pPDDst->a[iPDDst];
 
@@ -2612 +2612 @@
         }
         if (rc == VINF_SUCCESS)
-            pPTDst = (PSHWPT)PGMPOOL_PAGE_2_PTR(pVM, pShwPage);
+            pPTDst = (PSHWPT)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPage);
         else if (rc == VINF_PGM_CACHED_PAGE)
         {
@@ -2951 +2951 @@
     Assert(pShwPde);
 
-    pPDDst  = (PX86PDPAE)PGMPOOL_PAGE_2_PTR(pVM, pShwPde);
+    pPDDst  = (PX86PDPAE)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPde);
     pPdeDst = &pPDDst->a[iPDDst];
 
@@ -3081 +3081 @@
     if (    rc == VINF_SUCCESS
         ||  rc == VINF_PGM_CACHED_PAGE)
-        pPTDst = (PSHWPT)PGMPOOL_PAGE_2_PTR(pVM, pShwPage);
+        pPTDst = (PSHWPT)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPage);
     else
         AssertMsgFailedReturn(("rc=%Rrc\n", rc), VERR_INTERNAL_ERROR);
@@ -3821 +3821 @@
                         continue;
                     }
-                    const SHWPT *pPTDst = (const SHWPT *)PGMPOOL_PAGE_2_PTR(pVM, pPoolPage);
+                    const SHWPT *pPTDst = (const SHWPT *)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pPoolPage);
 
                     if (PdeDst.u & (X86_PDE4M_PWT | X86_PDE4M_PCD))

trunk/src/VBox/VMM/VMMAll/PGMAllMap.cpp

@@ -426 +426 @@
             case PGMMODE_32_BIT:
             {
-                PX86PD          pShw32BitPd = (PX86PD)PGMPOOL_PAGE_2_PTR(pVM, pShwPageCR3);
+                PX86PD          pShw32BitPd = (PX86PD)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPageCR3);
                 AssertFatal(pShw32BitPd);
 
@@ -439 +439 @@
                 const unsigned  iPdpt     = iOldPDE / 256;      /* iOldPDE * 2 / 512; iOldPDE is in 4 MB pages */
                 unsigned        iPaePde   = iOldPDE * 2 % 512;
-                PX86PDPT        pShwPdpt  = (PX86PDPT)PGMPOOL_PAGE_2_PTR(pVM, pShwPageCR3);
+                PX86PDPT        pShwPdpt  = (PX86PDPT)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPageCR3);
                 PX86PDPAE       pShwPaePd = pgmShwGetPaePDPtr(pVCpu, pShwPdpt, (iPdpt << X86_PDPT_SHIFT));
 
@@ -538 +538 @@
             case PGMMODE_32_BIT:
             {
-                PCX86PD         pShw32BitPd = (PCX86PD)PGMPOOL_PAGE_2_PTR(pVM, pShwPageCR3);
+                PCX86PD         pShw32BitPd = (PCX86PD)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu2, pShwPageCR3);
                 AssertFatal(pShw32BitPd);
 
@@ -553 +553 @@
                 const unsigned  iPdpt     = iPDE / 256;         /* iPDE * 2 / 512; iPDE is in 4 MB pages */
                 unsigned        iPaePDE   = iPDE * 2 % 512;
-                PX86PDPT        pShwPdpt  = (PX86PDPT)PGMPOOL_PAGE_2_PTR(pVM, pShwPageCR3);
+                PX86PDPT        pShwPdpt  = (PX86PDPT)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pShwPageCR3);
                 PCX86PDPAE      pShwPaePd = pgmShwGetPaePDPtr(pVCpu, pShwPdpt, iPdpt << X86_PDPT_SHIFT);
                 AssertFatal(pShwPaePd);

trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp

@@ -749 +749 @@
      * Map it by HCPhys.
      */
-    return pgmR0DynMapHCPageInlined(&pVM->pgm.s, HCPhys, ppv);
+    return pgmR0DynMapHCPageInlined(VMMGetCpu(pVM), HCPhys, ppv);
 
 #else
@@ -826 +826 @@
     Assert(HCPhys != pVM->pgm.s.HCPhysZeroPg);
 # ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
-    pgmR0DynMapHCPageInlined(&pVM->pgm.s, HCPhys, ppv);
+    pgmR0DynMapHCPageInlined(VMMGetCpu(pVM), HCPhys, ppv);
 # else
     PGMDynMapHCPage(pVM, HCPhys, ppv);
@@ -1163 +1163 @@
      */
 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
-    *ppv = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK));
+    *ppv = pgmDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK));
 #else
     PPGMPAGEMAPTLBE pTlbe;
@@ -1201 +1201 @@
      */
 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
-    *ppv = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK)); /** @todo add a read only flag? */
+    *ppv = pgmDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK)); /** @todo add a read only flag? */
 #else
     PPGMPAGEMAPTLBE pTlbe;
@@ -1259 +1259 @@
         if (RT_SUCCESS(rc))
         {
-            *ppv = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK)); /** @todo add a read only flag? */
+            *ppv = pgmDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK)); /** @todo add a read only flag? */
 # if 0
             pLock->pvMap = 0;
@@ -1370 +1370 @@
         else
         {
-            *ppv = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK)); /** @todo add a read only flag? */
+            *ppv = pgmDynMapHCPageOff(pVM, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK)); /** @todo add a read only flag? */
 # if 0
             pLock->pvMap = 0;

trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

@@ -102 +102 @@
 DECLINLINE(void *) PGMPOOL_PAGE_2_LOCKED_PTR(PVM pVM, PPGMPOOLPAGE pPage)
 {
-    void *pv = pgmPoolMapPageInlined(&pVM->pgm.s, pPage);
+    void *pv = pgmPoolMapPageInlined(pVM, pPage);
 
     /* Make sure the dynamic mapping will not be reused. */

trunk/src/VBox/VMM/VMMR0/PGMR0DynMap.cpp

@@ -81 +81 @@
 #endif
 
+/** Converts a PGMCPUM::AutoSet pointer into a PVMCPU. */
+#define PGMR0DYNMAP_2_VMCPU(pSet)           (RT_FROM_MEMBER(pSet, VMCPU, pgm.s.AutoSet))
+
+/** Converts a PGMCPUM::AutoSet pointer into a PVM. */
+#define PGMR0DYNMAP_2_VM(pSet)              (PGMR0DYNMAP_2_VMCPU(pSet)->CTX_SUFF(pVM))
+
 
 /*******************************************************************************
@@ -1179 +1185 @@
  * @param   HCPhys      The address of the page to be mapped.
  * @param   iPage       The page index pgmR0DynMapPage hashed HCPhys to.
- * @param   pVM         The shared VM structure, for statistics only.
- */
-static uint32_t pgmR0DynMapPageSlow(PPGMR0DYNMAP pThis, RTHCPHYS HCPhys, uint32_t iPage, PVM pVM)
+ */
+static uint32_t pgmR0DynMapPageSlow(PPGMR0DYNMAP pThis, RTHCPHYS HCPhys, uint32_t iPage)
 {
 #ifdef VBOX_WITH_STATISTICS
-    PVMCPU pVCpu = VMMGetCpu(pVM);
+    PVMCPU pVCpu = PGMR0DYNMAP_2_VMCPU(pThis);
 #endif
     STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatR0DynMapPageSlow);
@@ -1280 +1285 @@
  * @param   HCPhys      The address of the page to be mapped.
  * @param   iRealCpu    The real cpu set index. (optimization)
- * @param   pVM         The shared VM structure, for statistics only.
  * @param   ppvPage     Where to the page address.
  */
-DECLINLINE(uint32_t) pgmR0DynMapPage(PPGMR0DYNMAP pThis, RTHCPHYS HCPhys, int32_t iRealCpu, PVM pVM, void **ppvPage)
+DECLINLINE(uint32_t) pgmR0DynMapPage(PPGMR0DYNMAP pThis, RTHCPHYS HCPhys, int32_t iRealCpu, void **ppvPage)
 {
 #ifdef VBOX_WITH_STATISTICS
-    PVMCPU              pVCpu   = VMMGetCpu(pVM);
+    PVMCPU              pVCpu   = PGMR0DYNMAP_2_VMCPU(pThis);
 #endif
     RTSPINLOCKTMP       Tmp     = RTSPINLOCKTMP_INITIALIZER;
@@ -1324 +1328 @@
             else
             {
-                iPage = pgmR0DynMapPageSlow(pThis, HCPhys, iPage, pVM);
+                iPage = pgmR0DynMapPageSlow(pThis, HCPhys, iPage);
                 if (RT_UNLIKELY(iPage == UINT32_MAX))
                 {
@@ -1829 +1833 @@
  *
  * @returns VINF_SUCCESS, bails out to ring-3 on failure.
- * @param   pVM         The shared VM structure (for statistics).
  * @param   pSet        The set.
  * @param   HCPhys      The physical address of the page.
@@ -1836 +1839 @@
  * @remarks This is a very hot path.
  */
-int pgmR0DynMapHCPageCommon(PVM pVM, PPGMMAPSET pSet, RTHCPHYS HCPhys, void **ppv)
-{
-    LogFlow(("pgmR0DynMapHCPageCommon: pVM=%p pSet=%p HCPhys=%RHp ppv=%p\n",
-             pVM, pSet, HCPhys, ppv));
+int pgmR0DynMapHCPageCommon(PPGMMAPSET pSet, RTHCPHYS HCPhys, void **ppv)
+{
+    LogFlow(("pgmR0DynMapHCPageCommon: pSet=%p HCPhys=%RHp ppv=%p\n", pSet, HCPhys, ppv));
 #ifdef VBOX_WITH_STATISTICS
-    PVMCPU pVCpu = VMMGetCpu(pVM);
+    PVMCPU pVCpu = PGMR0DYNMAP_2_VMCPU(pSet);
 #endif
     AssertMsg(pSet->iCpu == RTMpCpuIdToSetIndex(RTMpCpuId()), ("%d %d(%d) efl=%#x\n", pSet->iCpu, RTMpCpuIdToSetIndex(RTMpCpuId()), RTMpCpuId(), ASMGetFlags()));
@@ -1849 +1851 @@
      */
     void *pvPage;
-    uint32_t const  iPage = pgmR0DynMapPage(g_pPGMR0DynMap, HCPhys, pSet->iCpu, pVM, &pvPage);
+    uint32_t const  iPage = pgmR0DynMapPage(g_pPGMR0DynMap, HCPhys, pSet->iCpu, &pvPage);
     if (RT_UNLIKELY(iPage == UINT32_MAX))
     {
@@ -1855 +1857 @@
                          g_pPGMR0DynMap->cLoad, g_pPGMR0DynMap->cMaxLoad, g_pPGMR0DynMap->cPages, g_pPGMR0DynMap->cGuardPages);
         if (!g_fPGMR0DynMapTestRunning)
-            VMMRZCallRing3NoCpu(pVM, VMMCALLRING3_VM_R0_ASSERTION, 0);
+            VMMRZCallRing3NoCpu(PGMR0DYNMAP_2_VM(pSet), VMMCALLRING3_VM_R0_ASSERTION, 0);
         *ppv = NULL;
         return VERR_PGM_DYNMAP_FAILED;
@@ -1951 +1953 @@
                 RTAssertMsg2Weak("PGMDynMapHCPage: set is full!\n");
                 if (!g_fPGMR0DynMapTestRunning)
-                    VMMRZCallRing3NoCpu(pVM, VMMCALLRING3_VM_R0_ASSERTION, 0);
+                    VMMRZCallRing3NoCpu(PGMR0DYNMAP_2_VM(pSet), VMMCALLRING3_VM_R0_ASSERTION, 0);
                 *ppv = NULL;
                 return VERR_PGM_DYNMAP_FULL_SET;
@@ -1987 +1989 @@
      * Call common code.
      */
-    int rc = pgmR0DynMapHCPageCommon(pVM, pSet, HCPhys, ppv);
+    int rc = pgmR0DynMapHCPageCommon(pSet, HCPhys, ppv);
 
     STAM_PROFILE_STOP(&pVCpu->pgm.s.StatR0DynMapHCPage, a);