Changeset 31197 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Jul 29, 2010 9:35:06 AM (14 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/PGM.cpp
r31141 r31197 1237 1237 ); 1238 1238 AssertLogRelRCReturn(rc, rc); 1239 pVM->pgm.s.fRamPreAlloc = true; 1239 1240 1240 1241 #ifdef PGM_WITH_LARGE_ADDRESS_SPACE_ON_32_BIT_HOST -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r31169 r31197 1292 1292 1293 1293 /** 1294 * Loads a minimal guest state1295 *1296 * NOTE: Don't do anything here that can cause a jump back to ring 3!!!!!1297 *1298 * @param pVM The VM to operate on.1299 * @param pVCpu The VMCPU to operate on.1300 * @param pCtx Guest context1301 */1302 VMMR0DECL(void) VMXR0LoadMinimalGuestState(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)1303 {1304 int rc;1305 X86EFLAGS eflags;1306 1307 Assert(!(pVCpu->hwaccm.s.fContextUseFlags & HWACCM_CHANGED_ALL_GUEST));1308 1309 /* EIP, ESP and EFLAGS */1310 rc = VMXWriteVMCS64(VMX_VMCS64_GUEST_RIP, pCtx->rip);1311 rc |= VMXWriteVMCS64(VMX_VMCS64_GUEST_RSP, pCtx->rsp);1312 AssertRC(rc);1313 1314 /* Bits 22-31, 15, 5 & 3 must be zero. Bit 1 must be 1. */1315 eflags = pCtx->eflags;1316 eflags.u32 &= VMX_EFLAGS_RESERVED_0;1317 eflags.u32 |= VMX_EFLAGS_RESERVED_1;1318 1319 /* Real mode emulation using v86 mode. */1320 if ( CPUMIsGuestInRealModeEx(pCtx)1321 && pVM->hwaccm.s.vmx.pRealModeTSS)1322 {1323 pVCpu->hwaccm.s.vmx.RealMode.eflags = eflags;1324 1325 eflags.Bits.u1VM = 1;1326 eflags.Bits.u2IOPL = 0; /* must always be 0 or else certain instructions won't cause faults. */1327 }1328 rc = VMXWriteVMCS(VMX_VMCS_GUEST_RFLAGS, eflags.u32);1329 AssertRC(rc);1330 }1331 1332 /**1333 1294 * Loads the guest state 1334 1295 * … … 1344 1305 int rc = VINF_SUCCESS; 1345 1306 RTGCUINTPTR val; 1307 X86EFLAGS eflags; 1346 1308 1347 1309 /* VMX_VMCS_CTRL_ENTRY_CONTROLS … … 1811 1773 } 1812 1774 1775 /* EIP, ESP and EFLAGS */ 1776 rc = VMXWriteVMCS64(VMX_VMCS64_GUEST_RIP, pCtx->rip); 1777 rc |= VMXWriteVMCS64(VMX_VMCS64_GUEST_RSP, pCtx->rsp); 1778 AssertRC(rc); 1779 1780 /* Bits 22-31, 15, 5 & 3 must be zero. Bit 1 must be 1. */ 1781 eflags = pCtx->eflags; 1782 eflags.u32 &= VMX_EFLAGS_RESERVED_0; 1783 eflags.u32 |= VMX_EFLAGS_RESERVED_1; 1784 1785 /* Real mode emulation using v86 mode. */ 1786 if ( CPUMIsGuestInRealModeEx(pCtx) 1787 && pVM->hwaccm.s.vmx.pRealModeTSS) 1788 { 1789 pVCpu->hwaccm.s.vmx.RealMode.eflags = eflags; 1790 1791 eflags.Bits.u1VM = 1; 1792 eflags.Bits.u2IOPL = 0; /* must always be 0 or else certain instructions won't cause faults. */ 1793 } 1794 rc = VMXWriteVMCS(VMX_VMCS_GUEST_RFLAGS, eflags.u32); 1795 AssertRC(rc); 1796 1797 if (TMCpuTickCanUseRealTSC(pVCpu, &pVCpu->hwaccm.s.vmx.u64TSCOffset)) 1798 { 1799 uint64_t u64CurTSC = ASMReadTSC(); 1800 if (u64CurTSC + pVCpu->hwaccm.s.vmx.u64TSCOffset >= TMCpuTickGetLastSeen(pVCpu)) 1801 { 1802 /* Note: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDTSC_EXIT takes precedence over TSC_OFFSET */ 1803 rc = VMXWriteVMCS64(VMX_VMCS_CTRL_TSC_OFFSET_FULL, pVCpu->hwaccm.s.vmx.u64TSCOffset); 1804 AssertRC(rc); 1805 1806 pVCpu->hwaccm.s.vmx.proc_ctls &= ~VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDTSC_EXIT; 1807 rc = VMXWriteVMCS(VMX_VMCS_CTRL_PROC_EXEC_CONTROLS, pVCpu->hwaccm.s.vmx.proc_ctls); 1808 AssertRC(rc); 1809 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatTSCOffset); 1810 } 1811 else 1812 { 1813 /* Fall back to rdtsc emulation as we would otherwise pass decreasing tsc values to the guest. */ 1814 LogFlow(("TSC %RX64 offset %RX64 time=%RX64 last=%RX64 (diff=%RX64, virt_tsc=%RX64)\n", u64CurTSC, pVCpu->hwaccm.s.vmx.u64TSCOffset, u64CurTSC + pVCpu->hwaccm.s.vmx.u64TSCOffset, TMCpuTickGetLastSeen(pVCpu), TMCpuTickGetLastSeen(pVCpu) - u64CurTSC - pVCpu->hwaccm.s.vmx.u64TSCOffset, TMCpuTickGet(pVCpu))); 1815 pVCpu->hwaccm.s.vmx.proc_ctls |= VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDTSC_EXIT; 1816 rc = VMXWriteVMCS(VMX_VMCS_CTRL_PROC_EXEC_CONTROLS, pVCpu->hwaccm.s.vmx.proc_ctls); 1817 AssertRC(rc); 1818 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatTSCInterceptOverFlow); 1819 } 1820 } 1821 else 1822 { 1823 pVCpu->hwaccm.s.vmx.proc_ctls |= VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDTSC_EXIT; 1824 rc = VMXWriteVMCS(VMX_VMCS_CTRL_PROC_EXEC_CONTROLS, pVCpu->hwaccm.s.vmx.proc_ctls); 1825 AssertRC(rc); 1826 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatTSCIntercept); 1827 } 1828 1813 1829 /* 64 bits guest mode? */ 1814 1830 if (CPUMIsGuestInLongModeEx(pCtx)) … … 1886 1902 #endif /* VBOX_WITH_AUTO_MSR_LOAD_RESTORE */ 1887 1903 1888 if (TMCpuTickCanUseRealTSC(pVCpu, &pVCpu->hwaccm.s.vmx.u64TSCOffset)) 1889 { 1890 uint64_t u64CurTSC = ASMReadTSC(); 1891 if (u64CurTSC + pVCpu->hwaccm.s.vmx.u64TSCOffset >= TMCpuTickGetLastSeen(pVCpu)) 1892 { 1893 /* Note: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDTSC_EXIT takes precedence over TSC_OFFSET */ 1894 rc = VMXWriteVMCS64(VMX_VMCS_CTRL_TSC_OFFSET_FULL, pVCpu->hwaccm.s.vmx.u64TSCOffset); 1895 AssertRC(rc); 1896 1897 pVCpu->hwaccm.s.vmx.proc_ctls &= ~VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDTSC_EXIT; 1898 rc = VMXWriteVMCS(VMX_VMCS_CTRL_PROC_EXEC_CONTROLS, pVCpu->hwaccm.s.vmx.proc_ctls); 1899 AssertRC(rc); 1900 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatTSCOffset); 1901 } 1902 else 1903 { 1904 /* Fall back to rdtsc emulation as we would otherwise pass decreasing tsc values to the guest. */ 1905 LogFlow(("TSC %RX64 offset %RX64 time=%RX64 last=%RX64 (diff=%RX64, virt_tsc=%RX64)\n", u64CurTSC, pVCpu->hwaccm.s.vmx.u64TSCOffset, u64CurTSC + pVCpu->hwaccm.s.vmx.u64TSCOffset, TMCpuTickGetLastSeen(pVCpu), TMCpuTickGetLastSeen(pVCpu) - u64CurTSC - pVCpu->hwaccm.s.vmx.u64TSCOffset, TMCpuTickGet(pVCpu))); 1906 pVCpu->hwaccm.s.vmx.proc_ctls |= VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDTSC_EXIT; 1907 rc = VMXWriteVMCS(VMX_VMCS_CTRL_PROC_EXEC_CONTROLS, pVCpu->hwaccm.s.vmx.proc_ctls); 1908 AssertRC(rc); 1909 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatTSCInterceptOverFlow); 1910 } 1911 } 1912 else 1913 { 1914 pVCpu->hwaccm.s.vmx.proc_ctls |= VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDTSC_EXIT; 1915 rc = VMXWriteVMCS(VMX_VMCS_CTRL_PROC_EXEC_CONTROLS, pVCpu->hwaccm.s.vmx.proc_ctls); 1916 AssertRC(rc); 1917 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatTSCIntercept); 1918 } 1919 1920 /* Done with the major changes */ 1904 /* Done. */ 1921 1905 pVCpu->hwaccm.s.fContextUseFlags &= ~HWACCM_CHANGED_ALL_GUEST; 1922 1906 1923 /* Minimal guest state update (esp, eip, eflags mostly) */1924 VMXR0LoadMinimalGuestState(pVM, pVCpu, pCtx);1925 1907 return rc; 1926 1908 } … … 2270 2252 RTGCUINTPTR errCode, instrInfo; 2271 2253 bool fSetupTPRCaching = false; 2272 bool fLoadMinimalGuestState = false;2273 2254 uint64_t u64OldLSTAR = 0; 2274 2255 uint8_t u8LastTPR = 0; … … 2580 2561 #endif 2581 2562 /* Save the host state first. */ 2582 if (pVCpu->hwaccm.s.fContextUseFlags & HWACCM_CHANGED_HOST_CONTEXT) 2583 { 2584 rc = VMXR0SaveHostState(pVM, pVCpu); 2585 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 2586 { 2587 VMMR0LogFlushEnable(pVCpu); 2588 goto end; 2589 } 2590 } 2591 2563 rc = VMXR0SaveHostState(pVM, pVCpu); 2564 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 2565 { 2566 VMMR0LogFlushEnable(pVCpu); 2567 goto end; 2568 } 2592 2569 /* Load the guest state */ 2593 if (fLoadMinimalGuestState) 2594 { 2595 VMXR0LoadMinimalGuestState(pVM, pVCpu, pCtx); 2596 fLoadMinimalGuestState = false; 2597 } 2598 else 2599 { 2600 rc = VMXR0LoadGuestState(pVM, pVCpu, pCtx); 2601 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 2602 { 2603 VMMR0LogFlushEnable(pVCpu); 2604 goto end; 2605 } 2570 rc = VMXR0LoadGuestState(pVM, pVCpu, pCtx); 2571 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 2572 { 2573 VMMR0LogFlushEnable(pVCpu); 2574 goto end; 2606 2575 } 2607 2576 … … 2939 2908 TRPMResetTrap(pVCpu); 2940 2909 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2Sub3, y3); 2941 fLoadMinimalGuestState = true; /* No need to do a full resync of the guest state as not much has changed */2942 2910 goto ResumeExecution; 2943 2911 } … … 3432 3400 3433 3401 TRPMResetTrap(pVCpu); 3434 fLoadMinimalGuestState = true; /* No need to do a full resync of the guest state as not much has changed */3435 3402 goto ResumeExecution; 3436 3403 } … … 3893 3860 } 3894 3861 3895 /* Only eip and some base registers changed, so no need to do a full resync of the guest state. */3896 fLoadMinimalGuestState = true;3897 3862 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatExit2Sub1, y1); 3898 3863 goto ResumeExecution;
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