- Timestamp:
- Aug 27, 2010 10:05:25 AM (14 years ago)
- Location:
- trunk/src/VBox
- Files:
-
- 10 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Debugger/DBGCEmulateCodeView.cpp
r32009 r32034 2795 2795 : "%08llx big phys=%08llx %s %s %s %s %s avl=%02x %s %s %s %s %s", 2796 2796 Pde.u, 2797 Pde.u & X86_PDE_PAE_PG_MASK _FULL,2797 Pde.u & X86_PDE_PAE_PG_MASK, 2798 2798 Pde.b.u1Present ? "p " : "np", 2799 2799 Pde.b.u1Write ? "w" : "r", … … 2813 2813 : "%08llx 4kb phys=%08llx %s %s %s %s %s avl=%02x %s %s %s %s", 2814 2814 Pde.u, 2815 Pde.u & X86_PDE_PAE_PG_MASK _FULL,2815 Pde.u & X86_PDE_PAE_PG_MASK, 2816 2816 Pde.n.u1Present ? "p " : "np", 2817 2817 Pde.n.u1Write ? "w" : "r", … … 3131 3131 iEntry = (VarGCPtr.u.GCFlat >> X86_PT_PAE_SHIFT) & X86_PT_PAE_MASK; 3132 3132 VarPTEAddr = VarCur; 3133 VarPTEAddr.u.u64Number = Pde.u & X86_PDE_PAE_PG_MASK _FULL;3133 VarPTEAddr.u.u64Number = Pde.u & X86_PDE_PAE_PG_MASK; 3134 3134 VarPTEAddr.u.u64Number += iEntry * sizeof(X86PTEPAE); 3135 3135 } -
trunk/src/VBox/VMM/PGMDbg.cpp
r32009 r32034 1204 1204 Pde.u & PGM_PDFLAGS_MAPPING ? 'm' : '-', 1205 1205 Pde.u & PGM_PDFLAGS_TRACK_DIRTY ? 'd' : '-', 1206 Pde.u & X86_PDE_PAE_PG_MASK _FULL);1206 Pde.u & X86_PDE_PAE_PG_MASK); 1207 1207 if (pState->fDumpPageInfo) 1208 pgmR3DumpHierarchyShwTablePageInfo(pState, Pde.u & X86_PDE_PAE_PG_MASK _FULL);1208 pgmR3DumpHierarchyShwTablePageInfo(pState, Pde.u & X86_PDE_PAE_PG_MASK); 1209 1209 if ((Pde.u >> 52) & 0x7ff) 1210 1210 pState->pHlp->pfnPrintf(pState->pHlp, " 62:52=%03llx!", (Pde.u >> 52) & 0x7ff); … … 1213 1213 if (cMaxDepth) 1214 1214 { 1215 int rc2 = pgmR3DumpHierarchyShwPaePT(pState, Pde.u & X86_PDE_PAE_PG_MASK _FULL, !!(Pde.u & PGM_PDFLAGS_MAPPING));1215 int rc2 = pgmR3DumpHierarchyShwPaePT(pState, Pde.u & X86_PDE_PAE_PG_MASK, !!(Pde.u & PGM_PDFLAGS_MAPPING)); 1216 1216 if (rc2 < rc && RT_SUCCESS(rc)) 1217 1217 rc = rc2; … … 1873 1873 Pde.u & RT_BIT_64(10) ? '1' : '0', 1874 1874 Pde.u & RT_BIT_64(11) ? '1' : '0', 1875 Pde.u & X86_PDE_PAE_PG_MASK _FULL);1875 Pde.u & X86_PDE_PAE_PG_MASK); 1876 1876 if (pState->fDumpPageInfo) 1877 pgmR3DumpHierarchyGstPageInfo(pState, Pde.u & X86_PDE_PAE_PG_MASK _FULL, _4K);1877 pgmR3DumpHierarchyGstPageInfo(pState, Pde.u & X86_PDE_PAE_PG_MASK, _4K); 1878 1878 pgmR3DumpHierarchyGstCheckReservedHighBits(pState, Pde.u); 1879 1879 pState->pHlp->pfnPrintf(pState->pHlp, "\n"); … … 1881 1881 if (cMaxDepth) 1882 1882 { 1883 int rc2 = pgmR3DumpHierarchyGstPaePT(pState, Pde.u & X86_PDE_PAE_PG_MASK _FULL);1883 int rc2 = pgmR3DumpHierarchyGstPaePT(pState, Pde.u & X86_PDE_PAE_PG_MASK); 1884 1884 if (rc2 < rc && RT_SUCCESS(rc)) 1885 1885 rc = rc2; -
trunk/src/VBox/VMM/PGMGstDefs.h
r32009 r32034 176 176 # define GST_BIG_PAGE_SIZE X86_PAGE_2M_SIZE 177 177 # define GST_BIG_PAGE_OFFSET_MASK X86_PAGE_2M_OFFSET_MASK 178 # define GST_PDE_PG_MASK X86_PDE_PAE_PG_MASK _FULL178 # define GST_PDE_PG_MASK X86_PDE_PAE_PG_MASK 179 179 # define GST_PDE_BIG_PG_MASK X86_PDE2M_PAE_PG_MASK 180 180 # define GST_GET_PTE_GCPHYS(Pte) ((Pte).u & GST_PTE_PG_MASK) -
trunk/src/VBox/VMM/PGMMap.cpp
r32033 r32034 883 883 if (pVM->pgm.s.apInterPaePDs[iPDPE]->a[iPDE].u) 884 884 { 885 RTHCPHYS HCPhysPT = pVM->pgm.s.apInterPaePDs[iPDPE]->a[iPDE].u & X86_PDE_PAE_PG_MASK _FULL;885 RTHCPHYS HCPhysPT = pVM->pgm.s.apInterPaePDs[iPDPE]->a[iPDE].u & X86_PDE_PAE_PG_MASK; 886 886 if (HCPhysPT == MMPage2Phys(pVM, pVM->pgm.s.apInterPaePTs[0])) 887 887 pPTPae = pVM->pgm.s.apInterPaePTs[0]; … … 950 950 PX86PTPAE pPTPae; 951 951 if (pVM->pgm.s.apInterPaePDs[iPDPE]->a[iPDE].u) 952 pPTPae = (PX86PTPAE)MMPagePhys2Page(pVM, pVM->pgm.s.apInterPaePDs[iPDPE]->a[iPDE].u & X86_PDE_PAE_PG_MASK _FULL);952 pPTPae = (PX86PTPAE)MMPagePhys2Page(pVM, pVM->pgm.s.apInterPaePDs[iPDPE]->a[iPDE].u & X86_PDE_PAE_PG_MASK); 953 953 else 954 954 { -
trunk/src/VBox/VMM/VMMAll/PGMAllMap.cpp
r32033 r32034 360 360 { 361 361 Assert(PGMGetGuestMode(pVCpu) >= PGMMODE_PAE); /** @todo We may hit this during reset, will fix later. */ 362 AssertFatalMsg( (pShwPaePd->a[iPaePde].u & X86_PDE_PAE_PG_MASK _FULL) == pMap->aPTs[i].HCPhysPaePT0362 AssertFatalMsg( (pShwPaePd->a[iPaePde].u & X86_PDE_PAE_PG_MASK) == pMap->aPTs[i].HCPhysPaePT0 363 363 || !PGMMODE_WITH_PAGING(PGMGetGuestMode(pVCpu)), 364 ("%RX64 vs %RX64\n", pShwPaePd->a[iPaePde+1].u & X86_PDE_PAE_PG_MASK _FULL, pMap->aPTs[i].HCPhysPaePT0));364 ("%RX64 vs %RX64\n", pShwPaePd->a[iPaePde+1].u & X86_PDE_PAE_PG_MASK, pMap->aPTs[i].HCPhysPaePT0)); 365 365 Assert(pShwPaePd->a[iPaePde+1].u & PGM_PDFLAGS_MAPPING); 366 AssertFatalMsg( (pShwPaePd->a[iPaePde+1].u & X86_PDE_PAE_PG_MASK _FULL) == pMap->aPTs[i].HCPhysPaePT1366 AssertFatalMsg( (pShwPaePd->a[iPaePde+1].u & X86_PDE_PAE_PG_MASK) == pMap->aPTs[i].HCPhysPaePT1 367 367 || !PGMMODE_WITH_PAGING(PGMGetGuestMode(pVCpu)), 368 ("%RX64 vs %RX64\n", pShwPaePd->a[iPaePde+1].u & X86_PDE_PAE_PG_MASK _FULL, pMap->aPTs[i].HCPhysPaePT1));368 ("%RX64 vs %RX64\n", pShwPaePd->a[iPaePde+1].u & X86_PDE_PAE_PG_MASK, pMap->aPTs[i].HCPhysPaePT1)); 369 369 } 370 370 #endif … … 374 374 */ 375 375 Assert( (pShwPaePd->a[iPaePde].u & (X86_PDE_P | PGM_PDFLAGS_MAPPING)) != (X86_PDE_P | PGM_PDFLAGS_MAPPING) 376 || (pShwPaePd->a[iPaePde].u & X86_PDE_PAE_PG_MASK _FULL) == pMap->aPTs[i].HCPhysPaePT0);376 || (pShwPaePd->a[iPaePde].u & X86_PDE_PAE_PG_MASK) == pMap->aPTs[i].HCPhysPaePT0); 377 377 if ( pShwPaePd->a[iPaePde].n.u1Present 378 378 && !(pShwPaePd->a[iPaePde].u & PGM_PDFLAGS_MAPPING)) 379 379 { 380 380 Assert(!(pShwPaePd->a[iPaePde].u & PGM_PDFLAGS_MAPPING)); 381 pgmPoolFree(pVM, pShwPaePd->a[iPaePde].u & X86_PDE_PAE_PG_MASK _FULL, pPoolPagePd->idx, iPaePde);381 pgmPoolFree(pVM, pShwPaePd->a[iPaePde].u & X86_PDE_PAE_PG_MASK, pPoolPagePd->idx, iPaePde); 382 382 } 383 383 pShwPaePd->a[iPaePde].u = PGM_PDFLAGS_MAPPING | X86_PDE_P | X86_PDE_A | X86_PDE_RW | X86_PDE_US … … 388 388 AssertFatal(iPaePde < 512); 389 389 Assert( (pShwPaePd->a[iPaePde].u & (X86_PDE_P | PGM_PDFLAGS_MAPPING)) != (X86_PDE_P | PGM_PDFLAGS_MAPPING) 390 || (pShwPaePd->a[iPaePde].u & X86_PDE_PAE_PG_MASK _FULL) == pMap->aPTs[i].HCPhysPaePT1);390 || (pShwPaePd->a[iPaePde].u & X86_PDE_PAE_PG_MASK) == pMap->aPTs[i].HCPhysPaePT1); 391 391 if ( pShwPaePd->a[iPaePde].n.u1Present 392 392 && !(pShwPaePd->a[iPaePde].u & PGM_PDFLAGS_MAPPING)) -
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r32033 r32034 276 276 LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw+i, uShw.pPDPae->a[iShw+i].u)); 277 277 pgmPoolFree(pVM, 278 uShw.pPDPae->a[iShw+i].u & X86_PDE_PAE_PG_MASK _FULL,278 uShw.pPDPae->a[iShw+i].u & X86_PDE_PAE_PG_MASK, 279 279 pPage->idx, 280 280 iShw + i); … … 303 303 LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPae->a[iShw2].u)); 304 304 pgmPoolFree(pVM, 305 uShw.pPDPae->a[iShw2].u & X86_PDE_PAE_PG_MASK _FULL,305 uShw.pPDPae->a[iShw2].u & X86_PDE_PAE_PG_MASK, 306 306 pPage->idx, 307 307 iShw2); … … 386 386 LogFlow(("pgmPoolMonitorChainChanging: 32 bit pd iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPD->a[iShw].u)); 387 387 pgmPoolFree(pVM, 388 uShw.pPD->a[iShw].u & X86_PDE_PAE_PG_MASK _FULL,388 uShw.pPD->a[iShw].u & X86_PDE_PAE_PG_MASK, 389 389 pPage->idx, 390 390 iShw); … … 418 418 LogFlow(("pgmPoolMonitorChainChanging: 32 bit pd iShw=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPD->a[iShw2].u)); 419 419 pgmPoolFree(pVM, 420 uShw.pPD->a[iShw2].u & X86_PDE_PAE_PG_MASK _FULL,420 uShw.pPD->a[iShw2].u & X86_PDE_PAE_PG_MASK, 421 421 pPage->idx, 422 422 iShw2); … … 469 469 LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPae->a[iShw].u)); 470 470 pgmPoolFree(pVM, 471 uShw.pPDPae->a[iShw].u & X86_PDE_PAE_PG_MASK _FULL,471 uShw.pPDPae->a[iShw].u & X86_PDE_PAE_PG_MASK, 472 472 pPage->idx, 473 473 iShw); … … 500 500 LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw2=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPae->a[iShw2].u)); 501 501 pgmPoolFree(pVM, 502 uShw.pPDPae->a[iShw2].u & X86_PDE_PAE_PG_MASK _FULL,502 uShw.pPDPae->a[iShw2].u & X86_PDE_PAE_PG_MASK, 503 503 pPage->idx, 504 504 iShw2); … … 594 594 LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPae->a[iShw].u)); 595 595 pgmPoolFree(pVM, 596 uShw.pPDPae->a[iShw].u & X86_PDE_PAE_PG_MASK _FULL,596 uShw.pPDPae->a[iShw].u & X86_PDE_PAE_PG_MASK, 597 597 pPage->idx, 598 598 iShw); … … 611 611 LogFlow(("pgmPoolMonitorChainChanging: pae pd iShw2=%#x: %RX64 -> freeing it!\n", iShw2, uShw.pPDPae->a[iShw2].u)); 612 612 pgmPoolFree(pVM, 613 uShw.pPDPae->a[iShw2].u & X86_PDE_PAE_PG_MASK _FULL,613 uShw.pPDPae->a[iShw2].u & X86_PDE_PAE_PG_MASK, 614 614 pPage->idx, 615 615 iShw2); … … 3291 3291 RTGCPHYS GCPhysBase = GCPhysPage & X86_PDE2M_PAE_PG_MASK; 3292 3292 3293 GCPhysPage &= X86_PDE_PAE_PG_MASK _FULL;3293 GCPhysPage &= X86_PDE_PAE_PG_MASK; 3294 3294 3295 3295 /* Fetch the large page base. */ … … 4270 4270 #endif 4271 4271 { 4272 PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPD->a[i].u & X86_PDE_PAE_PG_MASK _FULL);4272 PPGMPOOLPAGE pSubPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, pShwPD->a[i].u & X86_PDE_PAE_PG_MASK); 4273 4273 if (pSubPage) 4274 4274 pgmPoolTrackFreeUser(pPool, pSubPage, pPage->idx, i); 4275 4275 else 4276 AssertFatalMsgFailed(("%RX64\n", pShwPD->a[i].u & X86_PDE_PAE_PG_MASK _FULL));4276 AssertFatalMsgFailed(("%RX64\n", pShwPD->a[i].u & X86_PDE_PAE_PG_MASK)); 4277 4277 /** @todo 64-bit guests: have to ensure that we're not exhausting the dynamic mappings! */ 4278 4278 } -
trunk/src/VBox/VMM/VMMAll/PGMAllShw.h
r32033 r32034 132 132 # define SHWPDE X86PDEPAE 133 133 # define PSHWPDE PX86PDEPAE 134 # define SHW_PDE_PG_MASK X86_PDE_PAE_PG_MASK _FULL134 # define SHW_PDE_PG_MASK X86_PDE_PAE_PG_MASK 135 135 # define SHW_PD_SHIFT X86_PD_PAE_SHIFT 136 136 # define SHW_PD_MASK X86_PD_PAE_MASK -
trunk/src/VBox/VMM/VMMGC/PGMGCGst.h
r31996 r32034 66 66 # define GST_BIG_PAGE_SIZE X86_PAGE_2M_SIZE 67 67 # define GST_BIG_PAGE_OFFSET_MASK X86_PAGE_2M_OFFSET_MASK 68 # define GST_PDE_PG_MASK X86_PDE_PAE_PG_MASK _FULL68 # define GST_PDE_PG_MASK X86_PDE_PAE_PG_MASK 69 69 # define GST_PDE4M_PG_MASK X86_PDE4M_PAE_PG_MASK 70 70 # define GST_PD_SHIFT X86_PD_PAE_SHIFT -
trunk/src/VBox/VMM/VMMGC/PGMGCShw.h
r32033 r32034 58 58 # define SHWPDE X86PDEPAE 59 59 # define PSHWPDE PX86PDEPAE 60 # define SHW_PDE_PG_MASK X86_PDE_PAE_PG_MASK _FULL60 # define SHW_PDE_PG_MASK X86_PDE_PAE_PG_MASK 61 61 # define SHW_PD_SHIFT X86_PD_PAE_SHIFT 62 62 # define SHW_PD_MASK X86_PD_PAE_MASK -
trunk/src/VBox/VMM/VMMRZ/PGMRZDynMap.cpp
r32009 r32034 738 738 pPgLvl->a[1].fResMask = X86_PDE_P | X86_PDE_RW; 739 739 740 pPgLvl->a[2].fPhysMask = X86_PDE_PAE_PG_MASK _FULL;740 pPgLvl->a[2].fPhysMask = X86_PDE_PAE_PG_MASK; 741 741 pPgLvl->a[2].fPtrMask = X86_PT_PAE_MASK; 742 742 pPgLvl->a[2].fPtrShift = X86_PT_PAE_SHIFT; … … 768 768 pPgLvl->a[2].fResMask = X86_PDE_P | X86_PDE_RW; 769 769 770 pPgLvl->a[3].fPhysMask = X86_PDE_PAE_PG_MASK _FULL;770 pPgLvl->a[3].fPhysMask = X86_PDE_PAE_PG_MASK; 771 771 pPgLvl->a[3].fPtrShift = X86_PT_PAE_SHIFT; 772 772 pPgLvl->a[3].fPtrMask = X86_PT_PAE_MASK;
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