Changeset 32471 in vbox for trunk/src/VBox/Devices/PC

Timestamp:

Sep 14, 2010 10:26:07 AM (14 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

65845

Message:

Devices: refactoring, further PCI work

Location:

trunk/src/VBox/Devices/PC

Files:

• DevACPI.cpp (modified) (5 diffs)
• DevLPC.cpp (modified) (1 diff)
• vbox.dsl (modified) (4 diffs)

trunk/src/VBox/Devices/PC/DevACPI.cpp

@@ -162 +162 @@
     SYSTEM_INFO_INDEX_NIC_ADDRESS       = 15, /**< NIC PCI address, or 0 */
     SYSTEM_INFO_INDEX_AUDIO_ADDRESS     = 16, /**< Audio card PCI address, or 0 */
-    SYSTEM_INFO_INDEX_POWER_STATES      = 17,
-    SYSTEM_INFO_INDEX_END               = 18,
+    SYSTEM_INFO_INDEX_POWER_STATES      = 17, 
+    SYSTEM_INFO_INDEX_IOC_ADDRESS       = 18, /**< IO controller PCI address */
+    SYSTEM_INFO_INDEX_END               = 19,
     SYSTEM_INFO_INDEX_INVALID           = 0x80,
     SYSTEM_INFO_INDEX_VALID             = 0x200
@@ -268 +269 @@
     /** Flag whether to set WAK_STS on resume (restore included). */
     bool                fSetWakeupOnResume;
+    /** PCI address of the IO controller device. */
+    uint32_t            u32IocPciAddress;
+    uint32_t            pad0;
 
     /** ACPI port base interface. */
@@ -1564 +1568 @@
                     break;
 
+               case SYSTEM_INFO_INDEX_IOC_ADDRESS:
+                    *pu32 = s->u32IocPciAddress;
+                    break;
+
                 /* This is only for compatability with older saved states that
                    may include ACPI code that read these values.  Legacy is
@@ -2456 +2464 @@
                               "NicPciAddress\0"
                               "AudioPciAddress\0"
+                              "IocPciAddress\0"
                               "EnableSuspendToDisk\0"
                               "PowerS1Enabled\0"
@@ -2518 +2527 @@
         return PDMDEV_SET_ERROR(pDevIns, rc,
                                 N_("Configuration error: Failed to read \"AudioPciAddress\""));
+
+    /* query IO controller (southbridge) PCI address */
+    rc = CFGMR3QueryU32Def(pCfg, "IocPciAddress", &s->u32IocPciAddress, 0);
+    if (RT_FAILURE(rc))
+        return PDMDEV_SET_ERROR(pDevIns, rc,
+                                N_("Configuration error: Failed to read \"IocPciAddress\""));
 
     /* query whether S1 power state should be exposed */

trunk/src/VBox/Devices/PC/DevLPC.cpp

@@ -208 +208 @@
     LPCState   *pThis = PDMINS_2_DATA(pDevIns, LPCState *);
     LogFlow(("lpcInfo: \n"));
+
+    if (pThis->dev.config[0xde] == 0xbe && pThis->dev.config[0xad] == 0xef)
+        pHlp->pfnPrintf(pHlp, "APIC backdoor activated\n");
+    else
+        pHlp->pfnPrintf(pHlp, "APIC backdoor closed: %02x %02x\n",
+                        pThis->dev.config[0xde], pThis->dev.config[0xad]);
 }
 

trunk/src/VBox/Devices/PC/vbox.dsl

@@ -128 +128 @@
     {
         MEML,  32,
-        UIOA,  32,
-        UHPT,  32,
-        USMC,  32,
-        UFDC,  32,
+        UIOA,  32, // if IO APIC enabled
+        UHPT,  32, // if HPET enabled
+        USMC,  32, // if SMC enabled
+        UFDC,  32, // if floppy controller enabled
         // UCP0-UCP3 no longer used and only kept here for saved state compatibilty
         UCP0,  32,
@@ -138 +138 @@
         UCP3,  32,
         MEMH,  32,
-        URTC,  32,
-        CPUL,  32,
-        CPUC,  32,
-        CPET,  32,
-        CPEV,  32,
-        NICA,  32,
-        HDAA,  32,
-        PWRS,  32,
+        URTC,  32, // if RTC shown in tables
+        CPUL,  32, // flag of CPU lock state
+        CPUC,  32, // CPU to check lock status
+        CPET,  32, // type of CPU hotplug event
+        CPEV,  32, // id of CPU event targets
+        NICA,  32, // Primary NIC PCI address
+        HDAA,  32, // HDA PCI address
+        PWRS,  32, // power states
+        IOCA,  32, // Southbridge IO controller PCI address
         Offset (0x80),
         ININ, 32,
@@ -508 +509 @@
         Device (PCI0)
         {
-            Name (_HID, EisaId ("PNP0A03"))
+            
+            Name (_HID, EisaId ("PNP0A03")) // PCI bus PNP id
             Name (_ADR, 0x00) // address
             Name (_BBN, 0x00) // base bus adddress
@@ -534 +536 @@
             Device (SBRG)
             {
-                // Address of the PIIX3 (device 1 function 0)
-                Name (_ADR, 0x00010000)
+                // Address of the southbridge device (PIIX or ICH9)
+                Method(_ADR, 0, NotSerialized)
+                {
+                     Return (IOCA)
+                }
                 OperationRegion (PCIC, PCI_Config, 0x00, 0xff)