Changeset 32489 in vbox for trunk/src/VBox/VMM/VMMR0
- Timestamp:
- Sep 14, 2010 3:50:31 PM (15 years ago)
- svn:sync-xref-src-repo-rev:
- 65864
- Location:
- trunk/src/VBox/VMM/VMMR0
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/GVMMR0.cpp
r31407 r32489 1888 1888 1889 1889 /** 1890 * Updates the periodic preemption timer for the calling CPU. 1891 * 1892 * The caller must have disabled preemption! 1893 * 1894 * @param pVM The VM handle. 1895 * @param idHostCpu The current host CPU id. 1896 * @param uHz The desired frequency. 1897 */ 1898 GVMMR0DECL(void) GVMMR0SchedUpdatePeriodicPreemptionTimer(PVM pVM, RTCPUID idHostCpu, uint32_t uHz) 1899 { 1900 1901 } 1902 1903 1904 /** 1890 1905 * Retrieves the GVMM statistics visible to the caller. 1891 1906 * -
trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp
r32361 r32489 1435 1435 VMMR0DECL(int) HWACCMR0EnterSwitcher(PVM pVM, bool *pfVTxDisabled) 1436 1436 { 1437 Assert(!(ASMGetFlags() & X86_EFL_IF) );1437 Assert(!(ASMGetFlags() & X86_EFL_IF) || !RTThreadPreemptIsEnabled(NIL_RTTHREAD)); 1438 1438 1439 1439 *pfVTxDisabled = false; -
trunk/src/VBox/VMM/VMMR0/VMMR0.cpp
r32431 r32489 530 530 case VMMR0_DO_RAW_RUN: 531 531 { 532 /* Safety precaution as hwaccm disables the switcher. */ 533 if (RT_LIKELY(!pVM->vmm.s.fSwitcherDisabled)) 532 /* Some safety precautions first. */ 533 #ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 534 if (RT_LIKELY( !pVM->vmm.s.fSwitcherDisabled /* hwaccm */ 535 && pVM->cCpus == 1 /* !smp */ 536 && PGMGetHyperCR3(pVCpu))) 537 #else 538 if (RT_LIKELY( !pVM->vmm.s.fSwitcherDisabled 539 && pVM->cCpus == 1)) 540 #endif 534 541 { 535 RTCCUINTREG uFlags = ASMIntDisableFlags(); 536 int rc; 537 bool fVTxDisabled; 538 539 if (RT_UNLIKELY(pVM->cCpus > 1)) 542 /* Disable preemption and update the periodic preemption timer. */ 543 RTTHREADPREEMPTSTATE PreemptState = RTTHREADPREEMPTSTATE_INITIALIZER; 544 RTThreadPreemptDisable(&PreemptState); 545 ASMAtomicWriteU32(&pVCpu->idHostCpu, RTMpCpuId()); 546 if (pVM->vmm.s.fUsePeriodicPreemptionTimers) 547 GVMMR0SchedUpdatePeriodicPreemptionTimer(pVM, pVCpu->idHostCpu, TMCalcHostTimerFrequency(pVM, pVCpu)); 548 549 /* We might need to disable VT-x if the active switcher turns off paging. */ 550 bool fVTxDisabled; 551 int rc = HWACCMR0EnterSwitcher(pVM, &fVTxDisabled); 552 if (RT_SUCCESS(rc)) 540 553 { 541 pVCpu->vmm.s.iLastGZRc = VERR_RAW_MODE_INVALID_SMP; 554 RTCCUINTREG uFlags = ASMIntDisableFlags(); 555 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED_EXEC); 556 557 TMNotifyStartOfExecution(pVCpu); 558 rc = pVM->vmm.s.pfnHostToGuestR0(pVM); 559 pVCpu->vmm.s.iLastGZRc = rc; 560 TMNotifyEndOfExecution(pVCpu); 561 562 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED); 563 564 /* Re-enable VT-x if previously turned off. */ 565 HWACCMR0LeaveSwitcher(pVM, fVTxDisabled); 566 567 if ( rc == VINF_EM_RAW_INTERRUPT 568 || rc == VINF_EM_RAW_INTERRUPT_HYPER) 569 TRPMR0DispatchHostInterrupt(pVM); 570 542 571 ASMSetFlags(uFlags); 543 return; 572 573 #ifdef VBOX_WITH_STATISTICS 574 STAM_COUNTER_INC(&pVM->vmm.s.StatRunRC); 575 vmmR0RecordRC(pVM, pVCpu, rc); 576 #endif 544 577 } 545 546 #ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 547 if (RT_UNLIKELY(!PGMGetHyperCR3(pVCpu))) 548 { 549 pVCpu->vmm.s.iLastGZRc = VERR_PGM_NO_CR3_SHADOW_ROOT; 550 ASMSetFlags(uFlags); 551 return; 552 } 553 #endif 554 555 /* We might need to disable VT-x if the active switcher turns off paging. */ 556 rc = HWACCMR0EnterSwitcher(pVM, &fVTxDisabled); 557 if (RT_FAILURE(rc)) 558 { 578 else 559 579 pVCpu->vmm.s.iLastGZRc = rc; 560 ASMSetFlags(uFlags);561 return;562 }563 564 ASMAtomicWriteU32(&pVCpu->idHostCpu, RTMpCpuId());565 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED_EXEC);566 567 TMNotifyStartOfExecution(pVCpu);568 rc = pVM->vmm.s.pfnHostToGuestR0(pVM);569 pVCpu->vmm.s.iLastGZRc = rc;570 TMNotifyEndOfExecution(pVCpu);571 572 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);573 580 ASMAtomicWriteU32(&pVCpu->idHostCpu, NIL_RTCPUID); 574 575 /* Re-enable VT-x if previously turned off. */ 576 HWACCMR0LeaveSwitcher(pVM, fVTxDisabled); 577 578 if ( rc == VINF_EM_RAW_INTERRUPT 579 || rc == VINF_EM_RAW_INTERRUPT_HYPER) 580 TRPMR0DispatchHostInterrupt(pVM); 581 582 ASMSetFlags(uFlags); 583 584 #ifdef VBOX_WITH_STATISTICS 585 STAM_COUNTER_INC(&pVM->vmm.s.StatRunRC); 586 vmmR0RecordRC(pVM, pVCpu, rc); 587 #endif 581 RTThreadPreemptRestore(&PreemptState); 588 582 } 589 583 else … … 591 585 Assert(!pVM->vmm.s.fSwitcherDisabled); 592 586 pVCpu->vmm.s.iLastGZRc = VERR_NOT_SUPPORTED; 587 if (pVM->cCpus != 1) 588 pVCpu->vmm.s.iLastGZRc = VERR_RAW_MODE_INVALID_SMP; 589 #ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 590 if (!PGMGetHyperCR3(pVCpu)) 591 pVCpu->vmm.s.iLastGZRc = VERR_PGM_NO_CR3_SHADOW_ROOT; 592 #endif 593 593 } 594 594 break; … … 604 604 case VMMR0_DO_HWACC_RUN: 605 605 { 606 int rc;607 608 STAM_COUNTER_INC(&pVM->vmm.s.StatRunRC);609 610 606 #ifdef VBOX_WITH_VMMR0_DISABLE_PREEMPTION 611 607 RTTHREADPREEMPTSTATE PreemptState = RTTHREADPREEMPTSTATE_INITIALIZER; … … 615 611 #endif 616 612 ASMAtomicWriteU32(&pVCpu->idHostCpu, RTMpCpuId()); 613 if (pVM->vmm.s.fUsePeriodicPreemptionTimers) 614 GVMMR0SchedUpdatePeriodicPreemptionTimer(pVM, pVCpu->idHostCpu, TMCalcHostTimerFrequency(pVM, pVCpu)); 617 615 618 616 #ifdef LOG_ENABLED … … 629 627 } 630 628 #endif 629 int rc; 631 630 if (!HWACCMR0SuspendPending()) 632 631 { … … 638 637 AssertRC(rc2); 639 638 } 639 STAM_COUNTER_INC(&pVM->vmm.s.StatRunRC); 640 640 } 641 641 else
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