Changeset 32734 in vbox

Timestamp:

Sep 23, 2010 3:57:28 PM (14 years ago)

Author:

vboxsync

Message:

PCI: better accessors

File:

• trunk/include/VBox/pci.h (modified) (31 diffs)

trunk/include/VBox/pci.h

@@ -198 +198 @@
 #define  VBOX_PCI_STATUS_DETECTED_PARITY     0x8000 /* Set on parity error */
 
+
+/* Command bitmask */
+#define  VBOX_PCI_COMMAND_IO           0x1     /* Enable response in I/O space */
+#define  VBOX_PCI_COMMAND_MEMORY       0x2     /* Enable response in Memory space */
+#define  VBOX_PCI_COMMAND_MASTER       0x4     /* Enable bus mastering */
+#define  VBOX_PCI_COMMAND_SPECIAL      0x8     /* Enable response to special cycles */
+#define  VBOX_PCI_COMMAND_INVALIDATE   0x10    /* Use memory write and invalidate */
+#define  VBOX_PCI_COMMAND_VGA_PALETTE  0x20    /* Enable palette snooping */
+#define  VBOX_PCI_COMMAND_PARITY       0x40    /* Enable parity checking */
+#define  VBOX_PCI_COMMAND_WAIT         0x80    /* Enable address/data stepping */
+#define  VBOX_PCI_COMMAND_SERR         0x100   /* Enable SERR */
+#define  VBOX_PCI_COMMAND_FAST_BACK    0x200   /* Enable back-to-back writes */
+#define  VBOX_PCI_COMMAND_INTX_DISABLE 0x400   /* INTx Emulation Disable */
+
+
 /* Capability list values (capability offset 0) */
 /* Next  value pointer in offset 1, or 0 if none */
@@ -218 +233 @@
 #define  VBOX_PCI_CAP_ID_AF          0x13    /* PCI Advanced Features */
 
-/* MSI flags (capability offset 2) */
+/* Extended Capabilities (PCI-X 2.0 and Express)*/
+#define  VBOX_PCI_EXT_CAP_ID_ERR     0x01
+#define  VBOX_PCI_EXT_CAP_ID_VC      0x02
+#define  VBOX_PCI_EXT_CAP_ID_DSN     0x03
+#define  VBOX_PCI_EXT_CAP_ID_PWR     0x04
+#define  VBOX_PCI_EXT_CAP_ID_ARI     0x0e
+#define  VBOX_PCI_EXT_CAP_ID_ATS     0x0f
+#define  VBOX_PCI_EXT_CAP_ID_SRIOV   0x10
+
+
+/* MSI flags (2 bytes, capability offset 2) */
 #define  VBOX_PCI_MSI_FLAGS_64BIT    0x80    /* 64-bit addresses allowed */
 #define  VBOX_PCI_MSI_FLAGS_QSIZE    0x70    /* Message queue size configured */
@@ -225 +250 @@
 #define  VBOX_PCI_MSI_FLAGS_MASKBIT  0x100   /* 64-bit mask bits allowed */
 
-/* MSI-X flags (capability offset 2) */
-#define  VBOX_PCI_MSIX_FLAGS_QSIZE   0x07FF
+/* MSI-X flags (2 bytes, capability offset 2) */
 #define  VBOX_PCI_MSIX_FLAGS_ENABLE  0x8000
-#define  PCI_MSIX_FLAGS_MASKALL      0x4000
-#define  PCI_MSIX_FLAGS_BIRMASK      0x0007
+#define  VBOX_PCI_MSIX_FLAGS_MASKALL      0x4000
+#define  VBOX_PCI_MSIX_FLAGS_BIRMASK      0x0007
 
 /* Power management flags (2 bytes, capability offset 2) */
@@ -351 +375 @@
 } PCIDEVICE;
 
+/* @todo: handle extended space access */
+DECLINLINE(void)     PCIDevSetByte(PPCIDEVICE pPciDev, uint32_t uOffset, uint8_t u8Value)
+{
+    pPciDev->config[uOffset]   = u8Value;
+}
+
+DECLINLINE(uint8_t)  PCIDevGetByte(PPCIDEVICE pPciDev, uint32_t uOffset)
+{
+    return pPciDev->config[uOffset];
+}
+
+DECLINLINE(void)     PCIDevSetWord(PPCIDEVICE pPciDev, uint32_t uOffset, uint16_t u16Value)
+{
+    *(uint16_t*)&pPciDev->config[uOffset] = RT_H2LE_U16(u16Value);
+}
+
+DECLINLINE(uint16_t) PCIDevGetWord(PPCIDEVICE pPciDev, uint32_t uOffset)
+{
+    uint16_t u16Value = *(uint16_t*)&pPciDev->config[uOffset];
+    return RT_H2LE_U16(u16Value);
+}
+
+DECLINLINE(void)     PCIDevSetDWord(PPCIDEVICE pPciDev, uint32_t uOffset, uint32_t u32Value)
+{
+    *(uint32_t*)&pPciDev->config[uOffset] = RT_H2LE_U32(u32Value);
+}
+
+DECLINLINE(uint32_t) PCIDevGetDWord(PPCIDEVICE pPciDev, uint32_t uOffset)
+{
+    uint32_t u32Value = *(uint32_t*)&pPciDev->config[uOffset];
+    return RT_H2LE_U32(u32Value);
+}
+
+DECLINLINE(void)     PCIDevSetQWord(PPCIDEVICE pPciDev, uint32_t uOffset, uint64_t u64Value)
+{
+    *(uint64_t*)&pPciDev->config[uOffset] = RT_H2LE_U64(u64Value);
+}
+
+DECLINLINE(uint64_t) PCIDevGetQWord(PPCIDEVICE pPciDev, uint32_t uOffset)
+{
+    uint64_t u64Value = *(uint64_t*)&pPciDev->config[uOffset];
+    return RT_H2LE_U64(u64Value);
+}
 
 /**
@@ -359 +426 @@
 DECLINLINE(void) PCIDevSetVendorId(PPCIDEVICE pPciDev, uint16_t u16VendorId)
 {
-    u16VendorId = RT_H2LE_U16(u16VendorId);
-    pPciDev->config[VBOX_PCI_VENDOR_ID]     = u16VendorId & 0xff;
-    pPciDev->config[VBOX_PCI_VENDOR_ID + 1] = u16VendorId >> 8;
+    PCIDevSetWord(pPciDev, VBOX_PCI_VENDOR_ID, u16VendorId);
 }
 
@@ -371 +436 @@
 DECLINLINE(uint16_t) PCIDevGetVendorId(PPCIDEVICE pPciDev)
 {
-    return RT_LE2H_U16(RT_MAKE_U16(pPciDev->config[VBOX_PCI_VENDOR_ID], pPciDev->config[VBOX_PCI_VENDOR_ID + 1]));
+    return PCIDevGetWord(pPciDev, VBOX_PCI_VENDOR_ID);
 }
 
@@ -382 +447 @@
 DECLINLINE(void) PCIDevSetDeviceId(PPCIDEVICE pPciDev, uint16_t u16DeviceId)
 {
-    u16DeviceId = RT_H2LE_U16(u16DeviceId);
-    pPciDev->config[VBOX_PCI_DEVICE_ID]     = u16DeviceId & 0xff;
-    pPciDev->config[VBOX_PCI_DEVICE_ID + 1] = u16DeviceId >> 8;
+    PCIDevSetWord(pPciDev, VBOX_PCI_DEVICE_ID, u16DeviceId);
 }
 
@@ -394 +457 @@
 DECLINLINE(uint16_t) PCIDevGetDeviceId(PPCIDEVICE pPciDev)
 {
-    return RT_LE2H_U16(RT_MAKE_U16(pPciDev->config[VBOX_PCI_DEVICE_ID], pPciDev->config[VBOX_PCI_DEVICE_ID + 1]));
-}
-
+    return PCIDevGetWord(pPciDev, VBOX_PCI_DEVICE_ID);
+}
 
 /**
@@ -406 +468 @@
 DECLINLINE(void) PCIDevSetCommand(PPCIDEVICE pPciDev, uint16_t u16Command)
 {
-    u16Command = RT_H2LE_U16(u16Command);
-    pPciDev->config[VBOX_PCI_COMMAND]     = u16Command & 0xff;
-    pPciDev->config[VBOX_PCI_COMMAND + 1] = u16Command >> 8;
+    PCIDevSetWord(pPciDev, VBOX_PCI_COMMAND, u16Command);
 }
 
@@ -419 +479 @@
 DECLINLINE(uint16_t) PCIDevGetCommand(PPCIDEVICE pPciDev)
 {
-    return RT_LE2H_U16(RT_MAKE_U16(pPciDev->config[VBOX_PCI_COMMAND], pPciDev->config[VBOX_PCI_COMMAND + 1]));
+    return PCIDevGetWord(pPciDev, VBOX_PCI_COMMAND);
 }
 
@@ -431 +491 @@
 DECLINLINE(void) PCIDevSetStatus(PPCIDEVICE pPciDev, uint16_t u16Status)
 {
-    u16Status = RT_H2LE_U16(u16Status);
-    pPciDev->config[VBOX_PCI_STATUS]     = u16Status & 0xff;
-    pPciDev->config[VBOX_PCI_STATUS + 1] = u16Status >> 8;
+    PCIDevSetWord(pPciDev, VBOX_PCI_STATUS, u16Status);
 }
 
@@ -445 +503 @@
 DECLINLINE(void) PCIDevSetRevisionId(PPCIDEVICE pPciDev, uint8_t u8RevisionId)
 {
-    pPciDev->config[VBOX_PCI_REVISION_ID] = u8RevisionId;
+    PCIDevSetByte(pPciDev, VBOX_PCI_REVISION_ID, u8RevisionId);
 }
 
@@ -457 +515 @@
 DECLINLINE(void) PCIDevSetClassProg(PPCIDEVICE pPciDev, uint8_t u8ClassProg)
 {
-    pPciDev->config[VBOX_PCI_CLASS_PROG] = u8ClassProg;
+    PCIDevSetByte(pPciDev, VBOX_PCI_CLASS_PROG, u8ClassProg);
 }
 
@@ -469 +527 @@
 DECLINLINE(void) PCIDevSetClassSub(PPCIDEVICE pPciDev, uint8_t u8SubClass)
 {
-    pPciDev->config[VBOX_PCI_CLASS_SUB] = u8SubClass;
+    PCIDevSetByte(pPciDev, VBOX_PCI_CLASS_SUB, u8SubClass);
 }
 
@@ -481 +539 @@
 DECLINLINE(void) PCIDevSetClassBase(PPCIDEVICE pPciDev, uint8_t u8BaseClass)
 {
-    pPciDev->config[VBOX_PCI_CLASS_BASE] = u8BaseClass;
+    PCIDevSetByte(pPciDev, VBOX_PCI_CLASS_BASE, u8BaseClass);
 }
 
@@ -492 +550 @@
 DECLINLINE(void) PCIDevSetHeaderType(PPCIDEVICE pPciDev, uint8_t u8HdrType)
 {
-    pPciDev->config[VBOX_PCI_HEADER_TYPE] = u8HdrType;
+    PCIDevSetByte(pPciDev, VBOX_PCI_HEADER_TYPE, u8HdrType);
 }
 
@@ -503 +561 @@
 DECLINLINE(uint8_t) PCIDevGetHeaderType(PPCIDEVICE pPciDev)
 {
-    return pPciDev->config[VBOX_PCI_HEADER_TYPE];
+    return PCIDevGetByte(pPciDev, VBOX_PCI_HEADER_TYPE);
 }
 
@@ -514 +572 @@
 DECLINLINE(void) PCIDevSetBIST(PPCIDEVICE pPciDev, uint8_t u8Bist)
 {
-    pPciDev->config[VBOX_PCI_BIST] = u8Bist;
+    PCIDevSetByte(pPciDev, VBOX_PCI_BIST, u8Bist);
 }
 
@@ -525 +583 @@
 DECLINLINE(uint8_t) PCIDevGetBIST(PPCIDEVICE pPciDev)
 {
-    return pPciDev->config[VBOX_PCI_BIST];
+    return PCIDevGetByte(pPciDev, VBOX_PCI_BIST);
 }
 
@@ -564 +622 @@
     }
 
-    u32Addr = RT_H2LE_U32(u32Addr);
-    pPciDev->config[iReg]     = u32Addr         & 0xff;
-    pPciDev->config[iReg + 1] = (u32Addr >>  8) & 0xff;
-    pPciDev->config[iReg + 2] = (u32Addr >> 16) & 0xff;
-    pPciDev->config[iReg + 3] = (u32Addr >> 24) & 0xff;
+    PCIDevSetDWord(pPciDev, iReg, u32Addr);
 }
 
@@ -580 +634 @@
 DECLINLINE(void) PCIDevSetSubSystemVendorId(PPCIDEVICE pPciDev, uint16_t u16SubSysVendorId)
 {
-    u16SubSysVendorId = RT_H2LE_U16(u16SubSysVendorId);
-    pPciDev->config[VBOX_PCI_SUBSYSTEM_VENDOR_ID]     = u16SubSysVendorId & 0xff;
-    pPciDev->config[VBOX_PCI_SUBSYSTEM_VENDOR_ID + 1] = u16SubSysVendorId >> 8;
+    PCIDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID, u16SubSysVendorId);
 }
 
@@ -592 +644 @@
 DECLINLINE(uint16_t) PCIDevGetSubSystemVendorId(PPCIDEVICE pPciDev)
 {
-    return RT_LE2H_U16(RT_MAKE_U16(pPciDev->config[VBOX_PCI_SUBSYSTEM_VENDOR_ID], pPciDev->config[VBOX_PCI_SUBSYSTEM_VENDOR_ID + 1]));
+    return PCIDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_VENDOR_ID);
 }
 
@@ -604 +656 @@
 DECLINLINE(void) PCIDevSetSubSystemId(PPCIDEVICE pPciDev, uint16_t u16SubSystemId)
 {
-    u16SubSystemId = RT_H2LE_U16(u16SubSystemId);
-    pPciDev->config[VBOX_PCI_SUBSYSTEM_ID]     = u16SubSystemId & 0xff;
-    pPciDev->config[VBOX_PCI_SUBSYSTEM_ID + 1] = u16SubSystemId >> 8;
+    PCIDevSetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID, u16SubSystemId);
 }
 
@@ -616 +666 @@
 DECLINLINE(uint16_t) PCIDevGetSubSystemId(PPCIDEVICE pPciDev)
 {
-    return RT_LE2H_U16(RT_MAKE_U16(pPciDev->config[VBOX_PCI_SUBSYSTEM_ID], pPciDev->config[VBOX_PCI_SUBSYSTEM_ID + 1]));
+    return PCIDevGetWord(pPciDev, VBOX_PCI_SUBSYSTEM_ID);
 }
 
@@ -627 +677 @@
 DECLINLINE(void) PCIDevSetCapabilityList(PPCIDEVICE pPciDev, uint8_t u8Offset)
 {
-    pPciDev->config[VBOX_PCI_CAPABILITY_LIST] = u8Offset;
+    PCIDevSetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST, u8Offset);
 }
 
@@ -638 +688 @@
 DECLINLINE(uint8_t) PCIDevGetCapabilityList(PPCIDEVICE pPciDev)
 {
-    return pPciDev->config[VBOX_PCI_CAPABILITY_LIST];
+    return PCIDevGetByte(pPciDev, VBOX_PCI_CAPABILITY_LIST);
 }
 
@@ -649 +699 @@
 DECLINLINE(void) PCIDevSetInterruptLine(PPCIDEVICE pPciDev, uint8_t u8Line)
 {
-    pPciDev->config[VBOX_PCI_INTERRUPT_LINE] = u8Line;
+    PCIDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE, u8Line);
 }
 
@@ -660 +710 @@
 DECLINLINE(uint8_t) PCIDevGetInterruptLine(PPCIDEVICE pPciDev)
 {
-    return pPciDev->config[VBOX_PCI_INTERRUPT_LINE];
+    return PCIDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_LINE);
 }
 
@@ -671 +721 @@
 DECLINLINE(void) PCIDevSetInterruptPin(PPCIDEVICE pPciDev, uint8_t u8Pin)
 {
-    pPciDev->config[VBOX_PCI_INTERRUPT_PIN] = u8Pin;
+    PCIDevSetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN, u8Pin);
 }
 
@@ -683 +733 @@
 DECLINLINE(uint8_t) PCIDevGetInterruptPin(PPCIDEVICE pPciDev)
 {
-    return pPciDev->config[VBOX_PCI_INTERRUPT_PIN];
+    return PCIDevGetByte(pPciDev, VBOX_PCI_INTERRUPT_PIN);
 }
 
@@ -690 +740 @@
 
 #endif
-