Changeset 32960 in vbox for trunk/src/VBox
- Timestamp:
- Oct 6, 2010 4:59:56 PM (14 years ago)
- Location:
- trunk/src/VBox/Devices
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Bus/DevPciIch9.cpp
r32951 r32960 193 193 GCPhysAddr = GCPhysAddr - pGlobals->u64PciConfigMMioAddress; 194 194 pPciAddr->iBus = (GCPhysAddr >> 20) & ((1<<8) - 1); 195 pPciAddr->iDeviceFunc = (GCPhysAddr >> 1 5) & ((1<<(5+3)) - 1); // 5 bits - device, 3 bits - function195 pPciAddr->iDeviceFunc = (GCPhysAddr >> 12) & ((1<<(5+3)) - 1); // 5 bits - device, 3 bits - function 196 196 pPciAddr->iRegister = (GCPhysAddr >> 0) & ((1<<(6+4+2)) - 1); // 6 bits - register, 4 bits - extended register, 2 bits -Byte Enable 197 197 } … … 573 573 uint32_t u32 = 0; 574 574 575 Log2(("ich9pciMcfgMMIOWrite: %p(%d) \n", GCPhysAddr, cb)); 576 575 577 PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_WRITE); 576 578 … … 604 606 uint32_t rv = 0xffffffff; 605 607 606 PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_WRITE); 608 Log2(("ich9pciMcfgMMIORead: %p(%d) \n", GCPhysAddr, cb)); 609 610 PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_READ); 607 611 608 612 ich9pciPhysToPciAddr(pGlobals, GCPhysAddr, &aDest); … … 2206 2210 if (pGlobals->u64PciConfigMMioAddress != 0) 2207 2211 { 2208 rc = PDMDevHlpMMIORegister(pDevIns, pGlobals->u64PciConfigMMioAddress, pGlobals->u64PciConfigMMioLength, pGlobals, 2209 ich9pciMcfgMMIOWrite, ich9pciMcfgMMIORead, NULL, "MCFG ranges"); 2212 rc = PDMDevHlpMMIORegister(pDevIns, 2213 pGlobals->u64PciConfigMMioAddress, 2214 pGlobals->u64PciConfigMMioLength, 2215 0, 2216 ich9pciMcfgMMIOWrite, 2217 ich9pciMcfgMMIORead, 2218 NULL /* fill */, 2219 "MCFG ranges"); 2210 2220 if (RT_FAILURE(rc)) 2211 2221 { … … 2223 2233 "ich9pciMcfgMMIOWrite", 2224 2234 "ich9pciMcfgMMIORead", 2225 NULL );2235 NULL /* fill */); 2226 2236 if (RT_FAILURE(rc)) 2227 2237 { … … 2241 2251 "ich9pciMcfgMMIOWrite", 2242 2252 "ich9pciMcfgMMIORead", 2243 NULL );2253 NULL /* fill */); 2244 2254 if (RT_FAILURE(rc)) 2245 2255 { -
trunk/src/VBox/Devices/PC/DevAPIC.cpp
r32935 r32960 1449 1449 1450 1450 index = (addr >> 4) & 0xff; 1451 addr -= (s->apicbase & ~0xfff);1452 1453 if (addr > 0xfff || (index == 0))1454 {1455 /* MSR area read, undefined result by spec */1456 Log(("APIC: MSR area read: %x\n", index));1457 return 0;1458 }1459 1451 1460 1452 switch(index) { … … 1542 1534 #endif 1543 1535 1544 index = (addr >> 4) & 0xff; 1536 index = (addr >> 4) & 0xff; 1545 1537 1546 1538 switch(index) { … … 2850 2842 */ 2851 2843 IoApicReg.u32Version = PDM_IOAPICREG_VERSION; 2852 IoApicReg.pfnSetIrqR3 = ioapicSetIrq; 2844 IoApicReg.pfnSetIrqR3 = ioapicSetIrq; 2853 2845 IoApicReg.pszSetIrqRC = fGCEnabled ? "ioapicSetIrq" : NULL; 2854 2846 IoApicReg.pszSetIrqR0 = fR0Enabled ? "ioapicSetIrq" : NULL;
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