VirtualBox

Changeset 33476 in vbox


Ignore:
Timestamp:
Oct 26, 2010 6:02:48 PM (14 years ago)
Author:
vboxsync
Message:

PCI: better logging, better access to non-existing devices

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/Bus/DevPciIch9.cpp

    r33472 r33476  
    290290
    291291static int ich9pciDataWriteAddr(PPCIGLOBALS pGlobals, PciAddress* pAddr,
    292                                 uint32_t val, int len, int rcReschedule)
    293 {
     292                                uint32_t val, int cb, int rcReschedule)
     293{
     294    int rc = VINF_SUCCESS;
    294295
    295296    if (pAddr->iRegister > 0xff)
    296297    {
    297         LogRel(("PCI: attempt to write extended register: %x (%d) <- val\n", pAddr->iRegister, len, val));
    298         return VINF_SUCCESS;
     298        LogRel(("PCI: attempt to write extended register: %x (%d) <- val\n", pAddr->iRegister, cb, val));
     299        goto out;
    299300    }
    300301
     
    308309            {
    309310                AssertPtr(pBridgeDevice->Int.s.pfnBridgeConfigWrite);
    310                 pBridgeDevice->Int.s.pfnBridgeConfigWrite(pBridgeDevice->pDevIns, pAddr->iBus, pAddr->iDeviceFunc, pAddr->iRegister, val, len);
     311                pBridgeDevice->Int.s.pfnBridgeConfigWrite(pBridgeDevice->pDevIns, pAddr->iBus, pAddr->iDeviceFunc, pAddr->iRegister, val, cb);
    311312            }
    312313#else
    313             return rcReschedule;
     314            rc = rcReschedule;
     315            goto out;
    314316#endif
    315317        }
     
    321323#ifdef IN_RING3
    322324            R3PTRTYPE(PCIDevice *) aDev = pGlobals->aPciBus.apDevices[pAddr->iDeviceFunc];
    323             Log(("ich9pciConfigWrite: %s: addr=%02x val=%08x len=%d\n", aDev->name, pAddr->iRegister, val, len));
    324             aDev->Int.s.pfnConfigWrite(aDev, pAddr->iRegister, val, len);
     325            Log(("ich9pciConfigWrite: %s: addr=%02x val=%08x len=%d\n", aDev->name, pAddr->iRegister, val, cb));
     326            aDev->Int.s.pfnConfigWrite(aDev, pAddr->iRegister, val, cb);
    325327#else
    326             return rcReschedule;
     328            rc = rcReschedule;
     329            goto out;
    327330#endif
    328331        }
    329332    }
    330     return VINF_SUCCESS;
     333
     334  out:
     335    Log2(("ich9pciDataWriteAddr: %02x:%02x:%02x reg %x(%d) %x %Rrc\n",
     336          pAddr->iBus, pAddr->iDeviceFunc >> 3, pAddr->iDeviceFunc & 0x7, pAddr->iRegister,
     337          cb, val, rc));
     338
     339    return rc;
    331340}
    332341
     
    335344    PciAddress aPciAddr;
    336345
    337     Log(("ich9pciDataWrite: addr=%08x val=%08x len=%d\n", pGlobals->uConfigReg, val, len));
     346    LogFlow(("ich9pciDataWrite: config=%08x val=%08x len=%d\n", pGlobals->uConfigReg, val, len));
    338347
    339348    if (!(pGlobals->uConfigReg & (1 << 31)))
     
    347356
    348357    return ich9pciDataWriteAddr(pGlobals, &aPciAddr, val, len, VINF_IOM_HC_IOPORT_WRITE);
     358}
     359
     360static void ich9pciNoMem(void* ptr, int cb)
     361{
     362    memset(ptr, 0xff, cb);
    349363}
    350364
     
    376390}
    377391
    378 static int ich9pciDataReadAddr(PPCIGLOBALS pGlobals, PciAddress* pPciAddr, int len,
     392static int ich9pciDataReadAddr(PPCIGLOBALS pGlobals, PciAddress* pPciAddr, int cb,
    379393                               uint32_t *pu32, int rcReschedule)
    380394{
     395    int rc = VINF_SUCCESS;
     396
    381397    if (pPciAddr->iRegister > 0xff)
    382398    {
    383399        LogRel(("PCI: attempt to read extended register: %x\n", pPciAddr->iRegister));
    384         *pu32 = 0;
    385         return 0;
     400        ich9pciNoMem(pu32, cb);
     401        goto out;
    386402    }
    387403
     
    396412            {
    397413                AssertPtr(pBridgeDevice->Int.s.pfnBridgeConfigRead);
    398                 *pu32 = pBridgeDevice->Int.s.pfnBridgeConfigRead(pBridgeDevice->pDevIns, pPciAddr->iBus, pPciAddr->iDeviceFunc, pPciAddr->iRegister, len);
     414                *pu32 = pBridgeDevice->Int.s.pfnBridgeConfigRead(pBridgeDevice->pDevIns, pPciAddr->iBus, pPciAddr->iDeviceFunc, pPciAddr->iRegister, cb);
    399415            }
     416            else
     417                ich9pciNoMem(pu32, cb);
    400418#else
    401             return rcReschedule;
     419            rc = rcReschedule;
     420            goto out;
    402421#endif
    403         }
     422        } else
     423            ich9pciNoMem(pu32, cb);
    404424    }
    405425    else
     
    409429#ifdef IN_RING3
    410430            R3PTRTYPE(PCIDevice *) aDev = pGlobals->aPciBus.apDevices[pPciAddr->iDeviceFunc];
    411             *pu32 = aDev->Int.s.pfnConfigRead(aDev, pPciAddr->iRegister, len);
    412             Log(("ich9pciDataReadAddr: %s: addr=%02x val=%08x len=%d\n", aDev->name, pPciAddr->iRegister, *pu32, len));
     431            *pu32 = aDev->Int.s.pfnConfigRead(aDev, pPciAddr->iRegister, cb);
     432            Log(("ich9pciDataReadAddr: %s: addr=%02x val=%08x len=%d\n", aDev->name, pPciAddr->iRegister, *pu32, cb));
    413433#else
    414             return rcReschedule;
     434            rc = rcReschedule;
     435            goto out;
    415436#endif
    416437        }
    417     }
    418 
    419     return VINF_SUCCESS;
     438        else
     439            ich9pciNoMem(pu32, cb);
     440    }
     441
     442  out:
     443    Log2(("ich9pciDataReadAddr: %02x:%02x:%02x reg %x(%d) gave %x %Rrc\n",
     444          pPciAddr->iBus, pPciAddr->iDeviceFunc >> 3, pPciAddr->iDeviceFunc & 0x7, pPciAddr->iRegister,
     445          cb, *pu32, rc));
     446
     447    return rc;
    420448}
    421449
     
    424452    PciAddress aPciAddr;
    425453
    426     *pu32 = 0xffffffff;
     454    LogFlow(("ich9pciDataRead: config=%x len=%d\n",  pGlobals->uConfigReg, len));
    427455
    428456    if (!(pGlobals->uConfigReg & (1 << 31)))
     
    603631    PPCIGLOBALS pGlobals = PDMINS_2_DATA(pDevIns, PPCIGLOBALS);
    604632    PciAddress  aDest;
    605     uint32_t    rv = 0xffffffff;
     633    uint32_t    rv;
    606634
    607635    LogFlow(("ich9pciMcfgMMIORead: %RGp(%d) \n", GCPhysAddr, cb));
     
    612640
    613641    int rc = ich9pciDataReadAddr(pGlobals, &aDest, cb, &rv, VINF_IOM_HC_MMIO_READ);
    614 
    615     Log2(("ich9pciMcfgMMIORead: %02x:%02x:%02x reg %x(%d) gave %x %Rrc\n",
    616           aDest.iBus, aDest.iDeviceFunc >> 3, aDest.iDeviceFunc & 0x7, aDest.iRegister,
    617           cb, rv, rc));
    618642
    619643    if (RT_SUCCESS(rc))
     
    10001024{
    10011025    PPCIBUS pBus = PDMINS_2_DATA(pDevIns, PPCIBUS);
    1002     uint32_t u32Value = 0xffffffff; /* Return value in case there is no device. */
     1026    uint32_t u32Value;
    10031027
    10041028    LogFlowFunc((": pDevIns=%p iBus=%d iDevice=%d u32Address=%u cb=%d\n", pDevIns, iBus, iDevice, u32Address, cb));
     
    10131037            u32Value = pBridgeDevice->Int.s.pfnBridgeConfigRead(pBridgeDevice->pDevIns, iBus, iDevice, u32Address, cb);
    10141038        }
     1039        else
     1040            ich9pciNoMem(&u32Value, cb);
    10151041    }
    10161042    else
     
    10231049            Log(("%s: %s: u32Address=%02x u32Value=%08x cb=%d\n", __FUNCTION__, pPciDev->name, u32Address, u32Value, cb));
    10241050        }
     1051        else
     1052            ich9pciNoMem(&u32Value, cb);
    10251053    }
    10261054
     
    14051433static uint32_t ich9pciConfigRead(PPCIGLOBALS pGlobals, uint8_t uBus, uint8_t uDevFn, uint32_t addr, uint32_t len)
    14061434{
    1407     uint32_t   u32Val = 0xffffffff;
     1435    /* Will only work in LSB case */
     1436    uint32_t   u32Val;
    14081437    PciAddress aPciAddr;
    14091438
     
    14151444    int rc = ich9pciDataReadAddr(pGlobals, &aPciAddr, len, &u32Val, VERR_INTERNAL_ERROR);
    14161445    AssertRC(rc);
    1417     switch (len)
    1418     {
    1419         case 1:
    1420             u32Val &= 0xff;
    1421             break;
    1422         case 2:
    1423             u32Val &= 0xffff;
    1424             break;
    1425     }
    14261446    return u32Val;
    14271447}
     
    23132333        if (fGCEnabled)
    23142334        {
    2315            
     2335
    23162336            rc = PDMDevHlpMMIORegisterRC(pDevIns,
    23172337                                         pGlobals->u64PciConfigMMioAddress,
     
    23272347            }
    23282348        }
    2329        
    2330        
     2349
     2350
    23312351        if (fR0Enabled)
    23322352        {
    2333            
     2353
    23342354            rc = PDMDevHlpMMIORegisterR0(pDevIns,
    23352355                                         pGlobals->u64PciConfigMMioAddress,
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