Changeset 33540 in vbox for trunk/src/VBox/VMM/VMMSwitcher

Timestamp:

Oct 28, 2010 9:27:05 AM (15 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

67140

Message:

*: spelling fixes, thanks Timeless!

Location:

trunk/src/VBox/VMM/VMMSwitcher

Files:

• AMD64andLegacy.mac (modified) (4 diffs)
• PAEand32Bit.mac (modified) (3 diffs)

trunk/src/VBox/VMM/VMMSwitcher/AMD64andLegacy.mac

@@ -375 +375 @@
 
 
-    ; We're now on an identity mapped pages! in 32-bit compatability mode.
+    ; We're now on an identity mapped pages! in 32-bit compatibility mode.
 BITS 32
 ALIGNCODE(16)
@@ -897 +897 @@
     DEBUG_CHAR('5')
 
-    ; Jump from compatability mode to 64-bit mode.
+    ; Jump from compatibility mode to 64-bit mode.
     FIXUP FIX_ID_FAR32_TO_64BIT_MODE, 1, NAME(IDExit64Mode) - NAME(Start)
     jmp     0ffffh:0fffffffeh
@@ -962 +962 @@
     add     rax, [rdx + r8 + CPUMCPU.Host.gdtr + 2]         ; eax <- GDTR.address + descriptor offset.
     mov     ecx, [rax + 4]                          ; ecx <- 2nd descriptor dword
-    mov     ebx, ecx                                ; save orginal value
+    mov     ebx, ecx                                ; save original value
     and     ecx, ~0200h                             ; clear busy flag (2nd type2 bit)
     mov     [rax + 4], ccx                          ; not using xchg here is paranoia..
@@ -1017 +1017 @@
 
     ; Control registers.
-    ; Would've liked to have these highere up in case of crashes, but
+    ; Would've liked to have these higher up in case of crashes, but
     ; the fpu stuff must be done before we restore cr0.
     mov     rcx, [rdx + r8 + CPUMCPU.Host.cr4]

trunk/src/VBox/VMM/VMMSwitcher/PAEand32Bit.mac

@@ -199 +199 @@
     and     eax, X86_CR4_MCE | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_VMXE
     mov     ecx, [edx + CPUMCPU.Guest.cr4]
-    ;; @todo Switcher cleanup: Determin base CR4 during CPUMR0Init / VMMR3SelectSwitcher putting it
+    ;; @todo Switcher cleanup: Determine base CR4 during CPUMR0Init / VMMR3SelectSwitcher putting it
     ;                          in CPUMCPU.Hyper.cr4 (which isn't currently being used). That should
     ;                          simplify this operation a bit (and improve locality of the data).
@@ -838 +838 @@
     add     eax, [edx + CPUMCPU.Host.gdtr + 2]         ; eax <- GDTR.address + descriptor offset.
     mov     ecx, [eax + 4]                          ; ecx <- 2nd descriptor dword
-    mov     ebx, ecx                                ; save orginal value
+    mov     ebx, ecx                                ; save original value
     and     ecx, ~0200h                             ; clear busy flag (2nd type2 bit)
     mov     [eax + 4], ecx                          ; not using xchg here is paranoia..
@@ -919 +919 @@
 
     ; Control registers.
-    ; Would've liked to have these highere up in case of crashes, but
+    ; Would've liked to have these higher up in case of crashes, but
     ; the fpu stuff must be done before we restore cr0.
     mov     ecx, [edx + CPUMCPU.Host.cr4]