VirtualBox

Changeset 33687 in vbox for trunk/src/VBox/Devices/Bus


Ignore:
Timestamp:
Nov 2, 2010 1:05:01 PM (14 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
67311
Message:

PCI: part 1 of PCI slots assignment logic in Main

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/Bus/DevPciIch9.cpp

    r33606 r33687  
    253253    {
    254254        PPCIGLOBALS pThis = PDMINS_2_DATA(pDevIns, PPCIGLOBALS);
     255
    255256        PCI_LOCK(pDevIns, VINF_IOM_HC_IOPORT_WRITE);
    256257        pThis->uConfigReg = u32 & ~3; /* Bits 0-1 are reserved and we silently clear them */
    257258        PCI_UNLOCK(pDevIns);
    258259    }
     260
    259261    return VINF_SUCCESS;
    260262}
     
    311313                pBridgeDevice->Int.s.pfnBridgeConfigWrite(pBridgeDevice->pDevIns, pAddr->iBus, pAddr->iDeviceFunc, pAddr->iRegister, val, cb);
    312314            }
     315            else
     316            {
     317                // do nothing, bridge not found
     318            }
    313319#else
    314320            rc = rcReschedule;
     
    360366static void ich9pciNoMem(void* ptr, int cb)
    361367{
    362     memset(ptr, 0xff, cb);
     368    for (int i = 0; i < cb; i++)
     369        ((uint8_t*)ptr)[i] = 0xff;
    363370}
    364371
     
    448455}
    449456
    450 static int ich9pciDataRead(PPCIGLOBALS pGlobals, uint32_t addr, int len, uint32_t *pu32)
     457static int ich9pciDataRead(PPCIGLOBALS pGlobals, uint32_t addr, int cb, uint32_t *pu32)
    451458{
    452459    PciAddress aPciAddr;
    453460
    454     LogFlow(("ich9pciDataRead: config=%x len=%d\n",  pGlobals->uConfigReg, len));
     461    LogFlow(("ich9pciDataRead: config=%x cb=%d\n",  pGlobals->uConfigReg, cb));
     462
     463    *pu32 = 0xffffffff;
    455464
    456465    if (!(pGlobals->uConfigReg & (1 << 31)))
     
    463472    ich9pciStateToPciAddr(pGlobals, addr, &aPciAddr);
    464473
    465     return ich9pciDataReadAddr(pGlobals, &aPciAddr, len, pu32, VINF_IOM_HC_IOPORT_READ);
     474    return ich9pciDataReadAddr(pGlobals, &aPciAddr, cb, pu32, VINF_IOM_HC_IOPORT_READ);
    466475}
    467476
     
    10381047        }
    10391048        else
    1040             ich9pciNoMem(&u32Value, cb);
     1049            ich9pciNoMem(&u32Value, 4);
    10411050    }
    10421051    else
     
    10501059        }
    10511060        else
    1052             ich9pciNoMem(&u32Value, cb);
     1061            ich9pciNoMem(&u32Value, 4);
    10531062    }
    10541063
     
    19791988    },
    19801989    /* Disable, if we may wish to have multiple AHCI controllers */
    1981 #if 1
    19821990    {
    19831991        "ahci",     31, 2 /* SATA controller */
    19841992    },
    1985 #endif
    19861993    {
    19871994        "smbus",    31, 3 /* System Management Bus */
     
    20212028
    20222029    int iStartPos = 0;
    2023 
    2024     /* We add bridges starting slot 22 */
    2025     if (!strcmp(pszName, "ich9pcibridge"))
    2026     {
    2027         iStartPos = 22 * 8;
    2028     }
    20292030
    20302031    /* Otherwise when assigning a slot, we need to make sure all its functions are available */
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