Changeset 33722 in vbox
- Timestamp:
- Nov 3, 2010 12:56:43 PM (14 years ago)
- Location:
- trunk/src/VBox
- Files:
-
- 3 edited
-
Devices/Bus/DevPciIch9.cpp (modified) (1 diff)
-
Main/BusAssignmentManager.cpp (modified) (6 diffs)
-
Main/ConsoleImpl2.cpp (modified) (14 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/Devices/Bus/DevPciIch9.cpp
r33687 r33722 1964 1964 int32_t iFunction; 1965 1965 } PciSlotAssignments[] = { 1966 /* Due to somewhat inflexible PCI bus configuration, ConsoleImpl hardcodes 0:5:0 as HDA address, so we shalln't put elsewhere */ 1967 #if 0 1968 { 1969 "lan", 25, 0 /* LAN controller */ 1970 }, 1971 { 1972 "hda", 27, 0 /* High Definition Audio */ 1973 }, 1974 #endif 1966 /* The only override that have to be here, as host controller is added in the way invisible to bus slot assignment management, 1967 maybe to be changed in the future. */ 1975 1968 { 1976 1969 "i82801", 30, 0 /* Host Controller */ 1977 },1978 /**1979 * Please note, that for devices being functions, like we do here, device 01980 * must be multifunction, i.e. have header type 0x80. Our LPC device is.1981 * Alternative approach is to assign separate slot to each device.1982 */1983 {1984 "lpc", 31, 0 /* Low Pin Count bus */1985 },1986 {1987 "piix3ide", 31, 1 /* IDE controller */1988 },1989 /* Disable, if we may wish to have multiple AHCI controllers */1990 {1991 "ahci", 31, 2 /* SATA controller */1992 },1993 {1994 "smbus", 31, 3 /* System Management Bus */1995 },1996 {1997 "usb-ohci", 31, 4 /* OHCI USB controller */1998 },1999 {2000 "usb-ehci", 31, 5 /* EHCI USB controller */2001 },2002 {2003 "thermal", 31, 6 /* Thermal controller */2004 1970 }, 2005 1971 }; -
trunk/src/VBox/Main/BusAssignmentManager.cpp
r33690 r33722 25 25 #include <map> 26 26 #include <vector> 27 #include <algorithm> 28 29 struct DeviceAssignmentRule 30 { 31 const char* pszName; 32 int iBus; 33 int iDevice; 34 int iFn; 35 int iPriority; 36 }; 37 38 struct DeviceAliasRule 39 { 40 const char* pszDevName; 41 const char* pszDevAlias; 42 }; 43 44 /* Those rules define PCI slots assignment */ 45 46 /* Generic rules */ 47 static const DeviceAssignmentRule aGenericRules[] = 48 { 49 /* VGA controller */ 50 {"vga", 0, 2, 0, 0}, 51 52 /* VMM device */ 53 {"VMMDev", 0, 4, 0, 0}, 54 55 /* Audio controllers */ 56 {"ichac97", 0, 5, 0, 0}, 57 {"hda", 0, 5, 0, 0}, 58 59 /* Storage controllers */ 60 {"ahci", 0, 13, 0, 0}, 61 {"lsilogic", 0, 20, 0, 0}, 62 {"buslogic", 0, 21, 0, 0}, 63 {"lsilogicsas", 0, 22, 0, 0}, 64 65 /* USB controllers */ 66 {"usb-ohci", 0, 6, 0, 0}, 67 {"usb-ehci", 0, 11, 0, 0}, 68 69 /* ACPI controller */ 70 {"acpi", 0, 7, 0, 0}, 71 72 73 /* Network controllers */ 74 /* the first network card gets the PCI ID 3, the next 3 gets 8..10, 75 * next 4 get 16..19. */ 76 {"nic", 0, 3, 0, 0}, 77 {"nic", 0, 8, 0, 0}, 78 {"nic", 0, 9, 0, 0}, 79 {"nic", 0, 10, 0, 0}, 80 {"nic", 0, 16, 0, 0}, 81 {"nic", 0, 17, 0, 0}, 82 {"nic", 0, 18, 0, 0}, 83 {"nic", 0, 19, 0, 0}, 84 /* VMWare assigns first NIC to slot 11 */ 85 {"nic-vmware", 0, 11, 0, 0}, 86 87 /* ISA/LPC controller */ 88 {"lpc", 0, 31, 0, 0}, 89 90 { NULL, -1, -1, -1, 0} 91 }; 92 93 /* PIIX3 chipset rules */ 94 static const DeviceAssignmentRule aPiix3Rules[] = 95 { 96 {"piix3ide", 0, 1, 1, 0}, 97 {"pcibridge", 0, 24, 0, 0}, 98 {"pcibridge", 0, 25, 0, 0}, 99 { NULL, -1, -1, -1, 0} 100 }; 101 102 103 /* ICH9 chipset rules */ 104 static const DeviceAssignmentRule aIch9Rules[] = 105 { 106 /* Host Controller */ 107 {"i82801", 0, 30, 0, 0}, 108 109 /* Those are functions of LPC at 00:1e:00 */ 110 /** 111 * Please note, that for devices being functions, like we do here, device 0 112 * must be multifunction, i.e. have header type 0x80. Our LPC device is. 113 * Alternative approach is to assign separate slot to each device. 114 */ 115 {"piix3ide", 0, 31, 1, 1}, 116 {"ahci", 0, 31, 2, 1}, 117 {"smbus", 0, 31, 3, 1}, 118 {"usb-ohci", 0, 31, 4, 1}, 119 {"usb-ehci", 0, 31, 5, 1}, 120 {"thermal", 0, 31, 6, 1}, 121 122 /* ths rule has lower priority than generic one */ 123 {"lsilogic", 1, 20, 0, -1}, 124 {"lsilogic", 1, 20, 0, -1}, 125 126 /* to make sure rule never used before rules assigning devices on it */ 127 {"ich9pcibridge", 0, 24, 0, 10}, 128 {"ich9pcibridge", 0, 25, 0, 10}, 129 {"ich9pcibridge", 1, 24, 0, 5}, 130 {"ich9pcibridge", 1, 25, 0, 5}, 131 { NULL, -1, -1, -1, 0} 132 }; 133 134 /* Aliasing rules */ 135 static const DeviceAliasRule aDeviceAliases[] = 136 { 137 {"e1000", "nic"}, 138 {"pcnet", "nic"}, 139 {"virtio-net", "nic"} 140 }; 27 141 28 142 struct BusAssignmentManager::State … … 50 164 typedef std::map <PciBusAddress,PciDeviceRecord > PciMap; 51 165 typedef std::vector<PciBusAddress> PciAddrList; 166 typedef std::vector<const DeviceAssignmentRule*> PciRulesList; 167 52 168 typedef std::map <PciDeviceRecord,PciAddrList > ReversePciMap; 53 169 … … 69 185 bool checkAvailable(PciBusAddress& Address); 70 186 bool findPciAddress(const char* pszDevName, int iInstance, PciBusAddress& Address); 187 188 const char* findAlias(const char* pszName); 189 void addMatchingRules(const char* pszName, PciRulesList& aList); 71 190 }; 72 191 … … 76 195 return S_OK; 77 196 } 78 79 197 80 198 HRESULT BusAssignmentManager::State::record(const char* pszName, PciBusAddress& Address) … … 113 231 } 114 232 233 void BusAssignmentManager::State::addMatchingRules(const char* pszName, PciRulesList& aList) 234 { 235 size_t iRuleset, iRule; 236 const DeviceAssignmentRule* aArrays[2] = {aGenericRules, NULL}; 237 238 switch (mChipsetType) 239 { 240 case ChipsetType_PIIX3: 241 aArrays[1] = aPiix3Rules; 242 break; 243 case ChipsetType_ICH9: 244 aArrays[1] = aIch9Rules; 245 break; 246 default: 247 Assert(false); 248 break; 249 } 250 251 for (iRuleset = 0; iRuleset < RT_ELEMENTS(aArrays); iRuleset++) 252 { 253 if (aArrays[iRuleset] == NULL) 254 continue; 255 256 for (iRule = 0; aArrays[iRuleset][iRule].pszName != NULL; iRule++) 257 { 258 if (strcmp(pszName, aArrays[iRuleset][iRule].pszName) == 0) 259 aList.push_back(&aArrays[iRuleset][iRule]); 260 } 261 } 262 } 263 264 const char* BusAssignmentManager::State::findAlias(const char* pszDev) 265 { 266 for (size_t iAlias = 0; iAlias < RT_ELEMENTS(aDeviceAliases); iAlias++) 267 { 268 if (strcmp(pszDev, aDeviceAliases[iAlias].pszDevName) == 0) 269 return aDeviceAliases[iAlias].pszDevAlias; 270 } 271 return NULL; 272 } 273 274 static bool RuleComparator(const DeviceAssignmentRule* r1, const DeviceAssignmentRule* r2) 275 { 276 return (r1->iPriority > r2->iPriority); 277 } 278 115 279 HRESULT BusAssignmentManager::State::autoAssign(const char* pszName, PciBusAddress& Address) 116 280 { 117 // unimplemented yet 118 Assert(false); 119 return S_OK; 281 PciRulesList matchingRules; 282 283 addMatchingRules(pszName, matchingRules); 284 const char* pszAlias = findAlias(pszName); 285 if (pszAlias) 286 addMatchingRules(pszAlias, matchingRules); 287 288 AssertMsg(matchingRules.size() > 0, ("No rule for %s(%s)\n", pszName, pszAlias)); 289 290 sort(matchingRules.begin(), matchingRules.end(), RuleComparator); 291 292 for (size_t iRule = 0; iRule < matchingRules.size(); iRule++) 293 { 294 const DeviceAssignmentRule* rule = matchingRules[iRule]; 295 296 Address.iBus = rule->iBus; 297 Address.iDevice = rule->iDevice; 298 Address.iFn = rule->iFn; 299 300 if (checkAvailable(Address)) 301 return S_OK; 302 } 303 AssertMsg(false, ("All possible candidate positions for %s exhausted\n", pszName)); 304 305 return E_INVALIDARG; 120 306 } 121 307 … … 202 388 return rc; 203 389 204 Assert(Address.valid() );390 Assert(Address.valid() && pState->checkAvailable(Address)); 205 391 206 392 rc = pState->record(pszDevName, Address); -
trunk/src/VBox/Main/ConsoleImpl2.cpp
r33718 r33722 882 882 InsertConfigNode(pDev, "0", &pInst); 883 883 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */ 884 PciAddr = PciBusAddress(0, 24, 0); 885 hrc = BusMgr->assignPciDevice("ich9pcibridge", pInst, PciAddr); H(); 884 hrc = BusMgr->assignPciDevice("ich9pcibridge", pInst); H(); 886 885 887 886 InsertConfigNode(pDev, "1", &pInst); 888 887 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */ 889 PciAddr = PciBusAddress(0, 25, 0); 890 hrc = BusMgr->assignPciDevice("ich9pcibridge", pInst, PciAddr); H(); 888 hrc = BusMgr->assignPciDevice("ich9pcibridge", pInst); H(); 891 889 } 892 890 … … 966 964 InsertConfigNode(pDevices, "lpc", &pDev); 967 965 InsertConfigNode(pDev, "0", &pInst); 968 #if 0969 PciAddr = PciBusAddress(0, 31, 0);970 966 hrc = BusMgr->assignPciDevice("lpc", pInst); H(); 971 #endif972 967 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */ 973 968 } … … 1061 1056 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */ 1062 1057 1063 PciAddr = PciBusAddress(0, 2, 0); 1064 hrc = BusMgr->assignPciDevice("vga", pInst, PciAddr); H(); 1058 hrc = BusMgr->assignPciDevice("vga", pInst); H(); 1065 1059 InsertConfigNode(pInst, "Config", &pCfg); 1066 1060 ULONG cVRamMBs; … … 1329 1323 case StorageControllerType_LsiLogic: 1330 1324 { 1331 PciAddr = PciBusAddress(1, 20, 0); 1332 hrc = BusMgr->assignPciDevice("lsilogic", pCtlInst, PciAddr); H(); 1325 hrc = BusMgr->assignPciDevice("lsilogic", pCtlInst); H(); 1333 1326 1334 1327 … … 1347 1340 case StorageControllerType_BusLogic: 1348 1341 { 1349 PciAddr = PciBusAddress(0, 21, 0); 1350 hrc = BusMgr->assignPciDevice("buslogic", pCtlInst, PciAddr); H(); 1342 hrc = BusMgr->assignPciDevice("buslogic", pCtlInst); H(); 1351 1343 1352 1344 /* Attach the status driver */ … … 1364 1356 case StorageControllerType_IntelAhci: 1365 1357 { 1366 PciAddr = PciBusAddress(0, 13, 0); 1367 hrc = BusMgr->assignPciDevice("ahci", pCtlInst, PciAddr); H(); 1358 hrc = BusMgr->assignPciDevice("ahci", pCtlInst); H(); 1368 1359 1369 1360 ULONG cPorts = 0; … … 1410 1401 * IDE (update this when the main interface changes) 1411 1402 */ 1412 PciAddr = PciBusAddress(0, 1, 1); 1413 hrc = BusMgr->assignPciDevice("ide", pCtlInst, PciAddr); H(); 1403 hrc = BusMgr->assignPciDevice("piix3ide", pCtlInst); H(); 1414 1404 InsertConfigString(pCfg, "Type", controllerString(enmCtrlType)); 1415 1405 … … 1456 1446 case StorageControllerType_LsiLogicSas: 1457 1447 { 1458 PciAddr = PciBusAddress(0, 22, 0); 1459 hrc = BusMgr->assignPciDevice("lsilogicsas", pCtlInst, PciAddr); H(); 1448 hrc = BusMgr->assignPciDevice("lsilogicsas", pCtlInst); H(); 1460 1449 1461 1450 InsertConfigString(pCfg, "ControllerType", "SAS1068"); … … 1818 1807 InsertConfigNode(pInst, "Config", &pCfg); 1819 1808 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */ 1820 PciAddr = PciBusAddress(0, 4, 0); 1821 hrc = BusMgr->assignPciDevice("VMMDev", pInst, PciAddr); H(); 1809 hrc = BusMgr->assignPciDevice("VMMDev", pInst); H(); 1822 1810 1823 1811 Bstr hwVersion; … … 1881 1869 InsertConfigNode(pDev, "0", &pInst); 1882 1870 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */ 1883 PciAddr = PciBusAddress(0, 5, 0); 1884 hrc = BusMgr->assignPciDevice("ichac97", pInst, PciAddr); H(); 1871 hrc = BusMgr->assignPciDevice("ichac97", pInst); H(); 1885 1872 InsertConfigNode(pInst, "Config", &pCfg); 1886 1873 break; … … 1906 1893 InsertConfigNode(pDev, "0", &pInst); 1907 1894 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */ 1908 PciAddr = PciBusAddress(0, 5, 0); 1909 hrc = BusMgr->assignPciDevice("hda", pInst, PciAddr); H(); 1895 hrc = BusMgr->assignPciDevice("hda", pInst); H(); 1910 1896 InsertConfigNode(pInst, "Config", &pCfg); 1911 1897 } … … 2006 1992 InsertConfigNode(pInst, "Config", &pCfg); 2007 1993 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */ 2008 PciAddr = PciBusAddress(0, 6, 0); 2009 hrc = BusMgr->assignPciDevice("usb-ohci", pInst, PciAddr); H(); 1994 hrc = BusMgr->assignPciDevice("usb-ohci", pInst); H(); 2010 1995 InsertConfigNode(pInst, "LUN#0", &pLunL0); 2011 1996 InsertConfigString(pLunL0, "Driver", "VUSBRootHub"); … … 2031 2016 InsertConfigNode(pInst, "Config", &pCfg); 2032 2017 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */ 2033 PciAddr = PciBusAddress(0, 11, 0); 2034 hrc = BusMgr->assignPciDevice("usb-ohci", pInst, PciAddr); H(); 2018 hrc = BusMgr->assignPciDevice("usb-ehci", pInst); H(); 2035 2019 2036 2020 InsertConfigNode(pInst, "LUN#0", &pLunL0); … … 2291 2275 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */ 2292 2276 InsertConfigNode(pInst, "Config", &pCfg); 2293 PciAddr = PciBusAddress(0, 7, 0); 2294 hrc = BusMgr->assignPciDevice("acpi", pInst, PciAddr); H(); 2277 hrc = BusMgr->assignPciDevice("acpi", pInst); H(); 2295 2278 2296 2279 InsertConfigInteger(pCfg, "RamSize", cbRam);
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