Changeset 33803 in vbox for trunk/src/VBox/Devices/Audio
- Timestamp:
- Nov 5, 2010 4:48:44 PM (14 years ago)
- File:
-
- 1 edited
-
trunk/src/VBox/Devices/Audio/DevCodec.cpp (modified) (16 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/Devices/Audio/DevCodec.cpp
r33787 r33803 168 168 169 169 /* Amplifier capabilities (7.3.4.10) */ 170 #define MAKE_F00_0D(mute_cap, step_size, num_steps, offset) \ 171 (((mute_cap) & 0x1) << 31) \ 172 | (((step_size) & 0xFF) << 16) \ 173 | (((num_steps) & 0xFF) << 8) \ 174 | ((offset) & 0xFF) 175 170 #define CODEC_MAKE_F00_0D(mute_cap, step_size, num_steps, offset) \ 171 ( (((mute_cap) & 0x1) << 31) \ 172 | (((step_size) & 0xFF) << 16) \ 173 | (((num_steps) & 0xFF) << 8) \ 174 | ((offset) & 0xFF)) 175 176 /* Connection list lenght (7.3.4.11) */ 177 #define CODEC_MAKE_F00_0E(long_form, length) \ 178 ( (((long_form) & 0x1) << 7) \ 179 | ((length) & 0x7F)) 180 /* Supported Power States (7.3.4.12) */ 181 #define CODEC_F00_0F_EPSS RT_BIT(31) 182 #define CODEC_F00_0F_CLKSTOP RT_BIT(30) 183 #define CODEC_F00_0F_S3D3 RT_BIT(29) 184 #define CODEC_F00_0F_D3COLD RT_BIT(4) 185 #define CODEC_F00_0F_D3 RT_BIT(3) 186 #define CODEC_F00_0F_D2 RT_BIT(2) 187 #define CODEC_F00_0F_D1 RT_BIT(1) 188 #define CODEC_F00_0F_D0 RT_BIT(0) 189 190 /* CP/IO Count (7.3.4.14) */ 191 #define CODEC_MAKE_F00_11(wake, unsol, numgpi, numgpo, numgpio) \ 192 ( (((wake) & 0x1) << 31) \ 193 | (((unsol) & 0x1) << 30) \ 194 | (((numgpi) & 0xFF) << 16) \ 195 | (((numgpo) & 0xFF) << 8) \ 196 | ((numgpio) & 0xFF)) 197 198 /* Power States (7.3.3.10) */ 199 #define CODEC_MAKE_F05(reset, stopok, error, act, set) \ 200 ( (((reset) & 0x1) << 10) \ 201 | (((stopok) & 0x1) << 9) \ 202 | (((error) & 0x1) << 8) \ 203 | (((act) & 0x7) << 4) \ 204 | ((set) & 0x7)) 205 #define CODEC_F05_D3COLD (4) 206 #define CODEC_F05_D3 (3) 207 #define CODEC_F05_D2 (2) 208 #define CODEC_F05_D1 (1) 209 #define CODEC_F05_D0 (0) 210 211 #define CODEC_F05_IS_RESET(value) (((value) & RT_BIT(10)) != 0) 212 #define CODEC_F05_IS_STOPOK(value) (((value) & RT_BIT(9)) != 0) 213 #define CODEC_F05_IS_ERROR(value) (((value) & RT_BIT(8)) != 0) 214 #define CODEC_F05_ACT(value) (((value) & 0x7) >> 4) 215 #define CODEC_F05_SET(value) (((value) & 0x7)) 176 216 177 217 /* HDA spec 7.3.3.31 defines layout of configuration registers/verbs (0xF1C) */ … … 356 396 | CODEC_F00_0C_CAP_IMPENDANCE_SENSE;//(17 << 8)|RT_BIT(6)|RT_BIT(5)|RT_BIT(2)|RT_BIT(1)|RT_BIT(0); 357 397 pNode->node.au32F00_param[0xB] = CODEC_F00_0B_PCM; 358 pNode->node.au32F00_param[0xD] = MAKE_F00_0D(1, 0x5, 0xE, 0);//RT_BIT(31)|(0x5 << 16)|(0xE)<<8;398 pNode->node.au32F00_param[0xD] = CODEC_MAKE_F00_0D(1, 0x5, 0xE, 0);//RT_BIT(31)|(0x5 << 16)|(0xE)<<8; 359 399 pNode->node.au32F00_param[0x12] = RT_BIT(31)|(0x2 << 16)|(0x7f << 8)|0x7f; 360 pNode->node.au32F00_param[0x11] = 0xc0000004;361 pNode->node.au32F00_param[0xF] = 0xF;362 pNode->afg.u32F05_param = 0x2 << 4| 0x2; /* PS-Act: D3, PS->Set D3 */400 pNode->node.au32F00_param[0x11] = CODEC_MAKE_F00_11(1, 1, 0, 0, 4);//0xc0000004; 401 pNode->node.au32F00_param[0xF] = CODEC_F00_0F_D3|CODEC_F00_0F_D2|CODEC_F00_0F_D1|CODEC_F00_0F_D0; 402 pNode->afg.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D2, CODEC_F05_D2);//0x2 << 4| 0x2; /* PS-Act: D3, PS->Set D3 */ 363 403 pNode->afg.u32F20_param = pState->u16VendorId << 16 | pState->u16DeviceId; 364 404 pNode->afg.u32F08_param = 0; … … 389 429 | CODEC_F00_09_CAP_LSB;//(0xD << 16) | RT_BIT(11) | RT_BIT(10) | RT_BIT(2) | RT_BIT(0); 390 430 pNode->dac.u32F0c_param = 0; 391 pNode->dac.u32F05_param = 0x3 << 4 | 0x3; /* PS-Act: D3, Set: D3 */431 pNode->dac.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D3, CODEC_F05_D3);//0x3 << 4 | 0x3; /* PS-Act: D3, Set: D3 */ 392 432 break; 393 433 case 6: … … 400 440 adc_init: 401 441 pNode->adc.u32A_param = RT_BIT(14)|(0x1 << 3)|0x1; /* 441000Hz/16bit/2ch */ 402 pNode->adc.node.au32F00_param[0xE] = RT_BIT(0);442 pNode->adc.node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 1);//RT_BIT(0); 403 443 pNode->adc.u32F03_param = RT_BIT(0); 404 pNode->adc.u32F05_param = 0x3 << 4 | 0x3; /* PS-Act: D3 Set: D3 */444 pNode->adc.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D3, CODEC_F05_D3);//0x3 << 4 | 0x3; /* PS-Act: D3 Set: D3 */ 405 445 pNode->adc.u32F06_param = 0; 406 446 pNode->adc.node.au32F00_param[9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_AUDIO_INPUT, 0xD, 0) … … 431 471 | CODEC_F00_09_CAP_LSB;//(0x1 << 20)|(4 << 16) | RT_BIT(9)| RT_BIT(8)|RT_BIT(4)|0x1; 432 472 pNode->node.au32F00_param[0xA] = pState->pNodes[1].node.au32F00_param[0xA]; 433 pNode->node.au32F00_param[0xE] = RT_BIT(0);473 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 1);//RT_BIT(0); 434 474 pNode->node.au32F02_param[0] = 0x11; 435 475 pNode->spdifin.node.au32F00_param[0xB] = CODEC_F00_0B_PCM; … … 519 559 | CODEC_F00_09_CAP_UNSOL 520 560 | CODEC_F00_09_CAP_LSB;//(4 << 20)|RT_BIT(8)|RT_BIT(7)|RT_BIT(0); 521 pNode->node.au32F00_param[0xE] = 0x1;561 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 1);//0x1; 522 562 break; 523 563 case 0xE: … … 552 592 | CODEC_F00_0C_CAP_TRIGGER_REQUIRED 553 593 | CODEC_F00_0C_CAP_IMPENDANCE_SENSE;//0x37; 554 pNode->node.au32F00_param[0xE] = 0x1;594 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 1);//0x1; 555 595 pNode->port.u32F08_param = 0; 556 596 pNode->port.u32F07_param = 0x40; … … 572 612 | CODEC_F00_09_CAP_LSB;//(4<<20)|RT_BIT(9)|RT_BIT(8)|RT_BIT(0); 573 613 pNode->node.au32F00_param[0xC] = CODEC_F00_0C_CAP_OUTPUT;//RT_BIT(4); 574 pNode->node.au32F00_param[0xE] = 0x3;614 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 0x3); 575 615 pNode->digout.u32F01_param = 0; 576 616 pNode->node.au32F02_param[0] = RT_MAKE_U32_FROM_U8(0x08, 0x17, 0x19, 0); … … 590 630 | CODEC_F00_0C_CAP_INPUT 591 631 | CODEC_F00_0C_CAP_PRESENSE_DETECT;//RT_BIT(16)| RT_BIT(5)|RT_BIT(2); 592 pNode->digin.u32F05_param = 0x3 << 4 | 0x3; /* PS-Act: D3 -> D3 */632 pNode->digin.u32F05_param = CODEC_MAKE_F05(0, 0, 0, CODEC_F05_D3, CODEC_F05_D3);//0x3 << 4 | 0x3; /* PS-Act: D3 -> D3 */ 593 633 pNode->digin.u32F07_param = 0; 594 634 pNode->digin.u32F08_param = 0; … … 616 656 | CODEC_F00_09_CAP_OUT_AMP_PRESENT 617 657 | CODEC_F00_09_CAP_LSB;//(3<<20)|RT_BIT(8)|RT_BIT(3)|RT_BIT(2)|RT_BIT(0); 618 pNode->node.au32F00_param[0xe] = 0x7;658 pNode->node.au32F00_param[0xe] = CODEC_MAKE_F00_0E(0, 0x7); 619 659 pNode->node.au32F00_param[0x12] = (0x27 << 16)|(0x4 << 8); 620 660 /* STAC 9220 v10 6.21-22.{4,5} both(left and right) out amplefiers inited with 0*/ … … 650 690 pNode->node.au32F00_param[0x9] = CODEC_MAKE_F00_09(CODEC_F00_09_TYPE_VOLUME_KNOB, 0x0, 0x0);//(0x6 << 20); 651 691 pNode->node.au32F00_param[0x13] = RT_BIT(7)| 0x7F; 652 pNode->node.au32F00_param[0xe] = 0x4;692 pNode->node.au32F00_param[0xe] = CODEC_MAKE_F00_0E(0, 0x4); 653 693 pNode->node.au32F02_param[0] = RT_MAKE_U32_FROM_U8(0x2, 0x3, 0x4, 0x5); 654 694 pNode->volumeKnob.u32F08_param = 0; … … 670 710 | CODEC_F00_09_CAP_IN_AMP_PRESENT 671 711 | CODEC_F00_09_CAP_LSB;//(0x3 << 20)|RT_BIT(11)|RT_BIT(8)|RT_BIT(1)|RT_BIT(0); 672 pNode->node.au32F00_param[0xe] = 0x1;712 pNode->node.au32F00_param[0xe] = CODEC_MAKE_F00_0E(0, 0x1); 673 713 AMPLIFIER_REGISTER(pNode->adcvol.B_params, AMPLIFIER_IN, AMPLIFIER_LEFT, 0) = RT_BIT(7); 674 714 AMPLIFIER_REGISTER(pNode->adcvol.B_params, AMPLIFIER_IN, AMPLIFIER_RIGHT, 0) = RT_BIT(7); … … 693 733 | CODEC_F00_09_CAP_CONNECTION_LIST 694 734 | CODEC_F00_09_CAP_LSB;//(0x4 << 20)|RT_BIT(9)|RT_BIT(8)|RT_BIT(0); 695 pNode->node.au32F00_param[0xE] = 0x1;735 pNode->node.au32F00_param[0xE] = CODEC_MAKE_F00_0E(0, 0x1); 696 736 pNode->node.au32F00_param[0xC] = CODEC_F00_0C_CAP_OUTPUT;//0x10; 697 737 pNode->node.au32F02_param[0] = 0x1a; … … 1099 1139 1100 1140 /* generic */ 1101 1102 #define CODEC_POWER_MASK 0x31103 #define CODEC_POWER_ACT_SHIFT (4)1104 #define CODEC_POWER_SET_SHIFT (0)1105 #define CODEC_POWER_D0 (0)1106 #define CODEC_POWER_D1 (1)1107 #define CODEC_POWER_D2 (2)1108 #define CODEC_POWER_D3 (3)1109 #define CODEC_POWER_PROPOGATE_STATE(node) \1110 do { \1111 node.u32F05_param &= (CODEC_POWER_MASK); \1112 node.u32F05_param |= (node.u32F05_param & CODEC_POWER_MASK) << CODEC_POWER_ACT_SHIFT; \1113 }while(0)1114 1141 1115 1142 #define DECLISNODEOFTYPE(type) \ … … 1738 1765 1739 1766 /* 705 */ 1767 1768 static inline void codecPropogatePowerState(uint32_t *pu32F05_param) 1769 { 1770 Assert(pu32F05_param); 1771 if (pu32F05_param) 1772 return; 1773 bool fReset = CODEC_F05_IS_RESET(*pu32F05_param); 1774 bool fStopOk = CODEC_F05_IS_STOPOK(*pu32F05_param); 1775 uint8_t u8SetPowerState = CODEC_F05_SET(*pu32F05_param); 1776 *pu32F05_param = CODEC_MAKE_F05(fReset, fStopOk, 0, u8SetPowerState, u8SetPowerState); 1777 } 1778 1740 1779 static int codecSetPowerState(struct CODECState *pState, uint32_t cmd, uint64_t *pResp) 1741 1780 { … … 1766 1805 if (!pu32Reg) 1767 1806 return VINF_SUCCESS; 1768 1769 if (!CODEC_NID(cmd) == 1 /* AFG */) 1770 { 1771 *pu32Reg &= ~CODEC_VERB_8BIT_DATA; 1772 *pu32Reg |= (pState->pNodes[1].afg.u32F05_param & (CODEC_VERB_4BIT_DATA << 4)); 1773 } 1774 else 1775 *pu32Reg &= ~CODEC_VERB_4BIT_DATA; 1776 1777 *pu32Reg |= cmd & CODEC_VERB_4BIT_DATA; 1807 1808 bool fReset = CODEC_F05_IS_RESET(*pu32Reg); 1809 bool fStopOk = CODEC_F05_IS_STOPOK(*pu32Reg); 1810 1811 if (CODEC_NID(cmd) != 1 /* AFG */) 1812 { 1813 /* 1814 * We shouldn't propogate actual power state, which actual for AFG 1815 */ 1816 *pu32Reg = CODEC_MAKE_F05(fReset, fStopOk, 0, 1817 CODEC_F05_ACT(pState->pNodes[1].afg.u32F05_param), 1818 CODEC_F05_SET(cmd)); 1819 } 1820 1778 1821 /* Propagate next power state only if AFG is on or verb modifies AFG power state */ 1779 1822 if ( CODEC_NID(cmd) == 1 /* AFG */ 1780 || !pState->pNodes[1].afg.u32F05_param) 1781 { 1782 *pu32Reg &= ~(CODEC_POWER_MASK << CODEC_POWER_ACT_SHIFT); 1783 *pu32Reg |= (cmd & CODEC_VERB_4BIT_DATA) << 4; 1823 || !CODEC_F05_ACT(pState->pNodes[1].afg.u32F05_param)) 1824 { 1825 *pu32Reg = CODEC_MAKE_F05(fReset, fStopOk, 0, CODEC_F05_SET(cmd), CODEC_F05_SET(cmd)); 1784 1826 if ( CODEC_NID(cmd) == 1 /* AFG */ 1785 && ( cmd & CODEC_POWER_MASK) == CODEC_POWER_D0)1827 && (CODEC_F05_SET(cmd)) == CODEC_F05_D0) 1786 1828 { 1787 CODEC_POWER_PROPOGATE_STATE(pState->pNodes[2].dac); 1788 CODEC_POWER_PROPOGATE_STATE(pState->pNodes[3].dac); 1789 CODEC_POWER_PROPOGATE_STATE(pState->pNodes[4].dac); 1790 CODEC_POWER_PROPOGATE_STATE(pState->pNodes[5].dac); 1791 CODEC_POWER_PROPOGATE_STATE(pState->pNodes[6].dac); 1792 CODEC_POWER_PROPOGATE_STATE(pState->pNodes[7].dac); 1793 CODEC_POWER_PROPOGATE_STATE(pState->pNodes[0x11].dac); 1829 /* now we're powered on AFG and may propogate power states on nodes */ 1830 const uint8_t *pu8NodeIndex = &pState->au8Dacs[0]; 1831 while (*(++pu8NodeIndex)) 1832 codecPropogatePowerState(&pState->pNodes[*pu8NodeIndex].dac.u32F05_param); 1833 1834 pu8NodeIndex = &pState->au8Adcs[0]; 1835 while (*(++pu8NodeIndex)) 1836 codecPropogatePowerState(&pState->pNodes[*pu8NodeIndex].adc.u32F05_param); 1837 1838 pu8NodeIndex = &pState->au8DigInPins[0]; 1839 while (*(++pu8NodeIndex)) 1840 codecPropogatePowerState(&pState->pNodes[*pu8NodeIndex].digin.u32F05_param); 1794 1841 } 1795 1842 }
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