Changeset 34106 in vbox for trunk/src/VBox/Devices/Storage
- Timestamp:
- Nov 16, 2010 11:37:01 AM (14 years ago)
- svn:sync-xref-src-repo-rev:
- 67808
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Storage/DevAHCI.cpp
r34009 r34106 943 943 * Updates the IRQ level and sets port bit in the global interrupt status register of the HBA. 944 944 */ 945 static void ahciHbaSetInterrupt(PAHCI pAhci, uint8_t iPort)945 static int ahciHbaSetInterrupt(PAHCI pAhci, uint8_t iPort, int rcBusy) 946 946 { 947 947 Log(("P%u: %s: Setting interrupt\n", iPort, __FUNCTION__)); 948 948 949 PDMCritSectEnter(&pAhci->lock, VINF_SUCCESS); 949 int rc = PDMCritSectEnter(&pAhci->lock, rcBusy); 950 if (rc != VINF_SUCCESS) 951 return rc; 950 952 951 953 if (pAhci->regHbaCtrl & AHCI_HBA_CTRL_IE) … … 985 987 986 988 PDMCritSectLeave(&pAhci->lock); 989 return VINF_SUCCESS; 987 990 } 988 991 … … 995 998 PAHCI pAhci = (PAHCI)pvUser; 996 999 997 ahciHbaSetInterrupt(pAhci, pAhci->uCccPortNr );1000 ahciHbaSetInterrupt(pAhci, pAhci->uCccPortNr, VINF_SUCCESS); 998 1001 } 999 1002 #endif … … 1161 1164 1162 1165 if (pAhciPort->regIE & AHCI_PORT_IE_DHRE) 1163 ahciHbaSetInterrupt(pAhciPort->CTX_SUFF(pAhci), pAhciPort->iLUN );1166 ahciHbaSetInterrupt(pAhciPort->CTX_SUFF(pAhci), pAhciPort->iLUN, VINF_SUCCESS); 1164 1167 } 1165 1168 } … … 1306 1309 1307 1310 if (pAhciPort->regIE & AHCI_PORT_IE_DHRE) 1308 ahciHbaSetInterrupt(pAhciPort->CTX_SUFF(pAhci), pAhciPort->iLUN );1311 ahciHbaSetInterrupt(pAhciPort->CTX_SUFF(pAhci), pAhciPort->iLUN, VINF_SUCCESS); 1309 1312 #endif 1310 1313 } … … 1371 1374 static int PortIntrEnable_w(PAHCI ahci, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value) 1372 1375 { 1376 int rc = VINF_SUCCESS; 1373 1377 ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value)); 1374 1378 ahciLog(("%s: CPDE=%d TFEE=%d HBFE=%d HBDE=%d IFE=%d INFE=%d OFE=%d IPME=%d PRCE=%d DIE=%d PCE=%d DPE=%d UFE=%d SDBE=%d DSE=%d PSE=%d DHRE=%d\n", … … 1383 1387 (u32Value & AHCI_PORT_IE_DHRE))); 1384 1388 1385 pAhciPort->regIE = (u32Value & AHCI_PORT_IE_READONLY);1389 u32Value &= AHCI_PORT_IE_READONLY; 1386 1390 1387 1391 /* Check if some a interrupt status bit changed*/ 1388 1392 uint32_t u32IntrStatus = ASMAtomicReadU32(&pAhciPort->regIS); 1389 1393 1390 if (pAhciPort->regIE & u32IntrStatus) 1391 ahciHbaSetInterrupt(ahci, pAhciPort->iLUN); 1392 1393 return VINF_SUCCESS; 1394 if (u32Value & u32IntrStatus) 1395 rc = ahciHbaSetInterrupt(ahci, pAhciPort->iLUN, VINF_IOM_HC_MMIO_WRITE); 1396 1397 if (rc == VINF_SUCCESS) 1398 pAhciPort->regIE = u32Value; 1399 1400 return rc; 1394 1401 } 1395 1402 … … 4459 4466 ASMAtomicOrU32(&pAhciPort->u32TasksFinished, (1 << pAhciPortTaskState->uTag)); 4460 4467 4461 ahciHbaSetInterrupt(pAhciPort->CTX_SUFF(pAhci), pAhciPort->iLUN );4468 ahciHbaSetInterrupt(pAhciPort->CTX_SUFF(pAhci), pAhciPort->iLUN, VINF_SUCCESS); 4462 4469 } 4463 4470 … … 4540 4547 4541 4548 if (fAssertIntr) 4542 ahciHbaSetInterrupt(pAhci, pAhciPort->iLUN );4549 ahciHbaSetInterrupt(pAhci, pAhciPort->iLUN, VINF_SUCCESS); 4543 4550 } 4544 4551 } … … 4604 4611 4605 4612 if (fAssertIntr) 4606 ahciHbaSetInterrupt(pAhci, pAhciPort->iLUN );4613 ahciHbaSetInterrupt(pAhci, pAhciPort->iLUN, VINF_SUCCESS); 4607 4614 } 4608 4615 } … … 7191 7198 pAhciPort->regSERR |= AHCI_PORT_SERR_N; 7192 7199 if (pAhciPort->regIE & AHCI_PORT_IE_CPDE) 7193 ahciHbaSetInterrupt(pAhciPort->CTX_SUFF(pAhci), pAhciPort->iLUN );7200 ahciHbaSetInterrupt(pAhciPort->CTX_SUFF(pAhci), pAhciPort->iLUN, VINF_SUCCESS); 7194 7201 } 7195 7202 } … … 7228 7235 pAhciPort->regSERR |= AHCI_PORT_SERR_N; 7229 7236 if (pAhciPort->regIE & AHCI_PORT_IE_CPDE) 7230 ahciHbaSetInterrupt(pAhciPort->CTX_SUFF(pAhci), pAhciPort->iLUN );7237 ahciHbaSetInterrupt(pAhciPort->CTX_SUFF(pAhci), pAhciPort->iLUN, VINF_SUCCESS); 7231 7238 } 7232 7239 }
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