VirtualBox

Changeset 34151 in vbox for trunk/src/VBox


Ignore:
Timestamp:
Nov 18, 2010 4:46:12 AM (14 years ago)
Author:
vboxsync
Message:

Audio/HDA: more enchancement, some logs and todos.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/Audio/DevIchIntelHDA.cpp

    r34146 r34151  
    10221022DECLCALLBACK(int)hdaRegWriteSDCTL(INTELHDLinkState* pState, uint32_t offset, uint32_t index, uint32_t u32Value)
    10231023{
     1024    bool fOn = RT_BOOL((u32Value & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN)));
     1025    int rc = VINF_SUCCESS;
    10241026    if(u32Value & HDA_REG_FIELD_FLAG_MASK(SDCTL, SRST))
    10251027    {
     
    10351037        HDA_REG_IND(pState, index) &= ~HDA_REG_FIELD_FLAG_MASK(SDCTL, SRST);
    10361038    }
    1037     /* @todo: use right offsets for right streams */
    1038     if (u32Value & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN))
    1039     {
    1040         Log(("hda: DMA(%x) switched on\n", offset));
    1041         if (offset == 0x80)
    1042             AUD_set_active_in(ISD0FMT_TO_AUDIO_SELECTOR(pState), 1);
    1043         if (offset == 0x100)
    1044         {
     1039    switch (index)
     1040    {
     1041        case ICH6_HDA_REG_SD0CTL:
     1042            AUD_set_active_in(ISD0FMT_TO_AUDIO_SELECTOR(pState), fOn);
     1043            Log(("hda: DMA SD0CTL switched %s\n", fOn ? "on" : " off"));
     1044            break;
     1045        case ICH6_HDA_REG_SD4CTL:
    10451046            uint64_t u64BaseDMA = RT_MAKE_U64(SDBDPL(pState, 4), SDBDPU(pState, 4));
    1046             if (u64BaseDMA)
    1047                 AUD_set_active_out(OSD0FMT_TO_AUDIO_SELECTOR(pState), 1);
    1048         }
    1049     }
    1050     else
    1051     {
    1052         Log(("hda: DMA(%x) switched off\n", offset));
    1053         if (offset == 0x80)
    1054         {
    1055             AUD_set_active_in(ISD0FMT_TO_AUDIO_SELECTOR(pState), 0);
    1056         }
    1057         if (offset == 0x100)
    1058         {
     1047            fOn = fOn && u64BaseDMA;
    10591048            SDSTS(pState, 4) &= ~(1<<5);
    1060             AUD_set_active_out(OSD0FMT_TO_AUDIO_SELECTOR(pState), 0);
    1061         }
    1062     }
    1063     int rc = hdaRegWriteU24(pState, offset, index, u32Value);
     1049            AUD_set_active_out(OSD0FMT_TO_AUDIO_SELECTOR(pState), fOn);
     1050            Log(("hda: DMA SD4CTL switched %s\n", fOn ? "on" : " off"));
     1051            break;
     1052        default:
     1053            Log(("Attempt to modify DMA state on unattached SDI(%s), ignored\n", s_ichIntelHDRegMap[index].abbrev));
     1054            break;
     1055    }
     1056    rc = hdaRegWriteU24(pState, offset, index, u32Value);
    10641057    if (RT_FAILURE(rc))
    10651058        AssertRCReturn(rc, VINF_SUCCESS);
     
    12931286        len = *(uint32_t *)&bdle[8];
    12941287        ioc = *(uint32_t *)&bdle[12];
    1295         Log(("hda: %s bdle[%d] a:%lx, len:%d, ioc:%d\n",  (i == pBdle->u32BdleCvi? "[C]": "   "), i, addr, len, ioc & 0x1));
     1288        Log(("hda: %s bdle[%d] a:%llx, len:%d, ioc:%d\n",  (i == pBdle->u32BdleCvi? "[C]": "   "), i, addr, len, ioc & 0x1));
    12961289        sum += len;
    12971290    }
     
    13821375}
    13831376
    1384 static uint32_t hdaWriteAudio(INTELHDLinkState *pState, uint32_t *pu32Avail, bool *fStop, uint32_t u32LcblLimit)
     1377static uint32_t hdaWriteAudio(INTELHDLinkState *pState, uint32_t *pu32Avail, bool *fStop, uint32_t u32CblLimit)
    13851378{
    13861379    PHDABDLEDESC pBdle = &pState->stOutBdle;
     
    13941387        uint32_t cb2Copy = 0; /* local byte counter (on local buffer) */
    13951388        uint32_t cbBackendCopy = 0; /* local byte counter, how many bytes copied to backend */
    1396         Log(("hda:wa: CVI(pos:%d, len:%d)\n", pBdle->u32BdleCviPos, pBdle->u32BdleCviLen));
     1389        Log(("hda:wa: CVI(cvi:%d, pos:%d, len:%d)\n", pBdle->u32BdleCvi, pBdle->u32BdleCviPos, pBdle->u32BdleCviLen));
    13971390        /* border check assert */
    13981391        if (   (   !pBdle->u32BdleCviLen
     
    14011394        {
    14021395            /* buffer length is 0, to little data on marked as "under FIFOW" to send to backed.*/
    1403             Log(("hda:wa: exits CVI(iAvail:%d, cbUnderFifoW:%d, len:%d)\n", *pu32Avail, pBdle->u32BdleCviLen, pBdle->cbUnderFifoW));
     1396            Log(("hda:wa: exits CVI(iAvail:%d, cbUnderFifoW:%d, cvi:%d, len:%d)\n", *pu32Avail, pBdle->u32BdleCviLen, pBdle->u32BdleCvi, pBdle->cbUnderFifoW));
    14041397            *fStop = true;
    14051398            return 0;
     
    14111404        {
    14121405            Assert((pBdle->u32BdleCviLen >= pBdle->u32BdleCviPos)); /* sanity */
    1413             cb2Copy = pBdle->u32BdleCviLen - pBdle->u32BdleCviPos;
     1406            cb2Copy = pBdle->u32BdleCviLen - pBdle->u32BdleCviPos; /* align copy buffer to size of trailing space in BDLE buffer */
    14141407            cb2Copy = RT_MIN(cb2Copy, SDFIFOS(pState, 4) + 1 - pBdle->cbUnderFifoW); /* we may increase the counter in range of [0, FIFOS(pState, 4) + 1] */
    1415             cb2Copy = RT_MIN(cb2Copy, *pu32Avail); /* sanity check to avoid overriding sound backend buffer */
    1416             cb2Copy = RT_MIN(cb2Copy, u32LcblLimit); /* avoid LCBL overrun */
     1408            cb2Copy = RT_MIN(cb2Copy, *pu32Avail); /* align copying buffer size up to size of back end buffer */
     1409            cb2Copy = RT_MIN(cb2Copy, u32CblLimit); /* avoid LCBL overrun */
    14171410        }
    14181411        if (   cb2Copy == 0
     
    14321425         * Write to audio backend.
    14331426         */
    1434         if (cb2Copy >= hdaFifoWToSz(pState, 4))
     1427        if (cb2Copy + pBdle->cbUnderFifoW >= hdaFifoWToSz(pState, 4))
    14351428        {
     1429            /*
     1430             * We feed backend with new portion of fetched samples including not reported.
     1431             */
    14361432            cbBackendCopy = AUD_write (OSD0FMT_TO_AUDIO_SELECTOR(pState), pBdle->au8HdaBuffer, cb2Copy + pBdle->cbUnderFifoW);
    14371433            Assert((cbBackendCopy));
     
    14441440                && pBdle->cbUnderFifoW <= cbBackendCopy)
    14451441                Log(("hda:wa: CVI resetting cbUnderFifoW:%d(pos:%d, len:%d)\n", pBdle->cbUnderFifoW, pBdle->u32BdleCviPos, pBdle->u32BdleCviLen));
    1446             pBdle->cbUnderFifoW -= RT_MIN(pBdle->cbUnderFifoW, cbBackendCopy);
     1442
     1443            pBdle->cbUnderFifoW -= RT_MIN(pBdle->cbUnderFifoW, cbBackendCopy);
    14471444            pBdle->u32BdleCviPos += RT_MIN(cb2Copy, cbBackendCopy);
    14481445            Assert((pBdle->u32BdleCviLen >= pBdle->u32BdleCviPos && *pu32Avail >= cbBackendCopy)); /* sanity */
     1446            Assert((!pBdle->cbUnderFifoW)); /* Assert!!! Assumption failed */
    14491447            *pu32Avail -= cbBackendCopy;
    14501448            cbTransfered += cbBackendCopy;
     
    14871485    uint8_t  u8Strm;
    14881486    uint32_t *pu32Lpib;
    1489     uint32_t u32Lcbl;
     1487    uint32_t u32Cbl;
    14901488    uint32_t u32Fifos;
    14911489    uint32_t u32Fifow;
     
    14991497            pu32Lpib = &SDLPIB(pState, 4);
    15001498            pu32Sts = &SDSTS(pState, 4);
    1501             u32Lcbl = SDLCBL(pState, 4);
     1499            u32Cbl = SDLCBL(pState, 4);
    15021500            pBdle = &pState->stOutBdle;
    15031501            pBdle->u32BdleMaxCvi = SDLVI(pState, 4);
     
    15121510            pu32Lpib = &SDLPIB(pState, 0);
    15131511            pu32Sts = &SDSTS(pState, 0);
    1514             u32Lcbl = SDLCBL(pState, 0);
     1512            u32Cbl = SDLCBL(pState, 0);
    15151513            u64BaseDMA = RT_MAKE_U64(SDBDPL(pState, 0), SDBDPU(pState, 0));
    15161514            pBdle = &pState->stInBdle;
     
    15321530    while( avail && !fStop)
    15331531    {
    1534         Assert((avail >= 0 && (u32Lcbl >= (*pu32Lpib)))); /* sanity */
    1535         uint32_t u32CblLimit = u32Lcbl - (*pu32Lpib);
    1536         Log(("hda: CBL=%d, LPIB=%d\n", u32Lcbl, *pu32Lpib));
     1532        Assert((avail >= 0 && (u32Cbl >= (*pu32Lpib)))); /* sanity */
     1533        uint32_t u32CblLimit = u32Cbl - (*pu32Lpib);
     1534        Log(("hda: CBL=%d, LPIB=%d\n", u32Cbl, *pu32Lpib));
    15371535        switch (src)
    15381536        {
     
    15561554        {
    15571555            *pu32Lpib += nBytes;
    1558             /*
    1559              * Update the buffer position and handle Cyclic Buffer Length (CBL) wraparound.
     1556
     1557            /*
     1558             * Assert. Overlapping of buffer counter shouldn't happen.
    15601559             */
    1561             Assert((*pu32Lpib <= u32Lcbl));
     1560            Assert((*pu32Lpib <= u32Cbl));
    15621561   
    15631562            /* Optionally write back the current DMA position. */
     
    15691568        /* Process end of buffer condition. */
    15701569        if (   pBdle->u32BdleCviPos == pBdle->u32BdleCviLen
    1571             || *pu32Lpib == u32Lcbl)
     1570            || *pu32Lpib == u32Cbl)
    15721571        {
    1573             if (pBdle->fBdleCviIoc)
     1572            if (   !pBdle->cbUnderFifoW
     1573                && pBdle->fBdleCviIoc)
    15741574            {
    15751575                *pu32Sts |= HDA_REG_FIELD_FLAG_MASK(SDSTS, BCIS);
    15761576                hdaProcessInterrupt(pState);
     1577                *pu32Sts &= ~HDA_REG_FIELD_FLAG_MASK(SDSTS, FIFORDY);
    15771578            }
    1578             if (*pu32Lpib == u32Lcbl)
    1579                 *pu32Lpib -= u32Lcbl;
     1579            if (*pu32Lpib == u32Cbl)
     1580                *pu32Lpib -= u32Cbl;
    15801581
    15811582            if (pBdle->u32BdleCviPos == pBdle->u32BdleCviLen)
     
    15841585                pBdle->u32BdleCvi++;
    15851586                if (pBdle->u32BdleCvi == pBdle->u32BdleMaxCvi + 1)
    1586                 {
    15871587                    pBdle->u32BdleCvi = 0;
    1588                 }
     1588
    15891589                fetch_bd(pState, pBdle, u64BaseDMA);
    15901590            }
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