- Timestamp:
- Nov 23, 2010 5:12:50 PM (14 years ago)
- Location:
- trunk
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/pci.h
r34268 r34301 749 749 750 750 /** 751 * Sets the BIST (built-in self-test) config register.751 * Sets the BIST (built-in self-test) config register. 752 752 * 753 753 * @param pPciDev The PCI device. … … 760 760 761 761 /** 762 * Gets the BIST (built-in self-test) config register.762 * Gets the BIST (built-in self-test) config register. 763 763 * 764 764 * @param pPciDev The PCI device. -
trunk/src/VBox/Devices/Bus/DevPciIch9.cpp
r34299 r34301 506 506 return (irq_num + uSlot) & 7; 507 507 } 508 509 /* return the global irq number corresponding to a given device irq 510 pin. We could also use the bus number to have a more precise 511 mapping. This is the implementation note described in the PCI spec chapter 2.2.6 */ 512 DECLINLINE(int) ich9pciSlotGetPirq(uint8_t uBus, uint8_t uDevFn, int iIrqNum) 513 { 514 int iSlotAddend = (uDevFn >> 3) - 1; 515 return (iIrqNum + iSlotAddend) & 3; 516 } 517 518 /* irqs corresponding to PCI irqs A-D */ 519 static const uint8_t aPciIrqs[4] = { 11, 9, 11, 9 }; 508 520 509 521 /* Add one more level up request on APIC input line */ … … 1662 1674 } 1663 1675 } 1676 1677 /* map the interrupt */ 1678 uint32_t iPin = ich9pciConfigRead(pGlobals, uBus, uDevFn, VBOX_PCI_INTERRUPT_PIN, 1); 1679 if (iPin != 0) 1680 { 1681 uint8_t uBridgeDevFn = uDevFn; 1682 iPin--; 1683 1684 /* We need to go up to the host bus to see which irq this device will assert there. */ 1685 while (cBridgeDepth != 0) 1686 { 1687 /* Get the pin the device would assert on the bridge. */ 1688 iPin = ((uBridgeDevFn >> 3) + iPin) & 3; 1689 uBridgeDevFn = paBridgePositions[cBridgeDepth]; 1690 cBridgeDepth--; 1691 } 1692 1693 int iIrq = aPciIrqs[ich9pciSlotGetPirq(uBus, uDevFn, iPin)]; 1694 ich9pciConfigWrite(pGlobals, uBus, uDevFn, VBOX_PCI_INTERRUPT_LINE, iIrq, 1); 1695 } 1664 1696 } 1665 1697
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