- Timestamp:
- Dec 8, 2010 11:55:14 AM (14 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Audio/DevIchIntelHDA.cpp
r34827 r34828 664 664 #endif 665 665 return 0; 666 } 666 } 667 667 668 668 static int hdaProcessInterrupt(INTELHDLinkState* pState) … … 848 848 { 849 849 Log(("hda: reset of stream (%d) started\n", u8Strm)); 850 Assert(( pState 851 && pBdle 852 && pStreamDesc 850 Assert(( pState 851 && pBdle 852 && pStreamDesc 853 853 && u8Strm <= 7)); 854 854 memset(pBdle, 0, sizeof(HDABDLEDESC)); … … 1063 1063 bool fInRun = RT_BOOL((HDA_REG_IND(pState, index) & HDA_REG_FIELD_FLAG_MASK(SDCTL, RUN))); 1064 1064 bool fReset = RT_BOOL((u32Value & HDA_REG_FIELD_FLAG_MASK(SDCTL, SRST))); 1065 bool fInReset = RT_BOOL((HDA_REG_IND(pState, index) & HDA_REG_FIELD_FLAG_MASK(SDCTL, SRST))); 1065 bool fInReset = RT_BOOL((HDA_REG_IND(pState, index) & HDA_REG_FIELD_FLAG_MASK(SDCTL, SRST))); 1066 1066 int rc = VINF_SUCCESS; 1067 1067 if (fInReset) 1068 1068 { 1069 /* Assert!!! Guest is resetting HDA's stream, we're expecting guest will mark stream as exit 1070 * from reset 1069 /* Assert!!! Guest is resetting HDA's stream, we're expecting guest will mark stream as exit 1070 * from reset 1071 1071 */ 1072 1072 Assert((!fReset)); 1073 1073 Log(("hda: guest initiate exit of stream reset.\n")); 1074 1074 goto done; 1075 } 1075 } 1076 1076 else if (fReset) 1077 1077 { … … 1187 1187 case HDA_SDONFIFO_192B: 1188 1188 return hdaRegWriteU16(pState, offset, index, u32Value); 1189 1189 1190 1190 case HDA_SDONFIFO_256B: 1191 1191 Log(("hda: 256 bit is unsupported, HDA is switched into 192B mode\n")); 1192 1192 default: 1193 1193 return hdaRegWriteU16(pState, offset, index, HDA_SDONFIFO_192B); 1194 } 1194 } 1195 1195 return VINF_SUCCESS; 1196 1196 default: 1197 1197 AssertMsgFailed(("Something wierd happens with register lookup routine")); 1198 } 1198 } 1199 1199 return VINF_SUCCESS; 1200 1200 } … … 1364 1364 { 1365 1365 uint8_t bdle[16]; 1366 Assert(( pStreamDesc->u64BaseDMA 1367 && pBdle 1366 Assert(( pStreamDesc->u64BaseDMA 1367 && pBdle 1368 1368 && pBdle->u32BdleMaxCvi)); 1369 1369 PDMDevHlpPhysRead(ICH6_HDASTATE_2_DEVINS(pState), pStreamDesc->u64BaseDMA + pBdle->u32BdleCvi*16, bdle, 16); … … 1394 1394 Assert((pBdle->u32BdleCviLen >= pBdle->u32BdleCviPos)); /* sanity */ 1395 1395 cb2Copy = pBdle->u32BdleCviLen - pBdle->u32BdleCviPos; 1396 /* 1397 * we may increase the counter in range of [0, FIFOS + 1] 1396 /* 1397 * we may increase the counter in range of [0, FIFOS + 1] 1398 1398 */ 1399 cb2Copy = RT_MIN(cb2Copy, pStreamDesc->u32Fifos + 1); 1399 cb2Copy = RT_MIN(cb2Copy, pStreamDesc->u32Fifos + 1); 1400 1400 Assert((u32SoundBackendBufferBytesAvail > 0)); 1401 1401 1402 1402 /* sanity check to avoid overriding sound backend buffer */ 1403 cb2Copy = RT_MIN(cb2Copy, u32SoundBackendBufferBytesAvail); 1403 cb2Copy = RT_MIN(cb2Copy, u32SoundBackendBufferBytesAvail); 1404 1404 cb2Copy = RT_MIN(cb2Copy, u32CblLimit); 1405 1405 … … 1412 1412 static inline void hdaBackendWriteTransferReported(PHDABDLEDESC pBdle, uint32_t cbArranged2Copy, uint32_t cbCopied, uint32_t *pu32DMACursor, uint32_t *pu32BackendBufferCapacity) 1413 1413 { 1414 Log(("hda:hdaBackendWriteTransferReported: cbArranged2Copy: %d, cbCopied: %d, pu32DMACursor: %d, pu32BackendBufferCapacity:%d\n", 1414 Log(("hda:hdaBackendWriteTransferReported: cbArranged2Copy: %d, cbCopied: %d, pu32DMACursor: %d, pu32BackendBufferCapacity:%d\n", 1415 1415 cbArranged2Copy, cbCopied, pu32DMACursor ? *pu32DMACursor : 0, pu32BackendBufferCapacity ? *pu32BackendBufferCapacity : 0)); 1416 1416 Assert((cbCopied)); 1417 1417 Assert((pu32BackendBufferCapacity && *pu32BackendBufferCapacity)); 1418 /* Assertion!!! It was copied less than cbUnderFifoW 1418 /* Assertion!!! It was copied less than cbUnderFifoW 1419 1419 * Probably we need to move the buffer, but it rather hard to imagine situation 1420 1420 * why it may happen. … … 1424 1424 && pBdle->cbUnderFifoW <= cbCopied) 1425 1425 Log(("hda:hdaBackendWriteTransferReported: CVI resetting cbUnderFifoW:%d(pos:%d, len:%d)\n", pBdle->cbUnderFifoW, pBdle->u32BdleCviPos, pBdle->u32BdleCviLen)); 1426 1427 pBdle->cbUnderFifoW -= RT_MIN(pBdle->cbUnderFifoW, cbCopied); 1426 1427 pBdle->cbUnderFifoW -= RT_MIN(pBdle->cbUnderFifoW, cbCopied); 1428 1428 Assert((!pBdle->cbUnderFifoW)); /* Assert!!! Assumption failed */ 1429 1429 … … 1433 1433 Assert((pBdle->u32BdleCviLen >= pBdle->u32BdleCviPos && *pu32BackendBufferCapacity >= cbCopied)); /* sanity */ 1434 1434 /* We reports all bytes (including unreported previously) */ 1435 *pu32DMACursor += cbCopied; 1435 *pu32DMACursor += cbCopied; 1436 1436 /* reducing backend counter on amount of bytes we copied to backend */ 1437 1437 *pu32BackendBufferCapacity -= cbCopied; 1438 Log(("hda:hdaBackendWriteTransferReported: CVI(pos:%d, len:%d), pu32DMACursor: %d, pu32BackendBufferCapacity:%d\n", 1438 Log(("hda:hdaBackendWriteTransferReported: CVI(pos:%d, len:%d), pu32DMACursor: %d, pu32BackendBufferCapacity:%d\n", 1439 1439 pBdle->u32BdleCviPos, pBdle->u32BdleCviLen, *pu32DMACursor, *pu32BackendBufferCapacity)); 1440 1440 } … … 1448 1448 *pu32DMACursor += cbCopied + pBdle->cbUnderFifoW; 1449 1449 pBdle->cbUnderFifoW = 0; 1450 Log(("hda:hdaBackendReadTransferReported: CVI(pos:%d, len:%d), pu32DMACursor: %d, pu32BackendBufferCapacity:%d\n", 1450 Log(("hda:hdaBackendReadTransferReported: CVI(pos:%d, len:%d), pu32DMACursor: %d, pu32BackendBufferCapacity:%d\n", 1451 1451 pBdle->u32BdleCviPos, pBdle->u32BdleCviLen, pu32DMACursor ? *pu32DMACursor : 0, pu32BackendBufferCapacity ? *pu32BackendBufferCapacity : 0)); 1452 1452 } … … 1471 1471 *pStreamDesc->pu32Lpib -= pStreamDesc->u32Cbl; 1472 1472 hdaUpdatePosBuf(pState, pStreamDesc); 1473 1473 1474 1474 if (pBdle->u32BdleCviPos == pBdle->u32BdleCviLen) 1475 1475 { … … 1491 1491 { 1492 1492 *pStreamDesc->pu32Lpib += cbInc; 1493 1493 1494 1494 /* 1495 1495 * Assert. Overlapping of buffer counter shouldn't happen. 1496 1496 */ 1497 1497 Assert((*pStreamDesc->pu32Lpib <= pStreamDesc->u32Cbl)); 1498 1498 1499 1499 hdaUpdatePosBuf(pState, pStreamDesc); 1500 1500 1501 1501 } 1502 1502 } … … 1523 1523 hdaProcessInterrupt(pState); 1524 1524 } 1525 fDoNextTransferLoop = false; 1525 fDoNextTransferLoop = false; 1526 1526 } 1527 1527 return fDoNextTransferLoop; … … 1530 1530 /* 1531 1531 * hdaReadAudio - copies samples from Qemu Sound back-end to DMA. 1532 * Note: this function writes immediately to DMA buffer, but "reports bytes" when all conditions meet (FIFOW) 1532 * Note: this function writes immediately to DMA buffer, but "reports bytes" when all conditions meet (FIFOW) 1533 1533 */ 1534 1534 static uint32_t hdaReadAudio(INTELHDLinkState *pState, PHDASTREAMTRANSFERDESC pStreamDesc, uint32_t *pu32Avail, bool *fStop, uint32_t u32CblLimit) … … 1548 1548 goto done; 1549 1549 } 1550 1551 1550 1551 1552 1552 /* 1553 1553 * read from backend input line to last ureported position or at the begining. … … 1585 1585 1586 1586 cb2Copy = hdaCalculateTransferBufferLength(pBdle, pStreamDesc, *pu32Avail, u32CblLimit); 1587 1587 1588 1588 /* 1589 1589 * Copy from DMA to the corresponding hdaBuffer (if there exists some bytes from the previous not reported transfer we write to ''pBdle->cbUnderFifoW'' offset) … … 1594 1594 goto done; 1595 1595 } 1596 1596 1597 1597 PDMDevHlpPhysRead(ICH6_HDASTATE_2_DEVINS(pState), pBdle->u64BdleCviAddr + pBdle->u32BdleCviPos, pBdle->au8HdaBuffer + pBdle->cbUnderFifoW, cb2Copy); 1598 1598 /* … … 1628 1628 static inline void hdaInitTransferDescriptor(PINTELHDLinkState pState, PHDABDLEDESC pBdle, uint8_t u8Strm, PHDASTREAMTRANSFERDESC pStreamDesc) 1629 1629 { 1630 Assert(( pState 1631 && pBdle 1630 Assert(( pState 1631 && pBdle 1632 1632 && pStreamDesc 1633 && u8Strm <= 7)); 1633 && u8Strm <= 7)); 1634 1634 memset(pStreamDesc, 0, sizeof(HDASTREAMTRANSFERDESC)); 1635 1635 pStreamDesc->u8Strm = u8Strm; … … 1651 1651 } 1652 1652 #endif 1653 } 1653 } 1654 1654 1655 1655 DECLCALLBACK(void) hdaTransfer(CODECState *pCodecState, ENMSOUNDSOURCE src, int avail) … … 1709 1709 Assert(nBytes <= (stStreamDesc.u32Fifos + 1)); 1710 1710 *stStreamDesc.pu32Sts &= ~HDA_REG_FIELD_FLAG_MASK(SDSTS, FIFORDY); 1711 1711 1712 1712 /* Process end of buffer condition. */ 1713 1713 hdaStreamCounterUpdate(pState, pBdle, &stStreamDesc, nBytes); … … 1993 1993 hdaInitTransferDescriptor(&pThis->hda, pBdle, u8Strm, &stStreamDesc); 1994 1994 /* hdaStreamReset prevents changing SRST bit, so we zerro it here forcely. */ 1995 HDA_STREAM_REG2(&pThis->hda, CTL, u8Strm) = 0; 1995 HDA_STREAM_REG2(&pThis->hda, CTL, u8Strm) = 0; 1996 1996 hdaStreamReset(&pThis->hda, pBdle, &stStreamDesc, u8Strm); 1997 1997 }
Note:
See TracChangeset
for help on using the changeset viewer.