Changeset 34851 in vbox for trunk/src/VBox/Devices/Storage
- Timestamp:
- Dec 9, 2010 12:45:04 AM (14 years ago)
- svn:sync-xref-src-repo-rev:
- 68664
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Storage/DevAHCI.cpp
r34433 r34851 64 64 65 65 /** The current saved state version. */ 66 #define AHCI_SAVED_STATE_VERSION 466 #define AHCI_SAVED_STATE_VERSION 5 67 67 /** Saved state version before ATAPI support was added. */ 68 68 #define AHCI_SAVED_STATE_VERSION_PRE_ATAPI 3 … … 440 440 volatile uint32_t u32TasksNew; 441 441 442 /** Current command slot processed. 443 * Accessed by the guest by reading the CMD register. 444 * Holds the command slot of the command processed at the moment. */ 445 volatile uint32_t u32CurrentCommandSlot; 446 447 #if HC_ARCH_BITS == 64 448 uint32_t u32Alignment2; 449 #endif 450 442 451 /** Device specific settings (R3 only stuff). */ 443 452 /** Pointer to the attached driver's base interface. */ … … 480 489 R3PTRTYPE(volatile PAHCIPORTTASKSTATE) pTaskErr; 481 490 491 #if HC_ARCH_BITS == 32 492 uint32_t u32Alignment4; 493 #endif 494 482 495 /** Release statistics: number of DMA commands. */ 483 496 STAMCOUNTER StatDMA; … … 514 527 uint32_t cErrors; 515 528 516 uint32_t u32Alignment 4;529 uint32_t u32Alignment5; 517 530 } AHCIPort; 518 531 /** Pointer to the state of an AHCI port. */ … … 1232 1245 (pAhciPort->regCMD & AHCI_PORT_CMD_PMA) >> 17, (pAhciPort->regCMD & AHCI_PORT_CMD_CPS) >> 16, 1233 1246 (pAhciPort->regCMD & AHCI_PORT_CMD_CR) >> 15, (pAhciPort->regCMD & AHCI_PORT_CMD_FR) >> 14, 1234 (pAhciPort->regCMD & AHCI_PORT_CMD_ISS) >> 13, (pAhciPort->regCMD & AHCI_PORT_CMD_CCS) >> 8,1247 (pAhciPort->regCMD & AHCI_PORT_CMD_ISS) >> 13, pAhciPort->u32CurrentCommandSlot, 1235 1248 (pAhciPort->regCMD & AHCI_PORT_CMD_FRE) >> 4, (pAhciPort->regCMD & AHCI_PORT_CMD_CLO) >> 3, 1236 1249 (pAhciPort->regCMD & AHCI_PORT_CMD_POD) >> 2, (pAhciPort->regCMD & AHCI_PORT_CMD_SUD) >> 1, 1237 1250 (pAhciPort->regCMD & AHCI_PORT_CMD_ST))); 1238 *pu32Value = pAhciPort->regCMD ;1251 *pu32Value = pAhciPort->regCMD | AHCI_PORT_CMD_CCS_SHIFT(pAhciPort->u32CurrentCommandSlot); 1239 1252 return VINF_SUCCESS; 1240 1253 } … … 1282 1295 pAhciPort->regCI = 0; 1283 1296 /** Clear current command slot. */ 1284 u32Value &= ~(AHCI_PORT_CMD_CCS_SHIFT(0xff));1297 pAhciPort->u32CurrentCommandSlot = 0; 1285 1298 u32Value &= ~AHCI_PORT_CMD_CR; 1286 1299 } … … 1874 1887 pAhciPort->u32TasksFinished = 0; 1875 1888 pAhciPort->u32QueuedTasksFinished = 0; 1889 pAhciPort->u32CurrentCommandSlot = 0; 1876 1890 1877 1891 pAhciPort->cTasksActive = 0; … … 4561 4575 if (pAhciPort->regIE & AHCI_PORT_IE_TFEE) 4562 4576 fAssertIntr = true; 4577 /* 4578 * Don't mark the command slot as completed because the guest 4579 * needs it to identify the failed command. 4580 */ 4563 4581 } 4564 4565 if (fInterrupt) 4582 else if (fInterrupt) 4566 4583 { 4567 4584 ASMAtomicOrU32(&pAhciPort->regIS, AHCI_PORT_IS_DHRS); … … 4569 4586 if (pAhciPort->regIE & AHCI_PORT_IE_DHRE) 4570 4587 fAssertIntr = true; 4588 4589 /* Mark command as completed. */ 4590 ASMAtomicOrU32(&pAhciPort->u32TasksFinished, (1 << pAhciPortTaskState->uTag)); 4571 4591 } 4572 4573 ASMAtomicOrU32(&pAhciPort->u32TasksFinished, (1 << pAhciPortTaskState->uTag));4574 4592 4575 4593 if (fAssertIntr) … … 5795 5813 { 5796 5814 pAhciPortTaskState->uATARegError = ABRT_ERR; 5797 pAhciPortTaskState->uATARegStatus = ATA_STAT_READY | ATA_STAT_SEEK ;5815 pAhciPortTaskState->uATARegStatus = ATA_STAT_READY | ATA_STAT_SEEK | ATA_STAT_ERR; 5798 5816 } 5799 5817 break; … … 6177 6195 /* Set current command slot */ 6178 6196 pAhciPortTaskState->uTag = idx; 6179 pAhciPort->regCMD |= (AHCI_PORT_CMD_CCS_SHIFT(pAhciPortTaskState->uTag));6197 ASMAtomicWriteU32(&pAhciPort->u32CurrentCommandSlot, pAhciPortTaskState->uTag); 6180 6198 6181 6199 ahciPortTaskGetCommandFis(pAhciPort, pAhciPortTaskState); … … 6359 6377 6360 6378 /* Set current command slot */ 6361 pAhciPort->regCMD |= (AHCI_PORT_CMD_CCS_SHIFT(pAhciPortTaskState->uTag));6379 ASMAtomicWriteU32(&pAhciPort->u32CurrentCommandSlot, pAhciPortTaskState->uTag); 6362 6380 6363 6381 /* Mark the task as processed by the HBA if this is a queued task so that it doesn't occur in the CI register anymore. */ … … 6854 6872 SSMR3PutU8(pSSM, pThis->ahciPort[i].uATATransferMode); 6855 6873 SSMR3PutBool(pSSM, pThis->ahciPort[i].fResetDevice); 6856 6857 /* No need to save but to avoid changing the SSM format they are still written. */6858 SSMR3PutU8(pSSM, 0); /* Prev: Write position in the FIFO. */6859 SSMR3PutU8(pSSM, 0); /* Prev: Read position in the FIFO. */6860 6861 6874 SSMR3PutBool(pSSM, pThis->ahciPort[i].fPoweredOn); 6862 6875 SSMR3PutBool(pSSM, pThis->ahciPort[i].fSpunUp); 6863 6876 SSMR3PutU32(pSSM, pThis->ahciPort[i].u32TasksFinished); 6864 6877 SSMR3PutU32(pSSM, pThis->ahciPort[i].u32QueuedTasksFinished); 6878 SSMR3PutU32(pSSM, pThis->ahciPort[i].u32CurrentCommandSlot); 6865 6879 6866 6880 /* ATAPI saved state. */ … … 6991 7005 for (uint32_t i = 0; i < AHCI_MAX_NR_PORTS_IMPL; i++) 6992 7006 { 6993 uint8_t u8;6994 7007 PAHCIPort pAhciPort = &pThis->ahciPort[i]; 6995 7008 … … 7021 7034 SSMR3Skip(pSSM, AHCI_NR_COMMAND_SLOTS * sizeof(uint8_t)); /* no active data here */ 7022 7035 7023 SSMR3GetU8(pSSM, &u8); 7024 SSMR3GetU8(pSSM, &u8); 7036 if (uVersion <= AHCI_SAVED_STATE_VERSION) 7037 { 7038 /* The old positions in the FIFO, not required. */ 7039 SSMR3Skip(pSSM, 2*sizeof(uint8_t)); 7040 } 7025 7041 SSMR3GetBool(pSSM, &pThis->ahciPort[i].fPoweredOn); 7026 7042 SSMR3GetBool(pSSM, &pThis->ahciPort[i].fSpunUp); 7027 7043 SSMR3GetU32(pSSM, (uint32_t *)&pThis->ahciPort[i].u32TasksFinished); 7028 7044 SSMR3GetU32(pSSM, (uint32_t *)&pThis->ahciPort[i].u32QueuedTasksFinished); 7045 SSMR3GetU32(pSSM, (uint32_t *)&pThis->ahciPort[i].u32CurrentCommandSlot); 7029 7046 7030 7047 if (uVersion > AHCI_SAVED_STATE_VERSION_PRE_ATAPI)
Note:
See TracChangeset
for help on using the changeset viewer.