Changeset 34933 in vbox for trunk/src/VBox
- Timestamp:
- Dec 10, 2010 6:50:03 AM (14 years ago)
- Location:
- trunk/src/VBox/Devices/Audio
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Audio/DevCodec.cpp
r34591 r34933 30 30 #include "DevCodec.h" 31 31 32 #define CODEC_CAD_MASK 0xF0000000 33 #define CODEC_CAD_SHIFT 28 34 #define CODEC_DIRECT_MASK RT_BIT(27) 35 #define CODEC_NID_MASK 0x07F00000 36 #define CODEC_NID_SHIFT 20 37 #define CODEC_VERBDATA_MASK 0x000FFFFF 38 #define CODEC_VERB_4BIT_CMD 0x000FFFF0 39 #define CODEC_VERB_4BIT_DATA 0x0000000F 40 #define CODEC_VERB_8BIT_CMD 0x000FFF00 41 #define CODEC_VERB_8BIT_DATA 0x000000FF 42 #define CODEC_VERB_16BIT_CMD 0x000F0000 43 #define CODEC_VERB_16BIT_DATA 0x0000FFFF 44 45 #define CODEC_CAD(cmd) ((cmd) & CODEC_CAD_MASK) 46 #define CODEC_DIRECT(cmd) ((cmd) & CODEC_DIRECT_MASK) 47 #define CODEC_NID(cmd) ((((cmd) & CODEC_NID_MASK)) >> CODEC_NID_SHIFT) 48 #define CODEC_VERBDATA(cmd) ((cmd) & CODEC_VERBDATA_MASK) 49 #define CODEC_VERB_CMD(cmd, mask, x) (((cmd) & (mask)) >> (x)) 50 #define CODEC_VERB_CMD4(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_4BIT_CMD, 4)) 51 #define CODEC_VERB_CMD8(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_8BIT_CMD, 8)) 52 #define CODEC_VERB_CMD16(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_16BIT_CMD, 16)) 53 54 #define CODEC_VERB_GET_AMP_DIRECTION RT_BIT(15) 55 #define CODEC_VERB_GET_AMP_SIDE RT_BIT(13) 56 #define CODEC_VERB_GET_AMP_INDEX 0x7 57 58 /* HDA spec 7.3.3.7 NoteA */ 59 #define CODEC_GET_AMP_DIRECTION(cmd) (((cmd) & CODEC_VERB_GET_AMP_DIRECTION) >> 15) 60 #define CODEC_GET_AMP_SIDE(cmd) (((cmd) & CODEC_VERB_GET_AMP_SIDE) >> 13) 61 #define CODEC_GET_AMP_INDEX(cmd) (CODEC_GET_AMP_DIRECTION(cmd) ? 0 : ((cmd) & CODEC_VERB_GET_AMP_INDEX)) 62 63 /* HDA spec 7.3.3.7 NoteC */ 64 #define CODEC_VERB_SET_AMP_OUT_DIRECTION RT_BIT(15) 65 #define CODEC_VERB_SET_AMP_IN_DIRECTION RT_BIT(14) 66 #define CODEC_VERB_SET_AMP_LEFT_SIDE RT_BIT(13) 67 #define CODEC_VERB_SET_AMP_RIGHT_SIDE RT_BIT(12) 68 #define CODEC_VERB_SET_AMP_INDEX (0x7 << 8) 69 70 #define CODEC_SET_AMP_IS_OUT_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_OUT_DIRECTION) != 0) 71 #define CODEC_SET_AMP_IS_IN_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_IN_DIRECTION) != 0) 72 #define CODEC_SET_AMP_IS_LEFT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_LEFT_SIDE) != 0) 73 #define CODEC_SET_AMP_IS_RIGHT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_RIGHT_SIDE) != 0) 74 #define CODEC_SET_AMP_INDEX(cmd) (((cmd) & CODEC_VERB_SET_AMP_INDEX) >> 7) 75 76 /* HDA spec 7.3.3.1 defines layout of configuration registers/verbs (0xF00) */ 77 /* VendorID (7.3.4.1) */ 78 #define CODEC_MAKE_F00_00(vendorID, deviceID) (((vendorID) << 16) | (deviceID)) 79 /* RevisionID (7.3.4.2)*/ 80 #define CODEC_MAKE_F00_02(MajRev, MinRev, RevisionID, SteppingID) (((MajRev) << 20)|((MinRev) << 16)|((RevisionID) << 8)|(SteppingID)) 81 /* Subordinate node count (7.3.4.3)*/ 82 #define CODEC_MAKE_F00_04(startNodeNumber, totalNodeNumber) ((((startNodeNumber) & 0xFF) << 16)|((totalNodeNumber) & 0xFF)) 83 /* 84 * Function Group Type (7.3.4.4) 85 * 0 & [0x3-0x7f] are reserved types 86 * [0x80 - 0xff] are vendor defined function groups 87 */ 88 #define CODEC_MAKE_F00_05(UnSol, NodeType) ((UnSol)|(NodeType)) 89 #define CODEC_F00_05_UNSOL RT_BIT(8) 90 #define CODEC_F00_05_AFG (0x1) 91 #define CODEC_F00_05_MFG (0x2) 92 /* Audio Function Group capabilities (7.3.4.5) */ 93 #define CODEC_MAKE_F00_08(BeepGen, InputDelay, OutputDelay) ((BeepGen)| (((InputDelay) & 0xF) << 8) | ((OutputDelay) & 0xF)) 94 #define CODEC_F00_08_BEEP_GEN RT_BIT(16) 95 96 /* Widget Capabilities (7.3.4.6) */ 97 #define CODEC_MAKE_F00_09(type, delay, chanel_count) \ 98 ( (((type) & 0xF) << 20) \ 99 | (((delay) & 0xF) << 16) \ 100 | (((chanel_count) & 0xF) << 13)) 101 /* note: types 0x8-0xe are reserved */ 102 #define CODEC_F00_09_TYPE_AUDIO_OUTPUT (0x0) 103 #define CODEC_F00_09_TYPE_AUDIO_INPUT (0x1) 104 #define CODEC_F00_09_TYPE_AUDIO_MIXER (0x2) 105 #define CODEC_F00_09_TYPE_AUDIO_SELECTOR (0x3) 106 #define CODEC_F00_09_TYPE_PIN_COMPLEX (0x4) 107 #define CODEC_F00_09_TYPE_POWER_WIDGET (0x5) 108 #define CODEC_F00_09_TYPE_VOLUME_KNOB (0x6) 109 #define CODEC_F00_09_TYPE_BEEP_GEN (0x7) 110 #define CODEC_F00_09_TYPE_VENDOR_DEFINED (0xF) 111 112 #define CODEC_F00_09_CAP_CP RT_BIT(12) 113 #define CODEC_F00_09_CAP_L_R_SWAP RT_BIT(11) 114 #define CODEC_F00_09_CAP_POWER_CTRL RT_BIT(10) 115 #define CODEC_F00_09_CAP_DIGITAL RT_BIT(9) 116 #define CODEC_F00_09_CAP_CONNECTION_LIST RT_BIT(8) 117 #define CODEC_F00_09_CAP_UNSOL RT_BIT(7) 118 #define CODEC_F00_09_CAP_PROC_WIDGET RT_BIT(6) 119 #define CODEC_F00_09_CAP_STRIPE RT_BIT(5) 120 #define CODEC_F00_09_CAP_FMT_OVERRIDE RT_BIT(4) 121 #define CODEC_F00_09_CAP_AMP_FMT_OVERRIDE RT_BIT(3) 122 #define CODEC_F00_09_CAP_OUT_AMP_PRESENT RT_BIT(2) 123 #define CODEC_F00_09_CAP_IN_AMP_PRESENT RT_BIT(1) 124 #define CODEC_F00_09_CAP_LSB RT_BIT(0) 125 126 /* Supported PCM size, rates (7.3.4.7) */ 127 #define CODEC_F00_0A_32_BIT RT_BIT(19) 128 #define CODEC_F00_0A_24_BIT RT_BIT(18) 129 #define CODEC_F00_0A_16_BIT RT_BIT(17) 130 #define CODEC_F00_0A_8_BIT RT_BIT(16) 131 132 #define CODEC_F00_0A_48KHZ_MULT_8X RT_BIT(11) 133 #define CODEC_F00_0A_48KHZ_MULT_4X RT_BIT(10) 134 #define CODEC_F00_0A_44_1KHZ_MULT_4X RT_BIT(9) 135 #define CODEC_F00_0A_48KHZ_MULT_2X RT_BIT(8) 136 #define CODEC_F00_0A_44_1KHZ_MULT_2X RT_BIT(7) 137 #define CODEC_F00_0A_48KHZ RT_BIT(6) 138 #define CODEC_F00_0A_44_1KHZ RT_BIT(5) 139 /* 2/3 * 48kHz */ 140 #define CODEC_F00_0A_48KHZ_2_3X RT_BIT(4) 141 /* 1/2 * 44.1kHz */ 142 #define CODEC_F00_0A_44_1KHZ_1_2X RT_BIT(3) 143 /* 1/3 * 48kHz */ 144 #define CODEC_F00_0A_48KHZ_1_3X RT_BIT(2) 145 /* 1/4 * 44.1kHz */ 146 #define CODEC_F00_0A_44_1KHZ_1_4X RT_BIT(1) 147 /* 1/6 * 48kHz */ 148 #define CODEC_F00_0A_48KHZ_1_6X RT_BIT(0) 149 150 /* Supported streams formats (7.3.4.8) */ 151 #define CODEC_F00_0B_AC3 RT_BIT(2) 152 #define CODEC_F00_0B_FLOAT32 RT_BIT(1) 153 #define CODEC_F00_0B_PCM RT_BIT(0) 154 155 /* Pin Capabilities (7.3.4.9)*/ 156 #define CODEC_MAKE_F00_0C(vref_ctrl) (((vref_ctrl) & 0xFF) << 8) 157 #define CODEC_F00_0C_CAP_HBR RT_BIT(27) 158 #define CODEC_F00_0C_CAP_DP RT_BIT(24) 159 #define CODEC_F00_0C_CAP_EAPD RT_BIT(16) 160 #define CODEC_F00_0C_CAP_HDMI RT_BIT(7) 161 #define CODEC_F00_0C_CAP_BALANCED_IO RT_BIT(6) 162 #define CODEC_F00_0C_CAP_INPUT RT_BIT(5) 163 #define CODEC_F00_0C_CAP_OUTPUT RT_BIT(4) 164 #define CODEC_F00_0C_CAP_HP RT_BIT(3) 165 #define CODEC_F00_0C_CAP_PRESENSE_DETECT RT_BIT(2) 166 #define CODEC_F00_0C_CAP_TRIGGER_REQUIRED RT_BIT(1) 167 #define CODEC_F00_0C_CAP_IMPENDANCE_SENSE RT_BIT(0) 168 169 /* Amplifier capabilities (7.3.4.10) */ 170 #define CODEC_MAKE_F00_0D(mute_cap, step_size, num_steps, offset) \ 171 ( (((mute_cap) & 0x1) << 31) \ 172 | (((step_size) & 0xFF) << 16) \ 173 | (((num_steps) & 0xFF) << 8) \ 174 | ((offset) & 0xFF)) 175 176 /* Connection list lenght (7.3.4.11) */ 177 #define CODEC_MAKE_F00_0E(long_form, length) \ 178 ( (((long_form) & 0x1) << 7) \ 179 | ((length) & 0x7F)) 180 /* Supported Power States (7.3.4.12) */ 181 #define CODEC_F00_0F_EPSS RT_BIT(31) 182 #define CODEC_F00_0F_CLKSTOP RT_BIT(30) 183 #define CODEC_F00_0F_S3D3 RT_BIT(29) 184 #define CODEC_F00_0F_D3COLD RT_BIT(4) 185 #define CODEC_F00_0F_D3 RT_BIT(3) 186 #define CODEC_F00_0F_D2 RT_BIT(2) 187 #define CODEC_F00_0F_D1 RT_BIT(1) 188 #define CODEC_F00_0F_D0 RT_BIT(0) 189 190 /* CP/IO Count (7.3.4.14) */ 191 #define CODEC_MAKE_F00_11(wake, unsol, numgpi, numgpo, numgpio) \ 192 ( (((wake) & 0x1) << 31) \ 193 | (((unsol) & 0x1) << 30) \ 194 | (((numgpi) & 0xFF) << 16) \ 195 | (((numgpo) & 0xFF) << 8) \ 196 | ((numgpio) & 0xFF)) 197 198 /* Power States (7.3.3.10) */ 199 #define CODEC_MAKE_F05(reset, stopok, error, act, set) \ 200 ( (((reset) & 0x1) << 10) \ 201 | (((stopok) & 0x1) << 9) \ 202 | (((error) & 0x1) << 8) \ 203 | (((act) & 0x7) << 4) \ 204 | ((set) & 0x7)) 205 #define CODEC_F05_D3COLD (4) 206 #define CODEC_F05_D3 (3) 207 #define CODEC_F05_D2 (2) 208 #define CODEC_F05_D1 (1) 209 #define CODEC_F05_D0 (0) 210 211 #define CODEC_F05_IS_RESET(value) (((value) & RT_BIT(10)) != 0) 212 #define CODEC_F05_IS_STOPOK(value) (((value) & RT_BIT(9)) != 0) 213 #define CODEC_F05_IS_ERROR(value) (((value) & RT_BIT(8)) != 0) 214 #define CODEC_F05_ACT(value) (((value) & 0x7) >> 4) 215 #define CODEC_F05_SET(value) (((value) & 0x7)) 216 217 /* Pin Widged Control (7.3.3.13) */ 218 #define CODEC_F07_VREF_HIZ (0) 219 #define CODEC_F07_VREF_50 (0x1) 220 #define CODEC_F07_VREF_GROUND (0x2) 221 #define CODEC_F07_VREF_80 (0x4) 222 #define CODEC_F07_VREF_100 (0x5) 223 #define CODEC_F07_IN_ENABLE RT_BIT(5) 224 #define CODEC_F07_OUT_ENABLE RT_BIT(6) 225 #define CODEC_F07_OUT_H_ENABLE RT_BIT(7) 226 227 /* Converter formats (7.3.3.8) and (3.7.1) */ 228 #define CODEC_MAKE_A(fNonPCM, f44_1BaseRate, mult, div, bits, chan) \ 229 ( (((fNonPCM) & 0x1) << 15) \ 230 | (((f44_1BaseRate) & 0x1) << 14) \ 231 | (((mult) & 0x7) << 11) \ 232 | (((div) & 0x7) << 8) \ 233 | (((bits) & 0x7) << 4) \ 234 | ((chan) & 0xF)) 235 236 #define CODEC_A_MULT_1X (0) 237 #define CODEC_A_MULT_2X (1) 238 #define CODEC_A_MULT_3X (2) 239 #define CODEC_A_MULT_4X (3) 240 241 #define CODEC_A_DIV_1X (0) 242 #define CODEC_A_DIV_2X (1) 243 #define CODEC_A_DIV_3X (2) 244 #define CODEC_A_DIV_4X (3) 245 #define CODEC_A_DIV_5X (4) 246 #define CODEC_A_DIV_6X (5) 247 #define CODEC_A_DIV_7X (6) 248 #define CODEC_A_DIV_8X (7) 249 250 #define CODEC_A_8_BIT (0) 251 #define CODEC_A_16_BIT (1) 252 #define CODEC_A_20_BIT (2) 253 #define CODEC_A_24_BIT (3) 254 #define CODEC_A_32_BIT (4) 255 256 /* Pin Sense (7.3.3.15) */ 257 #define CODEC_MAKE_F09_ANALOG(fPresent, impedance) \ 258 ( (((fPresent) & 0x1) << 31) \ 259 | (((impedance) & 0x7FFFFFFF))) 260 #define CODEC_F09_ANALOG_NA 0x7FFFFFFF 261 #define CODEC_MAKE_F09_DIGITAL(fPresent, fELDValid) \ 262 ( (((fPresent) & 0x1) << 31) \ 263 | (((fELDValid) & 0x1) << 30)) 264 265 /* HDA spec 7.3.3.31 defines layout of configuration registers/verbs (0xF1C) */ 266 /* Configuration's port connection */ 267 #define CODEC_F1C_PORT_MASK (0x3) 268 #define CODEC_F1C_PORT_SHIFT (30) 269 270 #define CODEC_F1C_PORT_COMPLEX (0x0) 271 #define CODEC_F1C_PORT_NO_PHYS (0x1) 272 #define CODEC_F1C_PORT_FIXED (0x2) 273 #define CODEC_F1C_BOTH (0x3) 274 275 /* Configuration's location */ 276 #define CODEC_F1C_LOCATION_MASK (0x3F) 277 #define CODEC_F1C_LOCATION_SHIFT (24) 278 /* [4:5] bits of location region means chassis attachment */ 279 #define CODEC_F1C_LOCATION_PRIMARY_CHASSIS (0) 280 #define CODEC_F1C_LOCATION_INTERNAL RT_BIT(4) 281 #define CODEC_F1C_LOCATION_SECONDRARY_CHASSIS RT_BIT(5) 282 #define CODEC_F1C_LOCATION_OTHER (RT_BIT(5)) 283 284 /* [0:3] bits of location region means geometry location attachment */ 285 #define CODEC_F1C_LOCATION_NA (0) 286 #define CODEC_F1C_LOCATION_REAR (0x1) 287 #define CODEC_F1C_LOCATION_FRONT (0x2) 288 #define CODEC_F1C_LOCATION_LEFT (0x3) 289 #define CODEC_F1C_LOCATION_RIGTH (0x4) 290 #define CODEC_F1C_LOCATION_TOP (0x5) 291 #define CODEC_F1C_LOCATION_BOTTOM (0x6) 292 #define CODEC_F1C_LOCATION_SPECIAL_0 (0x7) 293 #define CODEC_F1C_LOCATION_SPECIAL_1 (0x8) 294 #define CODEC_F1C_LOCATION_SPECIAL_3 (0x9) 295 296 /* Configuration's devices */ 297 #define CODEC_F1C_DEVICE_MASK (0xF) 298 #define CODEC_F1C_DEVICE_SHIFT (20) 299 #define CODEC_F1C_DEVICE_LINE_OUT (0) 300 #define CODEC_F1C_DEVICE_SPEAKER (0x1) 301 #define CODEC_F1C_DEVICE_HP (0x2) 302 #define CODEC_F1C_DEVICE_CD (0x3) 303 #define CODEC_F1C_DEVICE_SPDIF_OUT (0x4) 304 #define CODEC_F1C_DEVICE_DIGITAL_OTHER_OUT (0x5) 305 #define CODEC_F1C_DEVICE_MODEM_LINE_SIDE (0x6) 306 #define CODEC_F1C_DEVICE_MODEM_HANDSET_SIDE (0x7) 307 #define CODEC_F1C_DEVICE_LINE_IN (0x8) 308 #define CODEC_F1C_DEVICE_AUX (0x9) 309 #define CODEC_F1C_DEVICE_MIC (0xA) 310 #define CODEC_F1C_DEVICE_PHONE (0xB) 311 #define CODEC_F1C_DEVICE_SPDIF_IN (0xC) 312 #define CODEC_F1C_DEVICE_RESERVED (0xE) 313 #define CODEC_F1C_DEVICE_OTHER (0xF) 314 315 /* Configuration's Connection type */ 316 #define CODEC_F1C_CONNECTION_TYPE_MASK (0xF) 317 #define CODEC_F1C_CONNECTION_TYPE_SHIFT (16) 318 319 #define CODEC_F1C_CONNECTION_TYPE_UNKNOWN (0) 320 #define CODEC_F1C_CONNECTION_TYPE_1_8INCHES (0x1) 321 #define CODEC_F1C_CONNECTION_TYPE_1_4INCHES (0x2) 322 #define CODEC_F1C_CONNECTION_TYPE_ATAPI (0x3) 323 #define CODEC_F1C_CONNECTION_TYPE_RCA (0x4) 324 #define CODEC_F1C_CONNECTION_TYPE_OPTICAL (0x5) 325 #define CODEC_F1C_CONNECTION_TYPE_OTHER_DIGITAL (0x6) 326 #define CODEC_F1C_CONNECTION_TYPE_ANALOG (0x7) 327 #define CODEC_F1C_CONNECTION_TYPE_DIN (0x8) 328 #define CODEC_F1C_CONNECTION_TYPE_XLR (0x9) 329 #define CODEC_F1C_CONNECTION_TYPE_RJ_11 (0xA) 330 #define CODEC_F1C_CONNECTION_TYPE_COMBO (0xB) 331 #define CODEC_F1C_CONNECTION_TYPE_OTHER (0xF) 332 333 /* Configuration's color */ 334 #define CODEC_F1C_COLOR_MASK (0xF) 335 #define CODEC_F1C_COLOR_SHIFT (12) 336 #define CODEC_F1C_COLOR_UNKNOWN (0) 337 #define CODEC_F1C_COLOR_BLACK (0x1) 338 #define CODEC_F1C_COLOR_GREY (0x2) 339 #define CODEC_F1C_COLOR_BLUE (0x3) 340 #define CODEC_F1C_COLOR_GREEN (0x4) 341 #define CODEC_F1C_COLOR_RED (0x5) 342 #define CODEC_F1C_COLOR_ORANGE (0x6) 343 #define CODEC_F1C_COLOR_YELLOW (0x7) 344 #define CODEC_F1C_COLOR_PURPLE (0x8) 345 #define CODEC_F1C_COLOR_PINK (0x9) 346 #define CODEC_F1C_COLOR_RESERVED_0 (0xA) 347 #define CODEC_F1C_COLOR_RESERVED_1 (0xB) 348 #define CODEC_F1C_COLOR_RESERVED_2 (0xC) 349 #define CODEC_F1C_COLOR_RESERVED_3 (0xD) 350 #define CODEC_F1C_COLOR_WHITE (0xE) 351 #define CODEC_F1C_COLOR_OTHER (0xF) 352 353 /* Configuration's misc */ 354 #define CODEC_F1C_MISC_MASK (0xF) 355 #define CODEC_F1C_MISC_SHIFT (8) 356 #define CODEC_F1C_MISC_JACK_DETECT RT_BIT(0) 357 #define CODEC_F1C_MISC_RESERVED_0 RT_BIT(1) 358 #define CODEC_F1C_MISC_RESERVED_1 RT_BIT(2) 359 #define CODEC_F1C_MISC_RESERVED_2 RT_BIT(3) 360 361 /* Configuration's association */ 362 #define CODEC_F1C_ASSOCIATION_MASK (0xF) 363 #define CODEC_F1C_ASSOCIATION_SHIFT (4) 364 /* Connection's sequence */ 365 #define CODEC_F1C_SEQ_MASK (0xF) 366 #define CODEC_F1C_SEQ_SHIFT (0) 367 368 /* Implementation identification (7.3.3.30) */ 369 #define CODEC_MAKE_F20(bmid, bsku, aid) \ 370 ( (((bmid) & 0xFFFF) << 16) \ 371 | (((bsku) & 0xFF) << 8) \ 372 | (((aid) & 0xFF)) \ 373 ) 374 375 /* macro definition helping in filling the configuration registers. */ 376 #define CODEC_MAKE_F1C(port_connectivity, location, device, connection_type, color, misc, association, sequence) \ 377 ( ((port_connectivity) << CODEC_F1C_PORT_SHIFT) \ 378 | ((location) << CODEC_F1C_LOCATION_SHIFT) \ 379 | ((device) << CODEC_F1C_DEVICE_SHIFT) \ 380 | ((connection_type) << CODEC_F1C_CONNECTION_TYPE_SHIFT) \ 381 | ((color) << CODEC_F1C_COLOR_SHIFT) \ 382 | ((misc) << CODEC_F1C_MISC_SHIFT) \ 383 | ((association) << CODEC_F1C_ASSOCIATION_SHIFT) \ 384 | ((sequence))) 32 #define CODECNODE_F0_PARAM_LENGTH 0x14 33 #define CODECNODE_F02_PARAM_LENGTH 16 34 typedef struct CODECCOMMONNODE 35 { 36 uint8_t id; /* 7 - bit format */ 37 const char *name; 38 /* RPM 5.3.6 */ 39 uint32_t au32F00_param[CODECNODE_F0_PARAM_LENGTH]; 40 uint32_t au32F02_param[CODECNODE_F02_PARAM_LENGTH]; 41 } CODECCOMMONNODE, *PCODECCOMMONNODE; 42 43 typedef struct ROOTCODECNODE 44 { 45 CODECCOMMONNODE node; 46 }ROOTCODECNODE, *PROOTCODECNODE; 47 48 #define AMPLIFIER_SIZE 60 49 typedef uint32_t AMPLIFIER[AMPLIFIER_SIZE]; 50 #define AMPLIFIER_IN 0 51 #define AMPLIFIER_OUT 1 52 #define AMPLIFIER_LEFT 1 53 #define AMPLIFIER_RIGHT 0 54 #define AMPLIFIER_REGISTER(amp, inout, side, index) ((amp)[30*(inout) + 15*(side) + (index)]) 55 typedef struct DACNODE 56 { 57 CODECCOMMONNODE node; 58 uint32_t u32F0d_param; 59 uint32_t u32F04_param; 60 uint32_t u32F05_param; 61 uint32_t u32F06_param; 62 uint32_t u32F0c_param; 63 64 uint32_t u32A_param; 65 AMPLIFIER B_params; 66 67 } DACNODE, *PDACNODE; 68 69 typedef struct ADCNODE 70 { 71 CODECCOMMONNODE node; 72 uint32_t u32F03_param; 73 uint32_t u32F05_param; 74 uint32_t u32F06_param; 75 uint32_t u32F09_param; 76 77 uint32_t u32A_param; 78 uint32_t u32F01_param; 79 AMPLIFIER B_params; 80 } ADCNODE, *PADCNODE; 81 82 typedef struct SPDIFOUTNODE 83 { 84 CODECCOMMONNODE node; 85 uint32_t u32F05_param; 86 uint32_t u32F06_param; 87 uint32_t u32F09_param; 88 uint32_t u32F0d_param; 89 90 uint32_t u32A_param; 91 AMPLIFIER B_params; 92 } SPDIFOUTNODE, *PSPDIFOUTNODE; 93 94 typedef struct SPDIFINNODE 95 { 96 CODECCOMMONNODE node; 97 uint32_t u32F05_param; 98 uint32_t u32F06_param; 99 uint32_t u32F09_param; 100 uint32_t u32F0d_param; 101 102 uint32_t u32A_param; 103 AMPLIFIER B_params; 104 } SPDIFINNODE, *PSPDIFINNODE; 105 106 typedef struct AFGCODECNODE 107 { 108 CODECCOMMONNODE node; 109 uint32_t u32F05_param; 110 uint32_t u32F08_param; 111 uint32_t u32F20_param; 112 uint32_t u32F17_param; 113 } AFGCODECNODE, *PAFGCODECNODE; 114 115 typedef struct PORTNODE 116 { 117 CODECCOMMONNODE node; 118 uint32_t u32F07_param; 119 uint32_t u32F08_param; 120 uint32_t u32F09_param; 121 uint32_t u32F01_param; 122 uint32_t u32F1c_param; 123 AMPLIFIER B_params; 124 } PORTNODE, *PPORTNODE; 125 126 typedef struct DIGOUTNODE 127 { 128 CODECCOMMONNODE node; 129 uint32_t u32F01_param; 130 uint32_t u32F08_param; 131 uint32_t u32F07_param; 132 uint32_t u32F09_param; 133 uint32_t u32F1c_param; 134 } DIGOUTNODE, *PDIGOUTNODE; 135 136 typedef struct DIGINNODE 137 { 138 CODECCOMMONNODE node; 139 uint32_t u32F05_param; 140 uint32_t u32F07_param; 141 uint32_t u32F08_param; 142 uint32_t u32F09_param; 143 uint32_t u32F0c_param; 144 uint32_t u32F1c_param; 145 uint32_t u32F1e_param; 146 } DIGINNODE, *PDIGINNODE; 147 148 typedef struct ADCMUXNODE 149 { 150 CODECCOMMONNODE node; 151 uint32_t u32F01_param; 152 153 uint32_t u32A_param; 154 AMPLIFIER B_params; 155 } ADCMUXNODE, *PADCMUXNODE; 156 157 typedef struct PCBEEPNODE 158 { 159 CODECCOMMONNODE node; 160 uint32_t u32F07_param; 161 uint32_t u32F0a_param; 162 163 uint32_t u32A_param; 164 AMPLIFIER B_params; 165 uint32_t u32F1c_param; 166 } PCBEEPNODE, *PPCBEEPNODE; 167 168 typedef struct CDNODE 169 { 170 CODECCOMMONNODE node; 171 uint32_t u32F07_param; 172 uint32_t u32F1c_param; 173 } CDNODE, *PCDNODE; 174 175 typedef struct VOLUMEKNOBNODE 176 { 177 CODECCOMMONNODE node; 178 uint32_t u32F08_param; 179 uint32_t u32F0f_param; 180 } VOLUMEKNOBNODE, *PVOLUMEKNOBNODE; 181 182 typedef struct ADCVOLNODE 183 { 184 CODECCOMMONNODE node; 185 uint32_t u32F0c_param; 186 uint32_t u32F01_param; 187 uint32_t u32A_params; 188 AMPLIFIER B_params; 189 } ADCVOLNODE, *PADCVOLNODE; 190 191 typedef struct RESNODE 192 { 193 CODECCOMMONNODE node; 194 uint32_t u32F05_param; 195 uint32_t u32F06_param; 196 uint32_t u32F07_param; 197 uint32_t u32F1c_param; 198 } RESNODE, *PRESNODE; 199 200 typedef union CODECNODE 201 { 202 CODECCOMMONNODE node; 203 ROOTCODECNODE root; 204 AFGCODECNODE afg; 205 DACNODE dac; 206 ADCNODE adc; 207 SPDIFOUTNODE spdifout; 208 SPDIFINNODE spdifin; 209 PORTNODE port; 210 DIGOUTNODE digout; 211 DIGINNODE digin; 212 ADCMUXNODE adcmux; 213 PCBEEPNODE pcbeep; 214 CDNODE cdnode; 215 VOLUMEKNOBNODE volumeKnob; 216 ADCVOLNODE adcvol; 217 RESNODE reserved; 218 } CODECNODE, *PCODECNODE; 385 219 386 220 /* STAC9220 */ -
trunk/src/VBox/Devices/Audio/DevCodec.h
r33810 r34933 27 27 #define CODEC_RESPONSE_UNSOLICITED RT_BIT_64(34) 28 28 29 #define CODEC_CAD_MASK 0xF0000000 30 #define CODEC_CAD_SHIFT 28 31 #define CODEC_DIRECT_MASK RT_BIT(27) 32 #define CODEC_NID_MASK 0x07F00000 33 #define CODEC_NID_SHIFT 20 34 #define CODEC_VERBDATA_MASK 0x000FFFFF 35 #define CODEC_VERB_4BIT_CMD 0x000FFFF0 36 #define CODEC_VERB_4BIT_DATA 0x0000000F 37 #define CODEC_VERB_8BIT_CMD 0x000FFF00 38 #define CODEC_VERB_8BIT_DATA 0x000000FF 39 #define CODEC_VERB_16BIT_CMD 0x000F0000 40 #define CODEC_VERB_16BIT_DATA 0x0000FFFF 41 42 #define CODEC_CAD(cmd) ((cmd) & CODEC_CAD_MASK) 43 #define CODEC_DIRECT(cmd) ((cmd) & CODEC_DIRECT_MASK) 44 #define CODEC_NID(cmd) ((((cmd) & CODEC_NID_MASK)) >> CODEC_NID_SHIFT) 45 #define CODEC_VERBDATA(cmd) ((cmd) & CODEC_VERBDATA_MASK) 46 #define CODEC_VERB_CMD(cmd, mask, x) (((cmd) & (mask)) >> (x)) 47 #define CODEC_VERB_CMD4(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_4BIT_CMD, 4)) 48 #define CODEC_VERB_CMD8(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_8BIT_CMD, 8)) 49 #define CODEC_VERB_CMD16(cmd) (CODEC_VERB_CMD((cmd), CODEC_VERB_16BIT_CMD, 16)) 50 51 #define CODEC_VERB_GET_AMP_DIRECTION RT_BIT(15) 52 #define CODEC_VERB_GET_AMP_SIDE RT_BIT(13) 53 #define CODEC_VERB_GET_AMP_INDEX 0x7 54 55 /* HDA spec 7.3.3.7 NoteA */ 56 #define CODEC_GET_AMP_DIRECTION(cmd) (((cmd) & CODEC_VERB_GET_AMP_DIRECTION) >> 15) 57 #define CODEC_GET_AMP_SIDE(cmd) (((cmd) & CODEC_VERB_GET_AMP_SIDE) >> 13) 58 #define CODEC_GET_AMP_INDEX(cmd) (CODEC_GET_AMP_DIRECTION(cmd) ? 0 : ((cmd) & CODEC_VERB_GET_AMP_INDEX)) 59 60 /* HDA spec 7.3.3.7 NoteC */ 61 #define CODEC_VERB_SET_AMP_OUT_DIRECTION RT_BIT(15) 62 #define CODEC_VERB_SET_AMP_IN_DIRECTION RT_BIT(14) 63 #define CODEC_VERB_SET_AMP_LEFT_SIDE RT_BIT(13) 64 #define CODEC_VERB_SET_AMP_RIGHT_SIDE RT_BIT(12) 65 #define CODEC_VERB_SET_AMP_INDEX (0x7 << 8) 66 67 #define CODEC_SET_AMP_IS_OUT_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_OUT_DIRECTION) != 0) 68 #define CODEC_SET_AMP_IS_IN_DIRECTION(cmd) (((cmd) & CODEC_VERB_SET_AMP_IN_DIRECTION) != 0) 69 #define CODEC_SET_AMP_IS_LEFT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_LEFT_SIDE) != 0) 70 #define CODEC_SET_AMP_IS_RIGHT_SIDE(cmd) (((cmd) & CODEC_VERB_SET_AMP_RIGHT_SIDE) != 0) 71 #define CODEC_SET_AMP_INDEX(cmd) (((cmd) & CODEC_VERB_SET_AMP_INDEX) >> 7) 72 73 /* HDA spec 7.3.3.1 defines layout of configuration registers/verbs (0xF00) */ 74 /* VendorID (7.3.4.1) */ 75 #define CODEC_MAKE_F00_00(vendorID, deviceID) (((vendorID) << 16) | (deviceID)) 76 /* RevisionID (7.3.4.2)*/ 77 #define CODEC_MAKE_F00_02(MajRev, MinRev, RevisionID, SteppingID) (((MajRev) << 20)|((MinRev) << 16)|((RevisionID) << 8)|(SteppingID)) 78 /* Subordinate node count (7.3.4.3)*/ 79 #define CODEC_MAKE_F00_04(startNodeNumber, totalNodeNumber) ((((startNodeNumber) & 0xFF) << 16)|((totalNodeNumber) & 0xFF)) 80 /* 81 * Function Group Type (7.3.4.4) 82 * 0 & [0x3-0x7f] are reserved types 83 * [0x80 - 0xff] are vendor defined function groups 84 */ 85 #define CODEC_MAKE_F00_05(UnSol, NodeType) ((UnSol)|(NodeType)) 86 #define CODEC_F00_05_UNSOL RT_BIT(8) 87 #define CODEC_F00_05_AFG (0x1) 88 #define CODEC_F00_05_MFG (0x2) 89 /* Audio Function Group capabilities (7.3.4.5) */ 90 #define CODEC_MAKE_F00_08(BeepGen, InputDelay, OutputDelay) ((BeepGen)| (((InputDelay) & 0xF) << 8) | ((OutputDelay) & 0xF)) 91 #define CODEC_F00_08_BEEP_GEN RT_BIT(16) 92 93 /* Widget Capabilities (7.3.4.6) */ 94 #define CODEC_MAKE_F00_09(type, delay, chanel_count) \ 95 ( (((type) & 0xF) << 20) \ 96 | (((delay) & 0xF) << 16) \ 97 | (((chanel_count) & 0xF) << 13)) 98 /* note: types 0x8-0xe are reserved */ 99 #define CODEC_F00_09_TYPE_AUDIO_OUTPUT (0x0) 100 #define CODEC_F00_09_TYPE_AUDIO_INPUT (0x1) 101 #define CODEC_F00_09_TYPE_AUDIO_MIXER (0x2) 102 #define CODEC_F00_09_TYPE_AUDIO_SELECTOR (0x3) 103 #define CODEC_F00_09_TYPE_PIN_COMPLEX (0x4) 104 #define CODEC_F00_09_TYPE_POWER_WIDGET (0x5) 105 #define CODEC_F00_09_TYPE_VOLUME_KNOB (0x6) 106 #define CODEC_F00_09_TYPE_BEEP_GEN (0x7) 107 #define CODEC_F00_09_TYPE_VENDOR_DEFINED (0xF) 108 109 #define CODEC_F00_09_CAP_CP RT_BIT(12) 110 #define CODEC_F00_09_CAP_L_R_SWAP RT_BIT(11) 111 #define CODEC_F00_09_CAP_POWER_CTRL RT_BIT(10) 112 #define CODEC_F00_09_CAP_DIGITAL RT_BIT(9) 113 #define CODEC_F00_09_CAP_CONNECTION_LIST RT_BIT(8) 114 #define CODEC_F00_09_CAP_UNSOL RT_BIT(7) 115 #define CODEC_F00_09_CAP_PROC_WIDGET RT_BIT(6) 116 #define CODEC_F00_09_CAP_STRIPE RT_BIT(5) 117 #define CODEC_F00_09_CAP_FMT_OVERRIDE RT_BIT(4) 118 #define CODEC_F00_09_CAP_AMP_FMT_OVERRIDE RT_BIT(3) 119 #define CODEC_F00_09_CAP_OUT_AMP_PRESENT RT_BIT(2) 120 #define CODEC_F00_09_CAP_IN_AMP_PRESENT RT_BIT(1) 121 #define CODEC_F00_09_CAP_LSB RT_BIT(0) 122 123 /* Supported PCM size, rates (7.3.4.7) */ 124 #define CODEC_F00_0A_32_BIT RT_BIT(19) 125 #define CODEC_F00_0A_24_BIT RT_BIT(18) 126 #define CODEC_F00_0A_16_BIT RT_BIT(17) 127 #define CODEC_F00_0A_8_BIT RT_BIT(16) 128 129 #define CODEC_F00_0A_48KHZ_MULT_8X RT_BIT(11) 130 #define CODEC_F00_0A_48KHZ_MULT_4X RT_BIT(10) 131 #define CODEC_F00_0A_44_1KHZ_MULT_4X RT_BIT(9) 132 #define CODEC_F00_0A_48KHZ_MULT_2X RT_BIT(8) 133 #define CODEC_F00_0A_44_1KHZ_MULT_2X RT_BIT(7) 134 #define CODEC_F00_0A_48KHZ RT_BIT(6) 135 #define CODEC_F00_0A_44_1KHZ RT_BIT(5) 136 /* 2/3 * 48kHz */ 137 #define CODEC_F00_0A_48KHZ_2_3X RT_BIT(4) 138 /* 1/2 * 44.1kHz */ 139 #define CODEC_F00_0A_44_1KHZ_1_2X RT_BIT(3) 140 /* 1/3 * 48kHz */ 141 #define CODEC_F00_0A_48KHZ_1_3X RT_BIT(2) 142 /* 1/4 * 44.1kHz */ 143 #define CODEC_F00_0A_44_1KHZ_1_4X RT_BIT(1) 144 /* 1/6 * 48kHz */ 145 #define CODEC_F00_0A_48KHZ_1_6X RT_BIT(0) 146 147 /* Supported streams formats (7.3.4.8) */ 148 #define CODEC_F00_0B_AC3 RT_BIT(2) 149 #define CODEC_F00_0B_FLOAT32 RT_BIT(1) 150 #define CODEC_F00_0B_PCM RT_BIT(0) 151 152 /* Pin Capabilities (7.3.4.9)*/ 153 #define CODEC_MAKE_F00_0C(vref_ctrl) (((vref_ctrl) & 0xFF) << 8) 154 #define CODEC_F00_0C_CAP_HBR RT_BIT(27) 155 #define CODEC_F00_0C_CAP_DP RT_BIT(24) 156 #define CODEC_F00_0C_CAP_EAPD RT_BIT(16) 157 #define CODEC_F00_0C_CAP_HDMI RT_BIT(7) 158 #define CODEC_F00_0C_CAP_BALANCED_IO RT_BIT(6) 159 #define CODEC_F00_0C_CAP_INPUT RT_BIT(5) 160 #define CODEC_F00_0C_CAP_OUTPUT RT_BIT(4) 161 #define CODEC_F00_0C_CAP_HP RT_BIT(3) 162 #define CODEC_F00_0C_CAP_PRESENSE_DETECT RT_BIT(2) 163 #define CODEC_F00_0C_CAP_TRIGGER_REQUIRED RT_BIT(1) 164 #define CODEC_F00_0C_CAP_IMPENDANCE_SENSE RT_BIT(0) 165 166 /* Amplifier capabilities (7.3.4.10) */ 167 #define CODEC_MAKE_F00_0D(mute_cap, step_size, num_steps, offset) \ 168 ( (((mute_cap) & 0x1) << 31) \ 169 | (((step_size) & 0xFF) << 16) \ 170 | (((num_steps) & 0xFF) << 8) \ 171 | ((offset) & 0xFF)) 172 173 /* Connection list lenght (7.3.4.11) */ 174 #define CODEC_MAKE_F00_0E(long_form, length) \ 175 ( (((long_form) & 0x1) << 7) \ 176 | ((length) & 0x7F)) 177 /* Supported Power States (7.3.4.12) */ 178 #define CODEC_F00_0F_EPSS RT_BIT(31) 179 #define CODEC_F00_0F_CLKSTOP RT_BIT(30) 180 #define CODEC_F00_0F_S3D3 RT_BIT(29) 181 #define CODEC_F00_0F_D3COLD RT_BIT(4) 182 #define CODEC_F00_0F_D3 RT_BIT(3) 183 #define CODEC_F00_0F_D2 RT_BIT(2) 184 #define CODEC_F00_0F_D1 RT_BIT(1) 185 #define CODEC_F00_0F_D0 RT_BIT(0) 186 187 /* CP/IO Count (7.3.4.14) */ 188 #define CODEC_MAKE_F00_11(wake, unsol, numgpi, numgpo, numgpio) \ 189 ( (((wake) & 0x1) << 31) \ 190 | (((unsol) & 0x1) << 30) \ 191 | (((numgpi) & 0xFF) << 16) \ 192 | (((numgpo) & 0xFF) << 8) \ 193 | ((numgpio) & 0xFF)) 194 195 /* Power States (7.3.3.10) */ 196 #define CODEC_MAKE_F05(reset, stopok, error, act, set) \ 197 ( (((reset) & 0x1) << 10) \ 198 | (((stopok) & 0x1) << 9) \ 199 | (((error) & 0x1) << 8) \ 200 | (((act) & 0x7) << 4) \ 201 | ((set) & 0x7)) 202 #define CODEC_F05_D3COLD (4) 203 #define CODEC_F05_D3 (3) 204 #define CODEC_F05_D2 (2) 205 #define CODEC_F05_D1 (1) 206 #define CODEC_F05_D0 (0) 207 208 #define CODEC_F05_IS_RESET(value) (((value) & RT_BIT(10)) != 0) 209 #define CODEC_F05_IS_STOPOK(value) (((value) & RT_BIT(9)) != 0) 210 #define CODEC_F05_IS_ERROR(value) (((value) & RT_BIT(8)) != 0) 211 #define CODEC_F05_ACT(value) (((value) & 0x7) >> 4) 212 #define CODEC_F05_SET(value) (((value) & 0x7)) 213 214 /* Pin Widged Control (7.3.3.13) */ 215 #define CODEC_F07_VREF_HIZ (0) 216 #define CODEC_F07_VREF_50 (0x1) 217 #define CODEC_F07_VREF_GROUND (0x2) 218 #define CODEC_F07_VREF_80 (0x4) 219 #define CODEC_F07_VREF_100 (0x5) 220 #define CODEC_F07_IN_ENABLE RT_BIT(5) 221 #define CODEC_F07_OUT_ENABLE RT_BIT(6) 222 #define CODEC_F07_OUT_H_ENABLE RT_BIT(7) 223 224 /* Converter formats (7.3.3.8) and (3.7.1) */ 225 #define CODEC_MAKE_A(fNonPCM, f44_1BaseRate, mult, div, bits, chan) \ 226 ( (((fNonPCM) & 0x1) << 15) \ 227 | (((f44_1BaseRate) & 0x1) << 14) \ 228 | (((mult) & 0x7) << 11) \ 229 | (((div) & 0x7) << 8) \ 230 | (((bits) & 0x7) << 4) \ 231 | ((chan) & 0xF)) 232 233 #define CODEC_A_MULT_1X (0) 234 #define CODEC_A_MULT_2X (1) 235 #define CODEC_A_MULT_3X (2) 236 #define CODEC_A_MULT_4X (3) 237 238 #define CODEC_A_DIV_1X (0) 239 #define CODEC_A_DIV_2X (1) 240 #define CODEC_A_DIV_3X (2) 241 #define CODEC_A_DIV_4X (3) 242 #define CODEC_A_DIV_5X (4) 243 #define CODEC_A_DIV_6X (5) 244 #define CODEC_A_DIV_7X (6) 245 #define CODEC_A_DIV_8X (7) 246 247 #define CODEC_A_8_BIT (0) 248 #define CODEC_A_16_BIT (1) 249 #define CODEC_A_20_BIT (2) 250 #define CODEC_A_24_BIT (3) 251 #define CODEC_A_32_BIT (4) 252 253 /* Pin Sense (7.3.3.15) */ 254 #define CODEC_MAKE_F09_ANALOG(fPresent, impedance) \ 255 ( (((fPresent) & 0x1) << 31) \ 256 | (((impedance) & 0x7FFFFFFF))) 257 #define CODEC_F09_ANALOG_NA 0x7FFFFFFF 258 #define CODEC_MAKE_F09_DIGITAL(fPresent, fELDValid) \ 259 ( (((fPresent) & 0x1) << 31) \ 260 | (((fELDValid) & 0x1) << 30)) 261 262 /* HDA spec 7.3.3.31 defines layout of configuration registers/verbs (0xF1C) */ 263 /* Configuration's port connection */ 264 #define CODEC_F1C_PORT_MASK (0x3) 265 #define CODEC_F1C_PORT_SHIFT (30) 266 267 #define CODEC_F1C_PORT_COMPLEX (0x0) 268 #define CODEC_F1C_PORT_NO_PHYS (0x1) 269 #define CODEC_F1C_PORT_FIXED (0x2) 270 #define CODEC_F1C_BOTH (0x3) 271 272 /* Configuration's location */ 273 #define CODEC_F1C_LOCATION_MASK (0x3F) 274 #define CODEC_F1C_LOCATION_SHIFT (24) 275 /* [4:5] bits of location region means chassis attachment */ 276 #define CODEC_F1C_LOCATION_PRIMARY_CHASSIS (0) 277 #define CODEC_F1C_LOCATION_INTERNAL RT_BIT(4) 278 #define CODEC_F1C_LOCATION_SECONDRARY_CHASSIS RT_BIT(5) 279 #define CODEC_F1C_LOCATION_OTHER (RT_BIT(5)) 280 281 /* [0:3] bits of location region means geometry location attachment */ 282 #define CODEC_F1C_LOCATION_NA (0) 283 #define CODEC_F1C_LOCATION_REAR (0x1) 284 #define CODEC_F1C_LOCATION_FRONT (0x2) 285 #define CODEC_F1C_LOCATION_LEFT (0x3) 286 #define CODEC_F1C_LOCATION_RIGTH (0x4) 287 #define CODEC_F1C_LOCATION_TOP (0x5) 288 #define CODEC_F1C_LOCATION_BOTTOM (0x6) 289 #define CODEC_F1C_LOCATION_SPECIAL_0 (0x7) 290 #define CODEC_F1C_LOCATION_SPECIAL_1 (0x8) 291 #define CODEC_F1C_LOCATION_SPECIAL_3 (0x9) 292 293 /* Configuration's devices */ 294 #define CODEC_F1C_DEVICE_MASK (0xF) 295 #define CODEC_F1C_DEVICE_SHIFT (20) 296 #define CODEC_F1C_DEVICE_LINE_OUT (0) 297 #define CODEC_F1C_DEVICE_SPEAKER (0x1) 298 #define CODEC_F1C_DEVICE_HP (0x2) 299 #define CODEC_F1C_DEVICE_CD (0x3) 300 #define CODEC_F1C_DEVICE_SPDIF_OUT (0x4) 301 #define CODEC_F1C_DEVICE_DIGITAL_OTHER_OUT (0x5) 302 #define CODEC_F1C_DEVICE_MODEM_LINE_SIDE (0x6) 303 #define CODEC_F1C_DEVICE_MODEM_HANDSET_SIDE (0x7) 304 #define CODEC_F1C_DEVICE_LINE_IN (0x8) 305 #define CODEC_F1C_DEVICE_AUX (0x9) 306 #define CODEC_F1C_DEVICE_MIC (0xA) 307 #define CODEC_F1C_DEVICE_PHONE (0xB) 308 #define CODEC_F1C_DEVICE_SPDIF_IN (0xC) 309 #define CODEC_F1C_DEVICE_RESERVED (0xE) 310 #define CODEC_F1C_DEVICE_OTHER (0xF) 311 312 /* Configuration's Connection type */ 313 #define CODEC_F1C_CONNECTION_TYPE_MASK (0xF) 314 #define CODEC_F1C_CONNECTION_TYPE_SHIFT (16) 315 316 #define CODEC_F1C_CONNECTION_TYPE_UNKNOWN (0) 317 #define CODEC_F1C_CONNECTION_TYPE_1_8INCHES (0x1) 318 #define CODEC_F1C_CONNECTION_TYPE_1_4INCHES (0x2) 319 #define CODEC_F1C_CONNECTION_TYPE_ATAPI (0x3) 320 #define CODEC_F1C_CONNECTION_TYPE_RCA (0x4) 321 #define CODEC_F1C_CONNECTION_TYPE_OPTICAL (0x5) 322 #define CODEC_F1C_CONNECTION_TYPE_OTHER_DIGITAL (0x6) 323 #define CODEC_F1C_CONNECTION_TYPE_ANALOG (0x7) 324 #define CODEC_F1C_CONNECTION_TYPE_DIN (0x8) 325 #define CODEC_F1C_CONNECTION_TYPE_XLR (0x9) 326 #define CODEC_F1C_CONNECTION_TYPE_RJ_11 (0xA) 327 #define CODEC_F1C_CONNECTION_TYPE_COMBO (0xB) 328 #define CODEC_F1C_CONNECTION_TYPE_OTHER (0xF) 329 330 /* Configuration's color */ 331 #define CODEC_F1C_COLOR_MASK (0xF) 332 #define CODEC_F1C_COLOR_SHIFT (12) 333 #define CODEC_F1C_COLOR_UNKNOWN (0) 334 #define CODEC_F1C_COLOR_BLACK (0x1) 335 #define CODEC_F1C_COLOR_GREY (0x2) 336 #define CODEC_F1C_COLOR_BLUE (0x3) 337 #define CODEC_F1C_COLOR_GREEN (0x4) 338 #define CODEC_F1C_COLOR_RED (0x5) 339 #define CODEC_F1C_COLOR_ORANGE (0x6) 340 #define CODEC_F1C_COLOR_YELLOW (0x7) 341 #define CODEC_F1C_COLOR_PURPLE (0x8) 342 #define CODEC_F1C_COLOR_PINK (0x9) 343 #define CODEC_F1C_COLOR_RESERVED_0 (0xA) 344 #define CODEC_F1C_COLOR_RESERVED_1 (0xB) 345 #define CODEC_F1C_COLOR_RESERVED_2 (0xC) 346 #define CODEC_F1C_COLOR_RESERVED_3 (0xD) 347 #define CODEC_F1C_COLOR_WHITE (0xE) 348 #define CODEC_F1C_COLOR_OTHER (0xF) 349 350 /* Configuration's misc */ 351 #define CODEC_F1C_MISC_MASK (0xF) 352 #define CODEC_F1C_MISC_SHIFT (8) 353 #define CODEC_F1C_MISC_JACK_DETECT RT_BIT(0) 354 #define CODEC_F1C_MISC_RESERVED_0 RT_BIT(1) 355 #define CODEC_F1C_MISC_RESERVED_1 RT_BIT(2) 356 #define CODEC_F1C_MISC_RESERVED_2 RT_BIT(3) 357 358 /* Configuration's association */ 359 #define CODEC_F1C_ASSOCIATION_MASK (0xF) 360 #define CODEC_F1C_ASSOCIATION_SHIFT (4) 361 /* Connection's sequence */ 362 #define CODEC_F1C_SEQ_MASK (0xF) 363 #define CODEC_F1C_SEQ_SHIFT (0) 364 365 /* Implementation identification (7.3.3.30) */ 366 #define CODEC_MAKE_F20(bmid, bsku, aid) \ 367 ( (((bmid) & 0xFFFF) << 16) \ 368 | (((bsku) & 0xFF) << 8) \ 369 | (((aid) & 0xFF)) \ 370 ) 371 372 /* macro definition helping in filling the configuration registers. */ 373 #define CODEC_MAKE_F1C(port_connectivity, location, device, connection_type, color, misc, association, sequence) \ 374 ( ((port_connectivity) << CODEC_F1C_PORT_SHIFT) \ 375 | ((location) << CODEC_F1C_LOCATION_SHIFT) \ 376 | ((device) << CODEC_F1C_DEVICE_SHIFT) \ 377 | ((connection_type) << CODEC_F1C_CONNECTION_TYPE_SHIFT) \ 378 | ((color) << CODEC_F1C_COLOR_SHIFT) \ 379 | ((misc) << CODEC_F1C_MISC_SHIFT) \ 380 | ((association) << CODEC_F1C_ASSOCIATION_SHIFT) \ 381 | ((sequence))) 382 383 29 384 typedef struct CODECVERB 30 385 { … … 35 390 } CODECVERB; 36 391 37 #define CODECNODE_F0_PARAM_LENGTH 0x14 38 #define CODECNODE_F02_PARAM_LENGTH 16 39 typedef struct CODECCOMMONNODE 40 { 41 uint8_t id; /* 7 - bit format */ 42 const char *name; 43 /* RPM 5.3.6 */ 44 uint32_t au32F00_param[CODECNODE_F0_PARAM_LENGTH]; 45 uint32_t au32F02_param[CODECNODE_F02_PARAM_LENGTH]; 46 } CODECCOMMONNODE, *PCODECCOMMONNODE; 47 48 typedef struct ROOTCODECNODE 49 { 50 CODECCOMMONNODE node; 51 }ROOTCODECNODE, *PROOTCODECNODE; 52 53 #define AMPLIFIER_SIZE 60 54 typedef uint32_t AMPLIFIER[AMPLIFIER_SIZE]; 55 #define AMPLIFIER_IN 0 56 #define AMPLIFIER_OUT 1 57 #define AMPLIFIER_LEFT 1 58 #define AMPLIFIER_RIGHT 0 59 #define AMPLIFIER_REGISTER(amp, inout, side, index) ((amp)[30*(inout) + 15*(side) + (index)]) 60 typedef struct DACNODE 61 { 62 CODECCOMMONNODE node; 63 uint32_t u32F0d_param; 64 uint32_t u32F04_param; 65 uint32_t u32F05_param; 66 uint32_t u32F06_param; 67 uint32_t u32F0c_param; 68 69 uint32_t u32A_param; 70 AMPLIFIER B_params; 71 72 } DACNODE, *PDACNODE; 73 74 typedef struct ADCNODE 75 { 76 CODECCOMMONNODE node; 77 uint32_t u32F03_param; 78 uint32_t u32F05_param; 79 uint32_t u32F06_param; 80 uint32_t u32F09_param; 81 82 uint32_t u32A_param; 83 uint32_t u32F01_param; 84 AMPLIFIER B_params; 85 } ADCNODE, *PADCNODE; 86 87 typedef struct SPDIFOUTNODE 88 { 89 CODECCOMMONNODE node; 90 uint32_t u32F05_param; 91 uint32_t u32F06_param; 92 uint32_t u32F09_param; 93 uint32_t u32F0d_param; 94 95 uint32_t u32A_param; 96 AMPLIFIER B_params; 97 } SPDIFOUTNODE, *PSPDIFOUTNODE; 98 99 typedef struct SPDIFINNODE 100 { 101 CODECCOMMONNODE node; 102 uint32_t u32F05_param; 103 uint32_t u32F06_param; 104 uint32_t u32F09_param; 105 uint32_t u32F0d_param; 106 107 uint32_t u32A_param; 108 AMPLIFIER B_params; 109 } SPDIFINNODE, *PSPDIFINNODE; 110 111 typedef struct AFGCODECNODE 112 { 113 CODECCOMMONNODE node; 114 uint32_t u32F05_param; 115 uint32_t u32F08_param; 116 uint32_t u32F20_param; 117 uint32_t u32F17_param; 118 } AFGCODECNODE, *PAFGCODECNODE; 119 120 typedef struct PORTNODE 121 { 122 CODECCOMMONNODE node; 123 uint32_t u32F07_param; 124 uint32_t u32F08_param; 125 uint32_t u32F09_param; 126 uint32_t u32F01_param; 127 uint32_t u32F1c_param; 128 AMPLIFIER B_params; 129 } PORTNODE, *PPORTNODE; 130 131 typedef struct DIGOUTNODE 132 { 133 CODECCOMMONNODE node; 134 uint32_t u32F01_param; 135 uint32_t u32F08_param; 136 uint32_t u32F07_param; 137 uint32_t u32F09_param; 138 uint32_t u32F1c_param; 139 } DIGOUTNODE, *PDIGOUTNODE; 140 141 typedef struct DIGINNODE 142 { 143 CODECCOMMONNODE node; 144 uint32_t u32F05_param; 145 uint32_t u32F07_param; 146 uint32_t u32F08_param; 147 uint32_t u32F09_param; 148 uint32_t u32F0c_param; 149 uint32_t u32F1c_param; 150 uint32_t u32F1e_param; 151 } DIGINNODE, *PDIGINNODE; 152 153 typedef struct ADCMUXNODE 154 { 155 CODECCOMMONNODE node; 156 uint32_t u32F01_param; 157 158 uint32_t u32A_param; 159 AMPLIFIER B_params; 160 } ADCMUXNODE, *PADCMUXNODE; 161 162 typedef struct PCBEEPNODE 163 { 164 CODECCOMMONNODE node; 165 uint32_t u32F07_param; 166 uint32_t u32F0a_param; 167 168 uint32_t u32A_param; 169 AMPLIFIER B_params; 170 uint32_t u32F1c_param; 171 } PCBEEPNODE, *PPCBEEPNODE; 172 173 typedef struct CDNODE 174 { 175 CODECCOMMONNODE node; 176 uint32_t u32F07_param; 177 uint32_t u32F1c_param; 178 } CDNODE, *PCDNODE; 179 180 typedef struct VOLUMEKNOBNODE 181 { 182 CODECCOMMONNODE node; 183 uint32_t u32F08_param; 184 uint32_t u32F0f_param; 185 } VOLUMEKNOBNODE, *PVOLUMEKNOBNODE; 186 187 typedef struct ADCVOLNODE 188 { 189 CODECCOMMONNODE node; 190 uint32_t u32F0c_param; 191 uint32_t u32F01_param; 192 uint32_t u32A_params; 193 AMPLIFIER B_params; 194 } ADCVOLNODE, *PADCVOLNODE; 195 196 typedef struct RESNODE 197 { 198 CODECCOMMONNODE node; 199 uint32_t u32F05_param; 200 uint32_t u32F06_param; 201 uint32_t u32F07_param; 202 uint32_t u32F1c_param; 203 } RESNODE, *PRESNODE; 204 205 typedef union CODECNODE 206 { 207 CODECCOMMONNODE node; 208 ROOTCODECNODE root; 209 AFGCODECNODE afg; 210 DACNODE dac; 211 ADCNODE adc; 212 SPDIFOUTNODE spdifout; 213 SPDIFINNODE spdifin; 214 PORTNODE port; 215 DIGOUTNODE digout; 216 DIGINNODE digin; 217 ADCMUXNODE adcmux; 218 PCBEEPNODE pcbeep; 219 CDNODE cdnode; 220 VOLUMEKNOBNODE volumeKnob; 221 ADCVOLNODE adcvol; 222 RESNODE reserved; 223 } CODECNODE, *PCODECNODE; 392 #ifndef VBOX_HDA_CODEC_EMU 393 # define TYPE union 394 #else 395 # define TYPE struct 396 #endif 397 TYPE CODECNODE; 398 typedef TYPE CODECNODE CODECNODE; 399 typedef TYPE CODECNODE *PCODECNODE; 400 224 401 225 402 typedef enum
Note:
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