Changeset 36140 in vbox for trunk/src/recompiler/tests

Timestamp:

Mar 3, 2011 1:48:16 PM (14 years ago)

Author:

vboxsync

Message:

rem: Re-synced to ​svn://svn.savannah.nongnu.org/qemu/trunk@5495 (repo UUID c046a42c-6fe2-441c-8c8c-71466251a162).

Location:

trunk/src/recompiler/tests

Files:

• Makefile (modified) (6 diffs)
• qruncom.c (modified) (9 diffs)
• test-i386-code16.S (modified) (4 diffs)
• test-i386-shift.h (modified) (1 diff)
• test-i386-ssse3.c (added)
• test-i386-vm86.S (modified) (7 diffs)
• test-i386.c (modified) (64 diffs)
• test-mmap.c (added)
• test_path.c (modified) (1 diff)

trunk/src/recompiler/tests/Makefile

@@ -1 +1 @@
 -include ../config-host.mak
+VPATH=$(SRC_PATH)/tests
 
-CFLAGS=-Wall -O2 -g
+CFLAGS=-Wall -O2 -g -fno-strict-aliasing
 #CFLAGS+=-msse2
 LDFLAGS=
 
 ifeq ($(ARCH),i386)
-TESTS=linux-test testthread sha1-i386 test-i386 runcom
+TESTS=linux-test testthread sha1-i386 test-i386
 endif
 ifeq ($(ARCH),x86_64)
@@ -13 +14 @@
 TESTS+=sha1# test_path
 #TESTS+=test_path
+#TESTS+=runcom
 
-QEMU=../i386-user/qemu-i386
+QEMU=../i386-linux-user/qemu-i386
 
 all: $(TESTS)
@@ -32 +34 @@
 test-i386: test-i386.c test-i386-code16.S test-i386-vm86.S \
            test-i386.h test-i386-shift.h test-i386-muldiv.h
-        $(CC) $(CFLAGS) $(LDFLAGS) -static -o $@ \
-              test-i386.c test-i386-code16.S test-i386-vm86.S -lm
+        $(CC) -m32 $(CFLAGS) $(LDFLAGS) -static -o $@ \
+              $(<D)/test-i386.c $(<D)/test-i386-code16.S $(<D)/test-i386-vm86.S -lm
 
 test-x86_64: test-i386.c \
            test-i386.h test-i386-shift.h test-i386-muldiv.h
-        $(CC) $(CFLAGS) $(LDFLAGS) -static -o $@ test-i386.c -lm
+        $(CC) -m64 $(CFLAGS) $(LDFLAGS) -static -o $@ $(<D)/test-i386.c -lm
 
 ifeq ($(ARCH),i386)
@@ -47 +49 @@
         $(QEMU) test-i386 > test-i386.out
         @if diff -u test-i386.ref test-i386.out ; then echo "Auto Test OK"; fi
-ifeq ($(ARCH),i386)
-        $(QEMU) -no-code-copy test-i386 > test-i386.out
-        @if diff -u test-i386.ref test-i386.out ; then echo "Auto Test OK (no code copy)"; fi
-endif
+
+.PHONY: test-mmap
+test-mmap: test-mmap.c
+        $(CC) $(CFLAGS) -Wall -static -O2 $(LDFLAGS) -o $@ $<
+        -./test-mmap
+        -$(QEMU) ./test-mmap
+        -$(QEMU) -p 8192 ./test-mmap 8192
+        -$(QEMU) -p 16384 ./test-mmap 16384
+        -$(QEMU) -p 32768 ./test-mmap 32768
 
 # generic Linux and CPU test
@@ -83 +90 @@
         arm-linux-gcc -Wall -g -O2 -c -o $@ $<
 
+test-arm-iwmmxt: test-arm-iwmmxt.s
+        cpp < $< | arm-linux-gnu-gcc -Wall -static -march=iwmmxt -mabi=aapcs -x assembler - -o $@
+
 # MIPS test
 hello-mips: hello-mips.c
@@ -90 +100 @@
         mipsel-linux-gnu-gcc -nostdlib -static -mno-abicalls -fno-PIC -mabi=32 -Wall -Wextra -g -O2 -o $@ $<
 
-# XXX: find a way to compile easily a test for each arch
-test2:
-        @for arch in i386 arm armeb sparc ppc mips mipsel; do \
-           ../$${arch}-user/qemu-$${arch} $${arch}/ls -l linux-test.c ; \
-        done
+# testsuite for the CRIS port.
+test-cris:
+        $(MAKE) -C cris check
 
 clean:

trunk/src/recompiler/tests/qruncom.c

@@ -60 +60 @@
 }
 
-static void set_gate(void *ptr, unsigned int type, unsigned int dpl, 
+static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
                      unsigned long addr, unsigned int sel)
 {
@@ -142 +142 @@
 }
 
-static void host_segv_handler(int host_signum, siginfo_t *info, 
+static void host_segv_handler(int host_signum, siginfo_t *info,
                               void *puc)
 {
@@ -161 +161 @@
         usage();
     filename = argv[1];
-    
-    vm86_mem = mmap((void *)0x00000000, 0x110000, 
-                    PROT_WRITE | PROT_READ | PROT_EXEC, 
+
+    vm86_mem = mmap((void *)0x00000000, 0x110000,
+                    PROT_WRITE | PROT_READ | PROT_EXEC,
                     MAP_FIXED | MAP_ANON | MAP_PRIVATE, -1, 0);
     if (vm86_mem == MAP_FAILED) {
@@ -186 +186 @@
     {
         struct sigaction act;
-        
+
         sigfillset(&act.sa_mask);
         act.sa_flags = SA_SIGINFO;
@@ -194 +194 @@
         sigaction(SIGSEGV, &act, NULL);
         sigaction(SIGBUS, &act, NULL);
-#if defined (TARGET_I386) && defined(USE_CODE_COPY)
-        sigaction(SIGFPE, &act, NULL);
-#endif
     }
 
     //    cpu_set_log(CPU_LOG_TB_IN_ASM | CPU_LOG_TB_OUT_ASM | CPU_LOG_EXEC);
 
-    env = cpu_init();
-
-    /* disable code copy to simplify debugging */
-    code_copy_enabled = 0;
+    env = cpu_init("qemu32");
 
     /* set user mode state (XXX: should be done automatically by
@@ -219 +213 @@
        mode. We also activate the VM86 flag to run DOS code */
     env->eflags |= IF_MASK | VM_MASK;
-    
+
     /* init basic registers */
     env->eip = 0x100;
@@ -225 +219 @@
     seg = (COM_BASE_ADDR - 0x100) >> 4;
 
-    cpu_x86_load_seg_cache(env, R_CS, seg, 
-                           (seg << 4), 0xffff, 0);
-    cpu_x86_load_seg_cache(env, R_SS, seg, 
-                           (seg << 4), 0xffff, 0);
-    cpu_x86_load_seg_cache(env, R_DS, seg, 
-                           (seg << 4), 0xffff, 0);
-    cpu_x86_load_seg_cache(env, R_ES, seg, 
-                           (seg << 4), 0xffff, 0);
-    cpu_x86_load_seg_cache(env, R_FS, seg, 
-                           (seg << 4), 0xffff, 0);
-    cpu_x86_load_seg_cache(env, R_GS, seg, 
+    cpu_x86_load_seg_cache(env, R_CS, seg,
+                           (seg << 4), 0xffff, 0);
+    cpu_x86_load_seg_cache(env, R_SS, seg,
+                           (seg << 4), 0xffff, 0);
+    cpu_x86_load_seg_cache(env, R_DS, seg,
+                           (seg << 4), 0xffff, 0);
+    cpu_x86_load_seg_cache(env, R_ES, seg,
+                           (seg << 4), 0xffff, 0);
+    cpu_x86_load_seg_cache(env, R_FS, seg,
+                           (seg << 4), 0xffff, 0);
+    cpu_x86_load_seg_cache(env, R_GS, seg,
                            (seg << 4), 0xffff, 0);
 
@@ -261 +255 @@
     set_idt(18, 0);
     set_idt(19, 0);
-        
+
     /* put return code */
     *seg_to_linear(env->segs[R_CS].selector, 0) = 0xb4; /* mov ah, $0 */
@@ -275 +269 @@
     env->regs[R_EDI] = 0xfffe;
 
-    /* inform the emulator of the mapped memory */
-    page_set_flags(0x00000000, 0x110000, 
+    /* inform the emulator of the mmaped memory */
+    page_set_flags(0x00000000, 0x110000,
                    PAGE_WRITE | PAGE_READ | PAGE_EXEC | PAGE_VALID);
 

trunk/src/recompiler/tests/test-i386-code16.S

@@ -8 +8 @@
 
         .globl code16_func1
-        
+
         /* basic test */
 code16_func1 = . - code16_start
@@ -25 +25 @@
         data32 lret
 
-/* test various jmp opcodes */        
+/* test various jmp opcodes */
         .globl code16_func3
 code16_func3 = . - code16_start
@@ -37 +37 @@
         add $2, %ax
 2:
-        
+
         call myfunc
-        
+
         lcall $CS_SEG, $(myfunc2 - code16_start)
 
@@ -45 +45 @@
 myjmp1_next:
 
-        cs lcall myfunc2_addr - code16_start
+        cs lcall *myfunc2_addr - code16_start
 
-        cs ljmp myjmp2_addr - code16_start
+        cs ljmp *myjmp2_addr - code16_start
 myjmp2_next:
 
         data32 lret
-        
+
 myfunc2_addr:
         .short myfunc2 - code16_start

trunk/src/recompiler/tests/test-i386-shift.h

@@ -146 +146 @@
     exec_opl(s2, s0, s1, 0);
 #ifdef OP_SHIFTD
-    if (s1 <= 15)
-        exec_opw(s2, s0, s1, 0);
+    exec_opw(s2, s0, s1, 0);
 #else
     exec_opw(s2, s0, s1, 0);

trunk/src/recompiler/tests/test-i386-vm86.S

@@ -15 +15 @@
         es movw $GET_OFFSET(int90_test), 0x90 * 4
         es movw %cs, 0x90 * 4 + 2
-        
+
         /* launch int 0x90 */
 
@@ -25 +25 @@
         int $0x21
 
-        pushf 
+        pushf
         popw %dx
         movb $0xff, %ah
@@ -31 +31 @@
 
         cli
-        pushf 
+        pushf
         popw %dx
         movb $0xff, %ah
         int $0x21
 
-        sti        
-        pushfl 
+        sti
+        pushfl
         popl %edx
         movb $0xff, %ah
         int $0x21
-        
+
 #if 0
         movw $GET_OFFSET(IF_msg1), %dx
@@ -55 +55 @@
 #endif
 
-        pushf 
+        pushf
         popw %dx
         movb $0xff, %ah
         int $0x21
-        
+
         pushfl
         movw %sp, %bx
@@ -74 +74 @@
 
 int90_test:
-        pushf 
+        pushf
         pop %dx
         movb $0xff, %ah
@@ -83 +83 @@
         movb $0xff, %ah
         int $0x21
-        
+
         movw $GET_OFFSET(int90_msg), %dx
         movb $0x09, %ah
         int $0x21
         iret
-                    
+
 int90_msg:
         .string "INT90 started\n$"
- 
+
 hello_world:
         .string "Hello VM86 world\n$"
@@ -102 +102 @@
 
 vm86_code_end:
-        

trunk/src/recompiler/tests/test-i386.c

@@ -1 +1 @@
 /*
  *  x86 CPU test
- * 
+ *
  *  Copyright (c) 2003 Fabrice Bellard
  *
@@ -41 +41 @@
 
 #if !defined(__x86_64__)
-#define TEST_VM86
+//#define TEST_VM86
 #define TEST_SEGS
 #endif
 //#define LINUX_VM86_IOPL_FIX
 //#define TEST_P4_FLAGS
-#if defined(__x86_64__)
+#ifdef __SSE__
 #define TEST_SSE
 #define TEST_CMOV  1
 #define TEST_FCOMI 1
 #else
-//#define TEST_SSE
-#define TEST_CMOV  0
-#define TEST_FCOMI 0
+#undef TEST_SSE
+#define TEST_CMOV  1
+#define TEST_FCOMI 1
 #endif
 
@@ -468 +468 @@
 }
 
+#define TEST_LOOP(insn) \
+{\
+    for(i = 0; i < sizeof(ecx_vals) / sizeof(long); i++) {\
+        ecx = ecx_vals[i];\
+        for(zf = 0; zf < 2; zf++) {\
+    asm("test %2, %2\n\t"\
+        "movl $1, %0\n\t"\
+          insn " 1f\n\t" \
+        "movl $0, %0\n\t"\
+        "1:\n\t"\
+        : "=a" (res)\
+        : "c" (ecx), "b" (!zf)); \
+    printf("%-10s ECX=" FMTLX " ZF=%ld r=%d\n", insn, ecx, zf, res);      \
+        }\
+   }\
+}
+
+void test_loop(void)
+{
+    long ecx, zf;
+    const long ecx_vals[] = {
+        0,
+        1,
+        0x10000,
+        0x10001,
+#if defined(__x86_64__)
+        0x100000000L,
+        0x100000001L,
+#endif
+    };
+    int i, res;
+
+#if !defined(__x86_64__)
+    TEST_LOOP("jcxz");
+    TEST_LOOP("loopw");
+    TEST_LOOP("loopzw");
+    TEST_LOOP("loopnzw");
+#endif
+
+    TEST_LOOP("jecxz");
+    TEST_LOOP("loopl");
+    TEST_LOOP("loopzl");
+    TEST_LOOP("loopnzl");
+}
+
 #undef CC_MASK
 #ifdef TEST_P4_FLAGS
@@ -481 +526 @@
 #include "test-i386-muldiv.h"
 
-void test_imulw2(long op0, long op1) 
+void test_imulw2(long op0, long op1)
 {
     long res, s1, s0, flags;
@@ -490 +535 @@
     asm volatile ("push %4\n\t"
          "popf\n\t"
-         "imulw %w2, %w0\n\t" 
+         "imulw %w2, %w0\n\t"
          "pushf\n\t"
          "pop %1\n\t"
@@ -499 +544 @@
 }
 
-void test_imull2(long op0, long op1) 
+void test_imull2(long op0, long op1)
 {
     long res, s1, s0, flags;
@@ -508 +553 @@
     asm volatile ("push %4\n\t"
          "popf\n\t"
-         "imull %k2, %k0\n\t" 
+         "imull %k2, %k0\n\t"
          "pushf\n\t"
          "pop %1\n\t"
@@ -518 +563 @@
 
 #if defined(__x86_64__)
-void test_imulq2(long op0, long op1) 
+void test_imulq2(long op0, long op1)
 {
     long res, s1, s0, flags;
@@ -527 +572 @@
     asm volatile ("push %4\n\t"
          "popf\n\t"
-         "imulq %2, %0\n\t" 
+         "imulq %2, %0\n\t"
          "pushf\n\t"
          "pop %1\n\t"
@@ -684 +729 @@
         "mov $0x12345678, %0\n"\
         #op " %" size "2, %" size "0 ; setz %b1" \
-        : "=r" (res), "=q" (resz)\
-        : "g" (val));\
+        : "=&r" (res), "=&q" (resz)\
+        : "r" (val));\
     printf("%-10s A=" FMTLX " R=" FMTLX " %ld\n", #op, val, res, resz);\
 }
@@ -714 +759 @@
 };
 
-union float64u q_nan = { .l = 0xFFF8000000000000 };
-union float64u s_nan = { .l = 0xFFF0000000000000 };
+union float64u q_nan = { .l = 0xFFF8000000000000LL };
+union float64u s_nan = { .l = 0xFFF0000000000000LL };
 
 void test_fops(double a, double b)
@@ -750 +795 @@
         long double fpregs[8];
     } float_env32;
-    
+
     asm volatile ("fnstenv %0\n" : : "m" (float_env32));
     float_env32.fpus &= ~0x7f;
@@ -769 +814 @@
         : "=a" (fpus)
         : "t" (a), "u" (b));
-    printf("fcom(%f %f)=%04lx \n", 
+    printf("fcom(%f %f)=%04lx \n",
            a, b, fpus & (0x4500 | FPUS_EMASK));
     fpu_clear_exceptions();
@@ -776 +821 @@
         : "=a" (fpus)
         : "t" (a), "u" (b));
-    printf("fucom(%f %f)=%04lx\n", 
+    printf("fucom(%f %f)=%04lx\n",
            a, b, fpus & (0x4500 | FPUS_EMASK));
     if (TEST_FCOMI) {
@@ -787 +832 @@
             : "=r" (eflags), "=a" (fpus)
             : "t" (a), "u" (b));
-        printf("fcomi(%f %f)=%04lx %02lx\n", 
+        printf("fcomi(%f %f)=%04lx %02lx\n",
                a, b, fpus & FPUS_EMASK, eflags & (CC_Z | CC_P | CC_C));
         fpu_clear_exceptions();
@@ -796 +841 @@
             : "=r" (eflags), "=a" (fpus)
             : "t" (a), "u" (b));
-        printf("fucomi(%f %f)=%04lx %02lx\n", 
+        printf("fucomi(%f %f)=%04lx %02lx\n",
                a, b, fpus & FPUS_EMASK, eflags & (CC_Z | CC_P | CC_C));
     }
@@ -824 +869 @@
     printf("(long double)%f = %Lf\n", a, la);
     printf("a=" FMT64X "\n", *(uint64_t *)&a);
-    printf("la=" FMT64X " %04x\n", *(uint64_t *)&la, 
+    printf("la=" FMT64X " %04x\n", *(uint64_t *)&la,
            *(unsigned short *)((char *)(&la) + 8));
 
@@ -830 +875 @@
     asm volatile ("fstcw %0" : "=m" (fpuc));
     for(i=0;i<4;i++) {
-        asm volatile ("fldcw %0" : : "m" ((fpuc & ~0x0c00) | (i << 10)));
+        uint16_t val16;
+        val16 = (fpuc & ~0x0c00) | (i << 10);
+        asm volatile ("fldcw %0" : : "m" (val16));
         asm volatile ("fist %0" : "=m" (wa) : "t" (a));
         asm volatile ("fistl %0" : "=m" (ia) : "t" (a));
@@ -866 +913 @@
     asm("fbstp %0" : "=m" (bcd[0]) : "t" (a) : "st");
     asm("fbld %1" : "=t" (b) : "m" (bcd[0]));
-    printf("a=%f bcd=%04x%04x%04x%04x%04x b=%f\n", 
+    printf("a=%f bcd=%04x%04x%04x%04x%04x b=%f\n",
            a, bcd[4], bcd[3], bcd[2], bcd[1], bcd[0], b);
 }
@@ -987 +1034 @@
     test_fcvt(q_nan.d);
     test_fconst();
-    test_fbcd(1234567890123456);
-    test_fbcd(-123451234567890);
+    test_fbcd(1234567890123456.0);
+    test_fbcd(-123451234567890.0);
     test_fenv();
     if (TEST_CMOV) {
@@ -1052 +1099 @@
     TEST_BCD(aaa, 0x1234040a, 0, (CC_C | CC_A));
     TEST_BCD(aaa, 0x123405fa, 0, (CC_C | CC_A));
-    
+
     TEST_BCD(aas, 0x12340205, CC_A, (CC_C | CC_A));
     TEST_BCD(aas, 0x12340306, CC_A, (CC_C | CC_A));
@@ -1074 +1121 @@
     asm(#op " %" size "0, %" size "1" \
         : "=q" (op0), opconst (op1) \
-        : "0" (op0), "1" (op1));\
+        : "0" (op0));\
     printf("%-10s A=" FMTLX " B=" FMTLX "\n",\
            #op, op0, op1);\
@@ -1087 +1134 @@
     asm(#op " %" size "0, %" size "1" \
         : "=q" (op0), opconst (op1) \
-        : "0" (op0), "1" (op1), "a" (op2));\
+        : "0" (op0), "a" (op2));\
     printf("%-10s EAX=" FMTLX " A=" FMTLX " C=" FMTLX "\n",\
            #op, op2, op0, op1);\
@@ -1095 +1142 @@
 {
 #if defined(__x86_64__)
-    TEST_XCHG(xchgq, "", "=q");
-#endif
-    TEST_XCHG(xchgl, "k", "=q");
-    TEST_XCHG(xchgw, "w", "=q");
-    TEST_XCHG(xchgb, "b", "=q");
+    TEST_XCHG(xchgq, "", "+q");
+#endif
+    TEST_XCHG(xchgl, "k", "+q");
+    TEST_XCHG(xchgw, "w", "+q");
+    TEST_XCHG(xchgb, "b", "+q");
 
 #if defined(__x86_64__)
     TEST_XCHG(xchgq, "", "=m");
 #endif
-    TEST_XCHG(xchgl, "k", "=m");
-    TEST_XCHG(xchgw, "w", "=m");
-    TEST_XCHG(xchgb, "b", "=m");
+    TEST_XCHG(xchgl, "k", "+m");
+    TEST_XCHG(xchgw, "w", "+m");
+    TEST_XCHG(xchgb, "b", "+m");
 
 #if defined(__x86_64__)
-    TEST_XCHG(xaddq, "", "=q");
-#endif
-    TEST_XCHG(xaddl, "k", "=q");
-    TEST_XCHG(xaddw, "w", "=q");
-    TEST_XCHG(xaddb, "b", "=q");
+    TEST_XCHG(xaddq, "", "+q");
+#endif
+    TEST_XCHG(xaddl, "k", "+q");
+    TEST_XCHG(xaddw, "w", "+q");
+    TEST_XCHG(xaddb, "b", "+q");
 
     {
@@ -1123 +1170 @@
 
 #if defined(__x86_64__)
-    TEST_XCHG(xaddq, "", "=m");
-#endif
-    TEST_XCHG(xaddl, "k", "=m");
-    TEST_XCHG(xaddw, "w", "=m");
-    TEST_XCHG(xaddb, "b", "=m");
+    TEST_XCHG(xaddq, "", "+m");
+#endif
+    TEST_XCHG(xaddl, "k", "+m");
+    TEST_XCHG(xaddw, "w", "+m");
+    TEST_XCHG(xaddb, "b", "+m");
 
 #if defined(__x86_64__)
-    TEST_CMPXCHG(cmpxchgq, "", "=q", 0xfbca7654);
-#endif
-    TEST_CMPXCHG(cmpxchgl, "k", "=q", 0xfbca7654);
-    TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfbca7654);
-    TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfbca7654);
+    TEST_CMPXCHG(cmpxchgq, "", "+q", 0xfbca7654);
+#endif
+    TEST_CMPXCHG(cmpxchgl, "k", "+q", 0xfbca7654);
+    TEST_CMPXCHG(cmpxchgw, "w", "+q", 0xfbca7654);
+    TEST_CMPXCHG(cmpxchgb, "b", "+q", 0xfbca7654);
 
 #if defined(__x86_64__)
-    TEST_CMPXCHG(cmpxchgq, "", "=q", 0xfffefdfc);
-#endif
-    TEST_CMPXCHG(cmpxchgl, "k", "=q", 0xfffefdfc);
-    TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfffefdfc);
-    TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfffefdfc);
+    TEST_CMPXCHG(cmpxchgq, "", "+q", 0xfffefdfc);
+#endif
+    TEST_CMPXCHG(cmpxchgl, "k", "+q", 0xfffefdfc);
+    TEST_CMPXCHG(cmpxchgw, "w", "+q", 0xfffefdfc);
+    TEST_CMPXCHG(cmpxchgb, "b", "+q", 0xfffefdfc);
 
 #if defined(__x86_64__)
-    TEST_CMPXCHG(cmpxchgq, "", "=m", 0xfbca7654);
-#endif
-    TEST_CMPXCHG(cmpxchgl, "k", "=m", 0xfbca7654);
-    TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfbca7654);
-    TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfbca7654);
+    TEST_CMPXCHG(cmpxchgq, "", "+m", 0xfbca7654);
+#endif
+    TEST_CMPXCHG(cmpxchgl, "k", "+m", 0xfbca7654);
+    TEST_CMPXCHG(cmpxchgw, "w", "+m", 0xfbca7654);
+    TEST_CMPXCHG(cmpxchgb, "b", "+m", 0xfbca7654);
 
 #if defined(__x86_64__)
-    TEST_CMPXCHG(cmpxchgq, "", "=m", 0xfffefdfc);
-#endif
-    TEST_CMPXCHG(cmpxchgl, "k", "=m", 0xfffefdfc);
-    TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfffefdfc);
-    TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfffefdfc);
+    TEST_CMPXCHG(cmpxchgq, "", "+m", 0xfffefdfc);
+#endif
+    TEST_CMPXCHG(cmpxchgl, "k", "+m", 0xfffefdfc);
+    TEST_CMPXCHG(cmpxchgw, "w", "+m", 0xfffefdfc);
+    TEST_CMPXCHG(cmpxchgb, "b", "+m", 0xfffefdfc);
 
     {
         uint64_t op0, op1, op2;
+        long eax, edx;
         long i, eflags;
 
         for(i = 0; i < 2; i++) {
-            op0 = 0x123456789abcd;
+            op0 = 0x123456789abcdLL;
+            eax = i2l(op0 & 0xffffffff);
+            edx = i2l(op0 >> 32);
             if (i == 0)
-                op1 = 0xfbca765423456;
+                op1 = 0xfbca765423456LL;
             else
                 op1 = op0;
-            op2 = 0x6532432432434;
-            asm("cmpxchg8b %1\n" 
+            op2 = 0x6532432432434LL;
+            asm("cmpxchg8b %2\n"
                 "pushf\n"
-                "pop %2\n"
-                : "=A" (op0), "=m" (op1), "=g" (eflags)
-                : "0" (op0), "m" (op1), "b" ((int)op2), "c" ((int)(op2 >> 32)));
-            printf("cmpxchg8b: op0=" FMT64X " op1=" FMT64X " CC=%02lx\n", 
-                    op0, op1, eflags & CC_Z);
+                "pop %3\n"
+                : "=a" (eax), "=d" (edx), "=m" (op1), "=g" (eflags)
+                : "0" (eax), "1" (edx), "m" (op1), "b" ((int)op2), "c" ((int)(op2 >> 32)));
+            printf("cmpxchg8b: eax=" FMTLX " edx=" FMTLX " op1=" FMT64X " CC=%02lx\n",
+                   eax, edx, op1, eflags & CC_Z);
         }
     }
@@ -1183 +1233 @@
 /* segmentation tests */
 
+#include <sys/syscall.h>
+#include <unistd.h>
 #include <asm/ldt.h>
-#include <linux/unistd.h>
 #include <linux/version.h>
 
-_syscall3(int, modify_ldt, int, func, void *, ptr, unsigned long, bytecount)
+static inline int modify_ldt(int func, void * ptr, unsigned long bytecount)
+{
+    return syscall(__NR_modify_ldt, func, ptr, bytecount);
+}
 
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 5, 66)
@@ -1201 +1255 @@
 {\
     int res, res2;\
+    uint16_t mseg = seg;\
     res = 0x12345678;\
     asm (op " %" size "2, %" size "0\n" \
@@ -1207 +1262 @@
          "movl $1, %1\n"\
          "1:\n"\
-         : "=r" (res), "=r" (res2) : "m" (seg), "0" (res));\
+         : "=r" (res), "=r" (res2) : "m" (mseg), "0" (res));\
     printf(op ": Z=%d %08x\n", res2, res & ~(mask));\
+}
+
+#define TEST_ARPL(op, size, op1, op2)\
+{\
+    long a, b, c;                               \
+    a = (op1);                                  \
+    b = (op2);                                  \
+    asm volatile(op " %" size "3, %" size "0\n"\
+                 "movl $0,%1\n"\
+                 "jnz 1f\n"\
+                 "movl $1,%1\n"\
+                 "1:\n"\
+                 : "=r" (a), "=r" (c) : "0" (a), "r" (b));    \
+    printf(op size " A=" FMTLX " B=" FMTLX " R=" FMTLX " z=%ld\n",\
+           (long)(op1), (long)(op2), a, c);\
 }
 
@@ -1287 +1357 @@
     segoff.seg = MK_SEL(2);
     segoff.offset = 0xabcdef12;
-    asm volatile("lfs %2, %0\n\t" 
+    asm volatile("lfs %2, %0\n\t"
                  "movl %%fs, %1\n\t"
-                 : "=r" (res), "=g" (res2) 
+                 : "=r" (res), "=g" (res2)
                  : "m" (segoff));
     printf("FS:reg = %04x:%08x\n", res2, res);
@@ -1302 +1372 @@
     TEST_LR("lslw", "w", 0xfff8, 0);
     TEST_LR("lsll", "", 0xfff8, 0);
+
+    TEST_ARPL("arpl", "w", 0x12345678 | 3, 0x762123c | 1);
+    TEST_ARPL("arpl", "w", 0x12345678 | 1, 0x762123c | 3);
+    TEST_ARPL("arpl", "w", 0x12345678 | 1, 0x762123c | 1);
 }
 
@@ -1328 +1402 @@
 
     /* call the first function */
-    asm volatile ("lcall %1, %2" 
+    asm volatile ("lcall %1, %2"
                   : "=a" (res)
                   : "i" (MK_SEL(1)), "i" (&code16_func1): "memory", "cc");
     printf("func1() = 0x%08x\n", res);
-    asm volatile ("lcall %2, %3" 
+    asm volatile ("lcall %2, %3"
                   : "=a" (res), "=c" (res2)
                   : "i" (MK_SEL(1)), "i" (&code16_func2): "memory", "cc");
     printf("func2() = 0x%08x spdec=%d\n", res, res2);
-    asm volatile ("lcall %1, %2" 
+    asm volatile ("lcall %1, %2"
                   : "=a" (res)
                   : "i" (MK_SEL(1)), "i" (&code16_func3): "memory", "cc");
@@ -1374 +1448 @@
 
 #if defined(__x86_64__)
+#if 0
     {
+        /* XXX: see if Intel Core2 and AMD64 behavior really
+           differ. Here we implemented the Intel way which is not
+           compatible yet with QEMU. */
         static struct __attribute__((packed)) {
-            uint32_t offset;
+            uint64_t offset;
             uint16_t seg;
         } desc;
@@ -1384 +1462 @@
 
         asm volatile ("push %1\n"
-                      "call func_lret\n" 
+                      "call func_lret\n"
                       : "=a" (res)
                       : "r" (cs_sel) : "memory", "cc");
         printf("func_lret=" FMTLX "\n", res);
 
-        /* NOTE: we assume that &func_lret < 4GB */
         desc.offset = (long)&func_lret;
         desc.seg = cs_sel;
-        
+
         asm volatile ("xor %%rax, %%rax\n"
-                      "rex64 lcall %1\n"
+                      "rex64 lcall *(%%rcx)\n"
                       : "=a" (res)
-                      : "m" (desc) 
+                      : "c" (&desc)
                       : "memory", "cc");
         printf("func_lret2=" FMTLX "\n", res);
@@ -1403 +1480 @@
                       "mov $ 1f, %%rax\n"
                       "push %%rax\n"
-                      "ljmp %1\n"
+                      "rex64 ljmp *(%%rcx)\n"
                       "1:\n"
                       : "=a" (res)
-                      : "m" (desc), "b" (cs_sel)
+                      : "c" (&desc), "b" (cs_sel)
                       : "memory", "cc");
         printf("func_lret3=" FMTLX "\n", res);
     }
+#endif
 #else
-    asm volatile ("push %%cs ; call %1" 
+    asm volatile ("push %%cs ; call %1"
                   : "=a" (res)
                   : "m" (func_lret): "memory", "cc");
     printf("func_lret=" FMTLX "\n", res);
 
-    asm volatile ("pushf ; push %%cs ; call %1" 
+    asm volatile ("pushf ; push %%cs ; call %1"
                   : "=a" (res)
                   : "m" (func_iret): "memory", "cc");
@@ -1483 +1561 @@
    TEST_STRING(stos, "rep ");
    TEST_STRING(lods, ""); /* to verify stos */
-   TEST_STRING(lods, "rep "); 
+   TEST_STRING(lods, "rep ");
    TEST_STRING(movs, "");
    TEST_STRING(movs, "rep ");
@@ -1516 +1594 @@
 }
 
-#undef __syscall_return
-#define __syscall_return(type, res) \
-do { \
-        return (type) (res); \
-} while (0)
-
-_syscall2(int, vm86, int, func, struct vm86plus_struct *, v86)
+static inline int vm86(int func, struct vm86plus_struct *v86)
+{
+    return syscall(__NR_vm86, func, v86);
+}
 
 extern char vm86_code_start;
@@ -1537 +1612 @@
     int seg, ret;
 
-    vm86_mem = mmap((void *)0x00000000, 0x110000, 
-                    PROT_WRITE | PROT_READ | PROT_EXEC, 
+    vm86_mem = mmap((void *)0x00000000, 0x110000,
+                    PROT_WRITE | PROT_READ | PROT_EXEC,
                     MAP_FIXED | MAP_ANON | MAP_PRIVATE, -1, 0);
     if (vm86_mem == MAP_FAILED) {
@@ -1561 +1636 @@
     /* move code to proper address. We use the same layout as a .com
        dos program. */
-    memcpy(vm86_mem + (VM86_CODE_CS << 4) + VM86_CODE_IP, 
+    memcpy(vm86_mem + (VM86_CODE_CS << 4) + VM86_CODE_IP,
            &vm86_code_start, &vm86_code_end - &vm86_code_start);
 
@@ -1573 +1648 @@
             {
                 int int_num, ah, v;
-                
+
                 int_num = VM86_ARG(ret);
                 if (int_num != 0x21)
@@ -1676 +1751 @@
     struct sigaction act;
     volatile int val;
-    
+
     act.sa_sigaction = sig_handler;
     sigemptyset(&act.sa_mask);
@@ -1729 +1804 @@
         ldt.useable = 1;
         modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
-        
+
         if (setjmp(jmp_env) == 0) {
             /* segment not present */
@@ -1754 +1829 @@
         v1 = *(char *)0x1234;
     }
-    
+
     /* test illegal instruction reporting */
     printf("UD2 exception:\n");
@@ -1766 +1841 @@
         asm volatile("lock nop");
     }
-    
+
     printf("INT exception:\n");
     if (setjmp(jmp_env) == 0) {
@@ -1838 +1913 @@
                       "orl $0x00100, (%%esp)\n"
                       "popf\n"
-                      "movl $0xabcd, %0\n" 
+                      "movl $0xabcd, %0\n"
                       "movl $0x0, %0\n" : "=m" (val) : : "cc", "memory");
     }
@@ -1869 +1944 @@
                   "orl $0x00100, (%%esp)\n"
                   "popf\n"
-                  "movl $0xabcd, %0\n" 
+                  "movl $0xabcd, %0\n"
 
                   /* jmp test */
@@ -1895 +1970 @@
                   "movl $4, %%ecx\n"
                   "rep cmpsb\n"
-                  
+
                   /* getpid() syscall: single step should skip one
                      instruction */
@@ -1901 +1976 @@
                   "int $0x80\n"
                   "movl $0, %%eax\n"
-                  
+
                   /* when modifying SS, trace is not done on the next
                      instruction */
@@ -1917 +1992 @@
                   "addl $1, %0\n"
                   "movl $1, %%eax\n"
-                  
+
                   "pushf\n"
                   "andl $~0x00100, (%%esp)\n"
                   "popf\n"
-                  : "=m" (val) 
-                  : 
+                  : "=m" (val)
+                  :
                   : "cc", "memory", "eax", "ecx", "esi", "edi");
     printf("val=%d\n", val);
@@ -1935 +2010 @@
 };
 
-asm("smc_code2:\n"
+asm(".section \".data\"\n"
+    "smc_code2:\n"
     "movl 4(%esp), %eax\n"
     "movl %eax, smc_patch_addr2 + 1\n"
@@ -1948 +2024 @@
     "smc_patch_addr2:\n"
     "movl $1, %eax\n"
-    "ret\n");
+    "ret\n"
+    ".previous\n"
+    );
 
 typedef int FuncType(void);
@@ -1955 +2033 @@
 {
     int i;
-
     printf("self modifying code:\n");
     printf("func1 = 0x%x\n", ((FuncType *)code)());
@@ -2037 +2114 @@
 
 typedef int __m64 __attribute__ ((__mode__ (__V2SI__)));
-typedef int __m128 __attribute__ ((__mode__(__V4SF__)));
+typedef float __m128 __attribute__ ((__mode__(__V4SF__)));
 
 typedef union {
@@ -2211 +2288 @@
 
 /* Force %xmm0 usage to avoid the case where both register index are 0
-   to test instruction decoding more extensively */
+   to test intruction decoding more extensively */
 #define CVT_OP_XMM2MMX(op)\
 {\
     asm volatile (#op " %1, %0" : "=y" (r.q[0]) : "x" (a.dq) \
-                  : "%xmm0");\
+                  : "%xmm0"); \
+    asm volatile("emms\n"); \
     printf("%-9s: a=" FMT64X "" FMT64X " r=" FMT64X "\n",\
            #op,\
@@ -2225 +2303 @@
 {\
     asm volatile (#op " %1, %0" : "=x" (r.dq) : "y" (a.q[0]));\
+    asm volatile("emms\n"); \
     printf("%-9s: a=" FMT64X " r=" FMT64X "" FMT64X "\n",\
            #op,\
@@ -2293 +2372 @@
         " fxsave %1\n"
         " fninit\n"
-        : "=m" (*(uint32_t *)fp2), "=m" (*(uint32_t *)fp) 
+        : "=m" (*(uint32_t *)fp2), "=m" (*(uint32_t *)fp)
         : "m" (a), "m" (b));
     printf("fpuc=%04x\n", fp->fpuc);
@@ -2300 +2379 @@
     for(i = 0; i < 3; i++) {
         printf("ST%d: " FMT64X " %04x\n",
-               i, 
+               i,
                *(uint64_t *)&fp->fpregs1[i * 16],
                *(uint16_t *)&fp->fpregs1[i * 16 + 8]);
@@ -2312 +2391 @@
     for(i = 0; i < nb_xmm; i++) {
         printf("xmm%d: " FMT64X "" FMT64X "\n",
-               i, 
+               i,
                *(uint64_t *)&fp->xmm_regs[i * 16],
                *(uint64_t *)&fp->xmm_regs[i * 16 + 8]);
@@ -2352 +2431 @@
     MMX_OP2(pmulhuw);
     MMX_OP2(pmulhw);
-    
+
     MMX_OP2(psubsb);
     MMX_OP2(psubsw);
@@ -2391 +2470 @@
     asm volatile ("pmovmskb %1, %0" : "=r" (r.l[0]) : "y" (a.q[0]));
     printf("%-9s: r=%08x\n", "pmovmskb", r.l[0]);
-    
+
     asm volatile ("pmovmskb %1, %0" : "=r" (r.l[0]) : "x" (a.dq));
     printf("%-9s: r=%08x\n", "pmovmskb", r.l[0]);
@@ -2403 +2482 @@
         b.q[0] = test_values[1][0];
         b.q[1] = test_values[1][1];
-        asm volatile("maskmovq %1, %0" : 
+        asm volatile("maskmovq %1, %0" :
                      : "y" (a.q[0]), "y" (b.q[0]), "D" (&r)
-                     : "memory"); 
-        printf("%-9s: r=" FMT64X " a=" FMT64X " b=" FMT64X "\n", 
-               "maskmov", 
-               r.q[0], 
-               a.q[0], 
+                     : "memory");
+        printf("%-9s: r=" FMT64X " a=" FMT64X " b=" FMT64X "\n",
+               "maskmov",
+               r.q[0],
+               a.q[0],
                b.q[0]);
-        asm volatile("maskmovdqu %1, %0" : 
+        asm volatile("maskmovdqu %1, %0" :
                      : "x" (a.dq), "x" (b.dq), "D" (&r)
-                     : "memory"); 
-        printf("%-9s: r=" FMT64X "" FMT64X " a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X "\n", 
-               "maskmov", 
-               r.q[1], r.q[0], 
-               a.q[1], a.q[0], 
+                     : "memory");
+        printf("%-9s: r=" FMT64X "" FMT64X " a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X "\n",
+               "maskmov",
+               r.q[1], r.q[0],
+               a.q[1], a.q[0],
                b.q[1], b.q[0]);
     }
@@ -2517 +2596 @@
         SSE_OPS(cmpnle);
         SSE_OPS(cmpord);
-        
-        
+
+
         a.d[0] = 2.7;
         a.d[1] = -3.4;
@@ -2594 +2673 @@
 #endif
 
+#define TEST_CONV_RAX(op)\
+{\
+    unsigned long a, r;\
+    a = i2l(0x8234a6f8);\
+    r = a;\
+    asm volatile(#op : "=a" (r) : "0" (r));\
+    printf("%-10s A=" FMTLX " R=" FMTLX "\n", #op, a, r);\
+}
+
+#define TEST_CONV_RAX_RDX(op)\
+{\
+    unsigned long a, d, r, rh;                   \
+    a = i2l(0x8234a6f8);\
+    d = i2l(0x8345a1f2);\
+    r = a;\
+    rh = d;\
+    asm volatile(#op : "=a" (r), "=d" (rh) : "0" (r), "1" (rh));   \
+    printf("%-10s A=" FMTLX " R=" FMTLX ":" FMTLX "\n", #op, a, r, rh);  \
+}
+
+void test_conv(void)
+{
+    TEST_CONV_RAX(cbw);
+    TEST_CONV_RAX(cwde);
+#if defined(__x86_64__)
+    TEST_CONV_RAX(cdqe);
+#endif
+
+    TEST_CONV_RAX_RDX(cwd);
+    TEST_CONV_RAX_RDX(cdq);
+#if defined(__x86_64__)
+    TEST_CONV_RAX_RDX(cqo);
+#endif
+
+    {
+        unsigned long a, r;
+        a = i2l(0x12345678);
+        asm volatile("bswapl %k0" : "=r" (r) : "0" (a));
+        printf("%-10s: A=" FMTLX " R=" FMTLX "\n", "bswapl", a, r);
+    }
+#if defined(__x86_64__)
+    {
+        unsigned long a, r;
+        a = i2l(0x12345678);
+        asm volatile("bswapq %0" : "=r" (r) : "0" (a));
+        printf("%-10s: A=" FMTLX " R=" FMTLX "\n", "bswapq", a, r);
+    }
+#endif
+}
+
 extern void *__start_initcall;
 extern void *__stop_initcall;
@@ -2611 +2740 @@
     test_mul();
     test_jcc();
+    test_loop();
     test_floats();
 #if !defined(__x86_64__)
@@ -2626 +2756 @@
     test_vm86();
 #endif
+#if !defined(__x86_64__)
     test_exceptions();
-#if !defined(__x86_64__)
     test_self_modifying_code();
     test_single_step();
 #endif
     test_enter();
+    test_conv();
 #ifdef TEST_SSE
     test_sse();

trunk/src/recompiler/tests/test_path.c

@@ -150 +150 @@
     return 0;
 }
-        
+