Changeset 36170 in vbox for trunk/src/recompiler/target-i386

Timestamp:

Mar 4, 2011 12:49:02 PM (14 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

70361

Message:

rem: synced up to ​svn://svn.savannah.nongnu.org/qemu/trunk@6686 (repo UUID c046a42c-6fe2-441c-8c8c-71466251a162).

Location:

trunk/src/recompiler/target-i386

Files:

• cpu.h (modified) (19 diffs)
• exec.h (modified) (4 diffs)
• helper.c (modified) (17 diffs)
• helper.h (modified) (3 diffs)
• helper_template.h (modified) (3 diffs)
• op_helper.c (modified) (92 diffs)
• ops_sse.h (modified) (17 diffs)
• ops_sse_header.h (modified) (6 diffs)
• translate.c (modified) (198 diffs)

trunk/src/recompiler/target-i386/cpu.h

@@ -16 +16 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA  02110-1301 USA
  */
 
@@ -179 +179 @@
 #define HF_EM_MASK           (1 << HF_EM_SHIFT)
 #define HF_TS_MASK           (1 << HF_TS_SHIFT)
+#define HF_IOPL_MASK         (3 << HF_IOPL_SHIFT)
 #define HF_LMA_MASK          (1 << HF_LMA_SHIFT)
 #define HF_CS64_MASK         (1 << HF_CS64_SHIFT)
 #define HF_OSFXSR_MASK       (1 << HF_OSFXSR_SHIFT)
+#define HF_VM_MASK           (1 << HF_VM_SHIFT)
 #define HF_SMM_MASK          (1 << HF_SMM_SHIFT)
 #define HF_SVME_MASK         (1 << HF_SVME_SHIFT)
@@ -197 +199 @@
 #define HF2_NMI_MASK          (1 << HF2_NMI_SHIFT)
 #define HF2_VINTR_MASK        (1 << HF2_VINTR_SHIFT)
+
+#define CR0_PE_SHIFT 0
+#define CR0_MP_SHIFT 1
 
 #define CR0_PE_MASK  (1 << 0)
@@ -216 +221 @@
 #define CR4_PGE_MASK  (1 << 7)
 #define CR4_PCE_MASK  (1 << 8)
-#define CR4_OSFXSR_MASK (1 << 9)
+#define CR4_OSFXSR_SHIFT 9
+#define CR4_OSFXSR_MASK (1 << CR4_OSFXSR_SHIFT)
 #define CR4_OSXMMEXCPT_MASK  (1 << 10)
+
+#define DR6_BD          (1 << 13)
+#define DR6_BS          (1 << 14)
+#define DR6_BT          (1 << 15)
+#define DR6_FIXED_1     0xffff0ff0
+
+#define DR7_GD          (1 << 13)
+#define DR7_TYPE_SHIFT  16
+#define DR7_LEN_SHIFT   18
+#define DR7_FIXED_1     0x00000400
 
 #define PG_PRESENT_BIT  0
@@ -249 +265 @@
 #define PG_ERROR_I_D_MASK  0x10
 
+#define MSR_IA32_TSC                    0x10
 #define MSR_IA32_APICBASE               0x1b
 #define MSR_IA32_APICBASE_BSP           (1<<8)
@@ -254 +271 @@
 #define MSR_IA32_APICBASE_BASE          (0xfffff<<12)
 
+#define MSR_MTRRcap                     0xfe
+#define MSR_MTRRcap_VCNT                8
+#define MSR_MTRRcap_FIXRANGE_SUPPORT    (1 << 8)
+#define MSR_MTRRcap_WC_SUPPORTED        (1 << 10)
+
 #define MSR_IA32_SYSENTER_CS            0x174
 #define MSR_IA32_SYSENTER_ESP           0x175
@@ -264 +286 @@
 #define MSR_IA32_PERF_STATUS            0x198
 
+#define MSR_MTRRphysBase(reg)           (0x200 + 2 * (reg))
+#define MSR_MTRRphysMask(reg)           (0x200 + 2 * (reg) + 1)
+
+#define MSR_MTRRfix64K_00000            0x250
+#define MSR_MTRRfix16K_80000            0x258
+#define MSR_MTRRfix16K_A0000            0x259
+#define MSR_MTRRfix4K_C0000             0x268
+#define MSR_MTRRfix4K_C8000             0x269
+#define MSR_MTRRfix4K_D0000             0x26a
+#define MSR_MTRRfix4K_D8000             0x26b
+#define MSR_MTRRfix4K_E0000             0x26c
+#define MSR_MTRRfix4K_E8000             0x26d
+#define MSR_MTRRfix4K_F0000             0x26e
+#define MSR_MTRRfix4K_F8000             0x26f
+
 #define MSR_PAT                         0x277
+
+#define MSR_MTRRdefType                 0x2ff
 
 #define MSR_EFER                        0xc0000080
@@ -380 +419 @@
 
 #define EXCP00_DIVZ     0
-#define EXCP01_SSTP     1
+#define EXCP01_DB       1
 #define EXCP02_NMI      2
 #define EXCP03_INT3     3
@@ -618 +657 @@
 #endif
 
+    uint64_t tsc;
+
     uint64_t pat;
 
@@ -625 +666 @@
     target_ulong exception_next_eip;
     target_ulong dr[8]; /* debug registers */
+    union {
+        CPUBreakpoint *cpu_breakpoint[4];
+        CPUWatchpoint *cpu_watchpoint[4];
+    }; /* break/watchpoints for dr[0..3] */
     uint32_t smbase;
     int old_exception;  /* exception in flight */
@@ -662 +707 @@
 
 #ifndef VBOX
+    /* MTRRs */
+    uint64_t mtrr_fixed[11];
+    uint64_t mtrr_deftype;
+    struct {
+        uint64_t base;
+        uint64_t mask;
+    } mtrr_var[8];
+
 #ifdef USE_KQEMU
     int kqemu_enabled;
     int last_io_time;
 #endif
+
+    /* For KVM */
+    uint64_t interrupt_bitmap[256 / 64];
+
     /* in order to simplify APIC support, we leave this pointer to the
        user */
@@ -874 +931 @@
 }
 
+/* op_helper.c */
 /* used for debug or cpu save/restore */
 void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, CPU86_LDouble f);
 CPU86_LDouble cpu_set_fp80(uint64_t mant, uint16_t upper);
 
+/* cpu-exec.c */
 /* the following helpers are only usable in user mode simulation as
    they can trigger unexpected exceptions */
@@ -889 +948 @@
 int cpu_x86_signal_handler(int host_signum, void *pinfo,
                            void *puc);
+
+/* helper.c */
+int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
+                             int is_write, int mmu_idx, int is_softmmu);
 void cpu_x86_set_a20(CPUX86State *env, int a20_state);
-
-uint64_t cpu_get_tsc(CPUX86State *env);
-
+void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
+                   uint32_t *eax, uint32_t *ebx,
+                   uint32_t *ecx, uint32_t *edx);
+
+static inline int hw_breakpoint_enabled(unsigned long dr7, int index)
+{
+    return (dr7 >> (index * 2)) & 3;
+}
+
+static inline int hw_breakpoint_type(unsigned long dr7, int index)
+{
+    return (dr7 >> (DR7_TYPE_SHIFT + (index * 2))) & 3;
+}
+
+static inline int hw_breakpoint_len(unsigned long dr7, int index)
+{
+    int len = ((dr7 >> (DR7_LEN_SHIFT + (index * 2))) & 3);
+    return (len == 2) ? 8 : len + 1;
+}
+
+void hw_breakpoint_insert(CPUX86State *env, int index);
+void hw_breakpoint_remove(CPUX86State *env, int index);
+int check_hw_breakpoints(CPUX86State *env, int force_dr6_update);
+
+/* will be suppressed */
+void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
+void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
+void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
+
+/* hw/apic.c */
 void cpu_set_apic_base(CPUX86State *env, uint64_t val);
 uint64_t cpu_get_apic_base(CPUX86State *env);
@@ -899 +989 @@
 uint8_t cpu_get_apic_tpr(CPUX86State *env);
 #endif
-#ifdef VBOX
-int cpu_rdmsr(CPUX86State *env, uint32_t idMsr, uint64_t *puValue);
-int cpu_wrmsr(CPUX86State *env, uint32_t idMsr, uint64_t uValue);
-#endif
+
+/* hw/pc.c */
 void cpu_smm_update(CPUX86State *env);
-
-/* will be suppressed */
-void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
+uint64_t cpu_get_tsc(CPUX86State *env);
 
 /* used to debug */
@@ -922 +1008 @@
 
 #ifdef VBOX
+int  cpu_rdmsr(CPUX86State *env, uint32_t idMsr, uint64_t *puValue);
+int  cpu_wrmsr(CPUX86State *env, uint32_t idMsr, uint64_t uValue);
 void cpu_trap_raw(CPUX86State *env1);
 
@@ -948 +1036 @@
 #define cpu_list x86_cpu_list
 
-#define CPU_SAVE_VERSION 7
+#define CPU_SAVE_VERSION 8
 
 /* MMU modes definitions */
@@ -959 +1047 @@
 }
 
+/* translate.c */
 void optimize_flags_init(void);
 
@@ -965 +1054 @@
     int (*compute_c)(void);  /* return the C flag */
 } CCTable;
-
-extern CCTable cc_table[];
 
 #if defined(CONFIG_USER_ONLY)
@@ -977 +1064 @@
 #endif
 
-#define CPU_PC_FROM_TB(env, tb) env->eip = tb->pc - tb->cs_base
-
 #include "cpu-all.h"
+#include "exec-all.h"
 
 #include "svm.h"
 
+static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
+{
+    env->eip = tb->pc - tb->cs_base;
+}
+
+static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc,
+                                        target_ulong *cs_base, int *flags)
+{
+    *cs_base = env->segs[R_CS].base;
+    *pc = *cs_base + env->eip;
+    *flags = env->hflags | (env->eflags & (IOPL_MASK | TF_MASK | VM_MASK));
+}
+
 #endif /* CPU_I386_H */

trunk/src/recompiler/target-i386/exec.h

@@ -16 +16 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA  02110-1301 USA
  */
 
@@ -42 +42 @@
 register struct CPUX86State *env asm(AREG0);
 
+#include "qemu-common.h"
 #include "qemu-log.h"
 
@@ -68 +69 @@
 #include "exec-all.h"
 
-void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
-void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
-int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
-                             int is_write, int mmu_idx, int is_softmmu);
-void __hidden cpu_lock(void);
-void __hidden cpu_unlock(void);
+/* op_helper.c */
 void do_interrupt(int intno, int is_int, int error_code,
                   target_ulong next_eip, int is_hw);
 void do_interrupt_user(int intno, int is_int, int error_code,
                        target_ulong next_eip);
-void raise_interrupt(int intno, int is_int, int error_code,
-                     int next_eip_addend);
-void raise_exception_err(int exception_index, int error_code);
-void raise_exception(int exception_index);
+void QEMU_NORETURN raise_exception_err(int exception_index, int error_code);
+void QEMU_NORETURN raise_exception(int exception_index);
 void do_smm_enter(void);
-void __hidden cpu_loop_exit(void);
-
-void OPPROTO op_movl_eflags_T0(void);
-void OPPROTO op_movl_T0_eflags(void);
-#ifdef VBOX
-void OPPROTO op_movl_T0_eflags_vme(void);
-void OPPROTO op_movw_eflags_T0_vme(void);
-void OPPROTO op_cli_vme(void);
-void OPPROTO op_sti_vme(void);
-#endif
 
 /* n must be a constant to be efficient */
@@ -331 +315 @@
 #define FPUC_EM 0x3f
 
-extern const CPU86_LDouble f15rk[7];
-
-void fpu_raise_exception(void);
-void restore_native_fp_state(CPUState *env);
-void save_native_fp_state(CPUState *env);
-
-extern const uint8_t parity_table[256];
-extern const uint8_t rclw_table[32];
-extern const uint8_t rclb_table[32];
-
 static inline uint32_t compute_eflags(void)
 {
-    return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
+    return env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
 }
 

trunk/src/recompiler/target-i386/helper.c

@@ -16 +16 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA  02110-1301 USA
  */
 
@@ -33 +33 @@
 #include <string.h>
 #ifndef VBOX
-# include <inttypes.h>
-# include <signal.h>
-# include <assert.h>
-#endif
+#include <inttypes.h>
+#include <signal.h>
+#include <assert.h>
+#endif /* !VBOX */
 
 #include "cpu.h"
 #include "exec-all.h"
-#include "svm.h"
 #include "qemu-common.h"
+#include "kvm.h"
 
 //#define DEBUG_MMU
-
-static int cpu_x86_register (CPUX86State *env, const char *cpu_model);
 
 #ifndef VBOX
@@ -71 +69 @@
     static const char *ext2_feature_name[] = {
        "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
-       "cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall", "mttr", "pge", "mca", "cmov",
+       "cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall", "mtrr", "pge", "mca", "cmov",
        "pat", "pse36", NULL, NULL /* Linux mp */, "nx" /* Intel xd */, NULL, "mmxext", "mmx",
        "fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp", NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow",
@@ -105 +103 @@
 }
 #endif /* !VBOX */
-
-#ifndef VBOX
-CPUX86State *cpu_x86_init(const char *cpu_model)
-#else
-CPUX86State *cpu_x86_init(CPUX86State *env, const char *cpu_model)
-#endif
-{
-#ifndef VBOX
-    CPUX86State *env;
-#endif
-    static int inited;
-
-#ifndef VBOX
-    env = qemu_mallocz(sizeof(CPUX86State));
-    if (!env)
-        return NULL;
-#endif
-    cpu_exec_init(env);
-    env->cpu_model_str = cpu_model;
-
-    /* init various static tables */
-    if (!inited) {
-        inited = 1;
-        optimize_flags_init();
-    }
-    if (cpu_x86_register(env, cpu_model) < 0) {
-        cpu_x86_close(env);
-        return NULL;
-    }
-    cpu_reset(env);
-#ifdef USE_KQEMU
-    kqemu_init(env);
-#endif
-    return env;
-}
 
 typedef struct x86_def_t {
@@ -188 +151 @@
         .xlevel = 0x8000000A,
         .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
+    },
+    {
+        .name = "phenom",
+        .level = 5,
+        .vendor1 = CPUID_VENDOR_AMD_1,
+        .vendor2 = CPUID_VENDOR_AMD_2,
+        .vendor3 = CPUID_VENDOR_AMD_3,
+        .family = 16,
+        .model = 2,
+        .stepping = 3,
+        /* Missing: CPUID_VME, CPUID_HT */
+        .features = PPRO_FEATURES |
+            CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
+            CPUID_PSE36,
+        /* Missing: CPUID_EXT_CX16, CPUID_EXT_POPCNT */
+        .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR,
+        /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
+        .ext2_features = (PPRO_FEATURES & 0x0183F3FF) |
+            CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX |
+            CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT |
+            CPUID_EXT2_FFXSR,
+        /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
+                    CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A,
+                    CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
+                    CPUID_EXT3_OSVW, CPUID_EXT3_IBS */
+        .ext3_features = CPUID_EXT3_SVM,
+        .xlevel = 0x8000001A,
+        .model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
     },
     {
@@ -305 +296 @@
             /* Some CPUs got no CPUID_SEP */
         .ext_features = CPUID_EXT_MONITOR |
-            CPUID_EXT_SSE3 /* PNI */, CPUID_EXT_SSSE3,
+            CPUID_EXT_SSE3 /* PNI */ | CPUID_EXT_SSSE3,
             /* Missing: CPUID_EXT_DSCPL | CPUID_EXT_EST |
              * CPUID_EXT_TM2 | CPUID_EXT_XTPR */
@@ -327 +318 @@
 
     def = NULL;
-    for (i = 0; i < sizeof(x86_defs) / sizeof(x86_def_t); i++) {
+    for (i = 0; i < ARRAY_SIZE(x86_defs); i++) {
         if (strcmp(name, x86_defs[i].name) == 0) {
             def = &x86_defs[i];
@@ -358 +349 @@
                 char *err;
                 model = strtol(val, &err, 10);
-                if (!*val || *err || model < 0 || model > 0xf) {
+                if (!*val || *err || model < 0 || model > 0xff) {
                     fprintf(stderr, "bad numerical value %s\n", val);
                     goto error;
@@ -417 +408 @@
     unsigned int i;
 
-    for (i = 0; i < sizeof(x86_defs) / sizeof(x86_def_t); i++)
+    for (i = 0; i < ARRAY_SIZE(x86_defs); i++)
         (*cpu_fprintf)(f, "x86 %16s\n", x86_defs[i].name);
 }
@@ -439 +430 @@
     }
     env->cpuid_level = def->level;
-    env->cpuid_version = (def->family << 8) | (def->model << 4) | def->stepping;
+    if (def->family > 0x0f)
+        env->cpuid_version = 0xf00 | ((def->family - 0x0f) << 20);
+    else
+        env->cpuid_version = def->family << 8;
+    env->cpuid_version |= ((def->model & 0xf) << 4) | ((def->model >> 4) << 16);
+    env->cpuid_version |= def->stepping;
     env->cpuid_features = def->features;
     env->pat = 0x0007040600070406ULL;
@@ -469 +465 @@
     int i;
 
+    if (qemu_loglevel_mask(CPU_LOG_RESET)) {
+        qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
+        log_cpu_state(env, X86_DUMP_FPU | X86_DUMP_CCOP);
+    }
+
     memset(env, 0, offsetof(CPUX86State, breakpoints));
 
@@ -522 +523 @@
 
     env->mxcsr = 0x1f80;
+
+    memset(env->dr, 0, sizeof(env->dr));
+    env->dr[6] = DR6_FIXED_1;
+    env->dr[7] = DR7_FIXED_1;
+    cpu_breakpoint_remove_all(env, BP_CPU);
+    cpu_watchpoint_remove_all(env, BP_CPU);
 }
 
@@ -596 +603 @@
     char cc_op_name[32];
     static const char *seg_name[6] = { "ES", "CS", "SS", "DS", "FS", "GS" };
+
+    if (kvm_enabled())
+        kvm_arch_get_registers(env);
 
     eflags = env->eflags;
@@ -694 +704 @@
                     env->cr[3],
                     (uint32_t)env->cr[4]);
+        for(i = 0; i < 4; i++)
+            cpu_fprintf(f, "DR%d=%016" PRIx64 " ", i, env->dr[i]);
+        cpu_fprintf(f, "\nDR6=%016" PRIx64 " DR7=%016" PRIx64 "\n",
+                    env->dr[6], env->dr[7]);
     } else
 #endif
@@ -725 +739 @@
                     (uint32_t)env->cr[3],
                     (uint32_t)env->cr[4]);
+        for(i = 0; i < 4; i++)
+            cpu_fprintf(f, "DR%d=%08x ", i, env->dr[i]);
+        cpu_fprintf(f, "\nDR6=%08x DR7=%08x\n", env->dr[6], env->dr[7]);
     }
     if (flags & X86_DUMP_CCOP) {
@@ -899 +916 @@
 }
 
-/* XXX: also flush 4MB pages */
-void cpu_x86_flush_tlb(CPUX86State *env, target_ulong addr)
-{
-    tlb_flush_page(env, addr);
-}
-
 #if defined(CONFIG_USER_ONLY)
 
@@ -1327 +1338 @@
     return paddr;
 }
+
+void hw_breakpoint_insert(CPUState *env, int index)
+{
+    int type, err = 0;
+
+    switch (hw_breakpoint_type(env->dr[7], index)) {
+    case 0:
+        if (hw_breakpoint_enabled(env->dr[7], index))
+            err = cpu_breakpoint_insert(env, env->dr[index], BP_CPU,
+                                        &env->cpu_breakpoint[index]);
+        break;
+    case 1:
+        type = BP_CPU | BP_MEM_WRITE;
+        goto insert_wp;
+    case 2:
+         /* No support for I/O watchpoints yet */
+        break;
+    case 3:
+        type = BP_CPU | BP_MEM_ACCESS;
+    insert_wp:
+        err = cpu_watchpoint_insert(env, env->dr[index],
+                                    hw_breakpoint_len(env->dr[7], index),
+                                    type, &env->cpu_watchpoint[index]);
+        break;
+    }
+    if (err)
+        env->cpu_breakpoint[index] = NULL;
+}
+
+void hw_breakpoint_remove(CPUState *env, int index)
+{
+    if (!env->cpu_breakpoint[index])
+        return;
+    switch (hw_breakpoint_type(env->dr[7], index)) {
+    case 0:
+        if (hw_breakpoint_enabled(env->dr[7], index))
+            cpu_breakpoint_remove_by_ref(env, env->cpu_breakpoint[index]);
+        break;
+    case 1:
+    case 3:
+        cpu_watchpoint_remove_by_ref(env, env->cpu_watchpoint[index]);
+        break;
+    case 2:
+        /* No support for I/O watchpoints yet */
+        break;
+    }
+}
+
+int check_hw_breakpoints(CPUState *env, int force_dr6_update)
+{
+    target_ulong dr6;
+    int reg, type;
+    int hit_enabled = 0;
+
+    dr6 = env->dr[6] & ~0xf;
+    for (reg = 0; reg < 4; reg++) {
+        type = hw_breakpoint_type(env->dr[7], reg);
+        if ((type == 0 && env->dr[reg] == env->eip) ||
+            ((type & 1) && env->cpu_watchpoint[reg] &&
+             (env->cpu_watchpoint[reg]->flags & BP_WATCHPOINT_HIT))) {
+            dr6 |= 1 << reg;
+            if (hw_breakpoint_enabled(env->dr[7], reg))
+                hit_enabled = 1;
+        }
+    }
+    if (hit_enabled || force_dr6_update)
+        env->dr[6] = dr6;
+    return hit_enabled;
+}
+
+static CPUDebugExcpHandler *prev_debug_excp_handler;
+
+void raise_exception(int exception_index);
+
+static void breakpoint_handler(CPUState *env)
+{
+    CPUBreakpoint *bp;
+
+    if (env->watchpoint_hit) {
+        if (env->watchpoint_hit->flags & BP_CPU) {
+            env->watchpoint_hit = NULL;
+            if (check_hw_breakpoints(env, 0))
+                raise_exception(EXCP01_DB);
+            else
+                cpu_resume_from_signal(env, NULL);
+        }
+    } else {
+        TAILQ_FOREACH(bp, &env->breakpoints, entry)
+            if (bp->pc == env->eip) {
+                if (bp->flags & BP_CPU) {
+                    check_hw_breakpoints(env, 1);
+                    raise_exception(EXCP01_DB);
+                }
+                break;
+            }
+    }
+    if (prev_debug_excp_handler)
+        prev_debug_excp_handler(env);
+}
 #endif /* !CONFIG_USER_ONLY */
+
+#ifndef VBOX
+static void host_cpuid(uint32_t function, uint32_t count,
+                       uint32_t *eax, uint32_t *ebx,
+                       uint32_t *ecx, uint32_t *edx)
+{
+#if defined(CONFIG_KVM)
+    uint32_t vec[4];
+
+#ifdef __x86_64__
+    asm volatile("cpuid"
+                 : "=a"(vec[0]), "=b"(vec[1]),
+                   "=c"(vec[2]), "=d"(vec[3])
+                 : "0"(function), "c"(count) : "cc");
+#else
+    asm volatile("pusha \n\t"
+                 "cpuid \n\t"
+                 "mov %%eax, 0(%1) \n\t"
+                 "mov %%ebx, 4(%1) \n\t"
+                 "mov %%ecx, 8(%1) \n\t"
+                 "mov %%edx, 12(%1) \n\t"
+                 "popa"
+                 : : "a"(function), "c"(count), "S"(vec)
+                 : "memory", "cc");
+#endif
+
+    if (eax)
+        *eax = vec[0];
+    if (ebx)
+        *ebx = vec[1];
+    if (ecx)
+        *ecx = vec[2];
+    if (edx)
+        *edx = vec[3];
+#endif
+}
+
+void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
+                   uint32_t *eax, uint32_t *ebx,
+                   uint32_t *ecx, uint32_t *edx)
+{
+    /* test if maximum index reached */
+    if (index & 0x80000000) {
+        if (index > env->cpuid_xlevel)
+            index = env->cpuid_level;
+    } else {
+        if (index > env->cpuid_level)
+            index = env->cpuid_level;
+    }
+
+    switch(index) {
+    case 0:
+        *eax = env->cpuid_level;
+        *ebx = env->cpuid_vendor1;
+        *edx = env->cpuid_vendor2;
+        *ecx = env->cpuid_vendor3;
+
+        /* sysenter isn't supported on compatibility mode on AMD.  and syscall
+         * isn't supported in compatibility mode on Intel.  so advertise the
+         * actuall cpu, and say goodbye to migration between different vendors
+         * is you use compatibility mode. */
+        if (kvm_enabled())
+            host_cpuid(0, 0, NULL, ebx, ecx, edx);
+        break;
+    case 1:
+        *eax = env->cpuid_version;
+        *ebx = (env->cpuid_apic_id << 24) | 8 << 8; /* CLFLUSH size in quad words, Linux wants it. */
+        *ecx = env->cpuid_ext_features;
+        *edx = env->cpuid_features;
+
+        /* "Hypervisor present" bit required for Microsoft SVVP */
+        if (kvm_enabled())
+            *ecx |= (1 << 31);
+        break;
+    case 2:
+        /* cache info: needed for Pentium Pro compatibility */
+        *eax = 1;
+        *ebx = 0;
+        *ecx = 0;
+        *edx = 0x2c307d;
+        break;
+    case 4:
+        /* cache info: needed for Core compatibility */
+        switch (count) {
+            case 0: /* L1 dcache info */
+                *eax = 0x0000121;
+                *ebx = 0x1c0003f;
+                *ecx = 0x000003f;
+                *edx = 0x0000001;
+                break;
+            case 1: /* L1 icache info */
+                *eax = 0x0000122;
+                *ebx = 0x1c0003f;
+                *ecx = 0x000003f;
+                *edx = 0x0000001;
+                break;
+            case 2: /* L2 cache info */
+                *eax = 0x0000143;
+                *ebx = 0x3c0003f;
+                *ecx = 0x0000fff;
+                *edx = 0x0000001;
+                break;
+            default: /* end of info */
+                *eax = 0;
+                *ebx = 0;
+                *ecx = 0;
+                *edx = 0;
+                break;
+        }
+        break;
+    case 5:
+        /* mwait info: needed for Core compatibility */
+        *eax = 0; /* Smallest monitor-line size in bytes */
+        *ebx = 0; /* Largest monitor-line size in bytes */
+        *ecx = CPUID_MWAIT_EMX | CPUID_MWAIT_IBE;
+        *edx = 0;
+        break;
+    case 6:
+        /* Thermal and Power Leaf */
+        *eax = 0;
+        *ebx = 0;
+        *ecx = 0;
+        *edx = 0;
+        break;
+    case 9:
+        /* Direct Cache Access Information Leaf */
+        *eax = 0; /* Bits 0-31 in DCA_CAP MSR */
+        *ebx = 0;
+        *ecx = 0;
+        *edx = 0;
+        break;
+    case 0xA:
+        /* Architectural Performance Monitoring Leaf */
+        *eax = 0;
+        *ebx = 0;
+        *ecx = 0;
+        *edx = 0;
+        break;
+    case 0x80000000:
+        *eax = env->cpuid_xlevel;
+        *ebx = env->cpuid_vendor1;
+        *edx = env->cpuid_vendor2;
+        *ecx = env->cpuid_vendor3;
+        break;
+    case 0x80000001:
+        *eax = env->cpuid_features;
+        *ebx = 0;
+        *ecx = env->cpuid_ext3_features;
+        *edx = env->cpuid_ext2_features;
+
+        if (kvm_enabled()) {
+            uint32_t h_eax, h_edx;
+
+            host_cpuid(index, 0, &h_eax, NULL, NULL, &h_edx);
+
+            /* disable CPU features that the host does not support */
+
+            /* long mode */
+            if ((h_edx & 0x20000000) == 0 /* || !lm_capable_kernel */)
+                *edx &= ~0x20000000;
+            /* syscall */
+            if ((h_edx & 0x00000800) == 0)
+                *edx &= ~0x00000800;
+            /* nx */
+            if ((h_edx & 0x00100000) == 0)
+                *edx &= ~0x00100000;
+
+            /* disable CPU features that KVM cannot support */
+
+            /* svm */
+            *ecx &= ~4UL;
+            /* 3dnow */
+            *edx &= ~0xc0000000;
+        }
+        break;
+    case 0x80000002:
+    case 0x80000003:
+    case 0x80000004:
+        *eax = env->cpuid_model[(index - 0x80000002) * 4 + 0];
+        *ebx = env->cpuid_model[(index - 0x80000002) * 4 + 1];
+        *ecx = env->cpuid_model[(index - 0x80000002) * 4 + 2];
+        *edx = env->cpuid_model[(index - 0x80000002) * 4 + 3];
+        break;
+    case 0x80000005:
+        /* cache info (L1 cache) */
+        *eax = 0x01ff01ff;
+        *ebx = 0x01ff01ff;
+        *ecx = 0x40020140;
+        *edx = 0x40020140;
+        break;
+    case 0x80000006:
+        /* cache info (L2 cache) */
+        *eax = 0;
+        *ebx = 0x42004200;
+        *ecx = 0x02008140;
+        *edx = 0;
+        break;
+    case 0x80000008:
+        /* virtual & phys address size in low 2 bytes. */
+/* XXX: This value must match the one used in the MMU code. */
+        if (env->cpuid_ext2_features & CPUID_EXT2_LM) {
+            /* 64 bit processor */
+#if defined(USE_KQEMU)
+            *eax = 0x00003020;  /* 48 bits virtual, 32 bits physical */
+#else
+/* XXX: The physical address space is limited to 42 bits in exec.c. */
+            *eax = 0x00003028;  /* 48 bits virtual, 40 bits physical */
+#endif
+        } else {
+#if defined(USE_KQEMU)
+            *eax = 0x00000020;  /* 32 bits physical */
+#else
+            if (env->cpuid_features & CPUID_PSE36)
+                *eax = 0x00000024; /* 36 bits physical */
+            else
+                *eax = 0x00000020; /* 32 bits physical */
+#endif
+        }
+        *ebx = 0;
+        *ecx = 0;
+        *edx = 0;
+        break;
+    case 0x8000000A:
+        *eax = 0x00000001; /* SVM Revision */
+        *ebx = 0x00000010; /* nr of ASIDs */
+        *ecx = 0;
+        *edx = 0; /* optional features */
+        break;
+    default:
+        /* reserved values: zero */
+        *eax = 0;
+        *ebx = 0;
+        *ecx = 0;
+        *edx = 0;
+        break;
+    }
+}
+#endif /* !VBOX */
+
+#ifndef VBOX
+CPUX86State *cpu_x86_init(const char *cpu_model)
+#else
+CPUX86State *cpu_x86_init(CPUX86State *env, const char *cpu_model)
+#endif
+{
+#ifndef VBOX
+    CPUX86State *env;
+#endif
+    static int inited;
+
+#ifndef VBOX
+    env = qemu_mallocz(sizeof(CPUX86State));
+#endif
+    cpu_exec_init(env);
+    env->cpu_model_str = cpu_model;
+
+    /* init various static tables */
+    if (!inited) {
+        inited = 1;
+        optimize_flags_init();
+#ifndef CONFIG_USER_ONLY
+        prev_debug_excp_handler =
+            cpu_set_debug_excp_handler(breakpoint_handler);
+#endif
+    }
+    if (cpu_x86_register(env, cpu_model) < 0) {
+        cpu_x86_close(env);
+        return NULL;
+    }
+    cpu_reset(env);
+#ifdef USE_KQEMU
+    kqemu_init(env);
+#endif
+    if (kvm_enabled())
+        kvm_init_vcpu(env);
+    return env;
+}

trunk/src/recompiler/target-i386/helper.h

@@ -1 @@
-#ifndef DEF_HELPER
-#define DEF_HELPER(ret, name, params) ret name params;
-#endif
-
-DEF_HELPER(void, helper_lock, (void))
-DEF_HELPER(void, helper_unlock, (void))
-DEF_HELPER(void, helper_write_eflags, (target_ulong t0, uint32_t update_mask))
-DEF_HELPER(target_ulong, helper_read_eflags, (void))
-#ifdef VBOX
-DEF_HELPER(void, helper_write_eflags_vme, (target_ulong t0))
-DEF_HELPER(target_ulong, helper_read_eflags_vme, (void))
-#endif
-DEF_HELPER(void, helper_divb_AL, (target_ulong t0))
-DEF_HELPER(void, helper_idivb_AL, (target_ulong t0))
-DEF_HELPER(void, helper_divw_AX, (target_ulong t0))
-DEF_HELPER(void, helper_idivw_AX, (target_ulong t0))
-DEF_HELPER(void, helper_divl_EAX, (target_ulong t0))
-DEF_HELPER(void, helper_idivl_EAX, (target_ulong t0))
-#ifdef TARGET_X86_64
-DEF_HELPER(void, helper_mulq_EAX_T0, (target_ulong t0))
-DEF_HELPER(void, helper_imulq_EAX_T0, (target_ulong t0))
-DEF_HELPER(target_ulong, helper_imulq_T0_T1, (target_ulong t0, target_ulong t1))
-DEF_HELPER(void, helper_divq_EAX, (target_ulong t0))
-DEF_HELPER(void, helper_idivq_EAX, (target_ulong t0))
-#endif
-
-DEF_HELPER(void, helper_aam, (int base))
-DEF_HELPER(void, helper_aad, (int base))
-DEF_HELPER(void, helper_aaa, (void))
-DEF_HELPER(void, helper_aas, (void))
-DEF_HELPER(void, helper_daa, (void))
-DEF_HELPER(void, helper_das, (void))
-
-DEF_HELPER(target_ulong, helper_lsl, (target_ulong selector1))
-DEF_HELPER(target_ulong, helper_lar, (target_ulong selector1))
-DEF_HELPER(void, helper_verr, (target_ulong selector1))
-DEF_HELPER(void, helper_verw, (target_ulong selector1))
-DEF_HELPER(void, helper_lldt, (int selector))
-DEF_HELPER(void, helper_ltr, (int selector))
-DEF_HELPER(void, helper_load_seg, (int seg_reg, int selector))
-DEF_HELPER(void, helper_ljmp_protected, (int new_cs, target_ulong new_eip,
-                           int next_eip_addend))
-DEF_HELPER(void, helper_lcall_real, (int new_cs, target_ulong new_eip1,
-                       int shift, int next_eip))
-DEF_HELPER(void, helper_lcall_protected, (int new_cs, target_ulong new_eip,
-                            int shift, int next_eip_addend))
-DEF_HELPER(void, helper_iret_real, (int shift))
-DEF_HELPER(void, helper_iret_protected, (int shift, int next_eip))
-DEF_HELPER(void, helper_lret_protected, (int shift, int addend))
-DEF_HELPER(target_ulong, helper_read_crN, (int reg))
-DEF_HELPER(void, helper_write_crN, (int reg, target_ulong t0))
-DEF_HELPER(void, helper_lmsw, (target_ulong t0))
-DEF_HELPER(void, helper_clts, (void))
-DEF_HELPER(void, helper_movl_drN_T0, (int reg, target_ulong t0))
-DEF_HELPER(void, helper_invlpg, (target_ulong addr))
-
-DEF_HELPER(void, helper_enter_level, (int level, int data32, target_ulong t1))
-#ifdef TARGET_X86_64
-DEF_HELPER(void, helper_enter64_level, (int level, int data64, target_ulong t1))
-#endif
-DEF_HELPER(void, helper_sysenter, (void))
-DEF_HELPER(void, helper_sysexit, (int dflag))
-#ifdef TARGET_X86_64
-DEF_HELPER(void, helper_syscall, (int next_eip_addend))
-DEF_HELPER(void, helper_sysret, (int dflag))
-#endif
-DEF_HELPER(void, helper_hlt, (int next_eip_addend))
-DEF_HELPER(void, helper_monitor, (target_ulong ptr))
-DEF_HELPER(void, helper_mwait, (int next_eip_addend))
-DEF_HELPER(void, helper_debug, (void))
-DEF_HELPER(void, helper_raise_interrupt, (int intno, int next_eip_addend))
-DEF_HELPER(void, helper_raise_exception, (int exception_index))
-DEF_HELPER(void, helper_cli, (void))
-DEF_HELPER(void, helper_sti, (void))
-#ifdef VBOX
-DEF_HELPER(void, helper_cli_vme, (void))
-DEF_HELPER(void, helper_sti_vme, (void))
-#endif
-DEF_HELPER(void, helper_set_inhibit_irq, (void))
-DEF_HELPER(void, helper_reset_inhibit_irq, (void))
-DEF_HELPER(void, helper_boundw, (target_ulong a0, int v))
-DEF_HELPER(void, helper_boundl, (target_ulong a0, int v))
-DEF_HELPER(void, helper_rsm, (void))
-DEF_HELPER(void, helper_into, (int next_eip_addend))
-DEF_HELPER(void, helper_cmpxchg8b, (target_ulong a0))
-#ifdef TARGET_X86_64
-DEF_HELPER(void, helper_cmpxchg16b, (target_ulong a0))
-#endif
-DEF_HELPER(void, helper_single_step, (void))
-DEF_HELPER(void, helper_cpuid, (void))
-DEF_HELPER(void, helper_rdtsc, (void))
-DEF_HELPER(void, helper_rdpmc, (void))
-DEF_HELPER(void, helper_rdmsr, (void))
-DEF_HELPER(void, helper_wrmsr, (void))
-#ifdef VBOX
-DEF_HELPER(void, helper_rdtscp, (void))
-#endif
-
-DEF_HELPER(void, helper_check_iob, (uint32_t t0))
-DEF_HELPER(void, helper_check_iow, (uint32_t t0))
-DEF_HELPER(void, helper_check_iol, (uint32_t t0))
-#ifdef VBOX
-DEF_HELPER(void, helper_check_external_event, (void))
-DEF_HELPER(void, helper_dump_state, (void))
-DEF_HELPER(void, helper_sync_seg, (uint32_t t0))
-#endif
-DEF_HELPER(void, helper_outb, (uint32_t port, uint32_t data))
-DEF_HELPER(target_ulong, helper_inb, (uint32_t port))
-DEF_HELPER(void, helper_outw, (uint32_t port, uint32_t data))
-DEF_HELPER(target_ulong, helper_inw, (uint32_t port))
-DEF_HELPER(void, helper_outl, (uint32_t port, uint32_t data))
-DEF_HELPER(target_ulong, helper_inl, (uint32_t port))
-
-DEF_HELPER(void, helper_svm_check_intercept_param, (uint32_t type, uint64_t param))
-DEF_HELPER(void, helper_vmexit, (uint32_t exit_code, uint64_t exit_info_1))
-DEF_HELPER(void, helper_svm_check_io, (uint32_t port, uint32_t param,
-                         uint32_t next_eip_addend))
-DEF_HELPER(void, helper_vmrun, (int aflag, int next_eip_addend))
-DEF_HELPER(void, helper_vmmcall, (void))
-DEF_HELPER(void, helper_vmload, (int aflag))
-DEF_HELPER(void, helper_vmsave, (int aflag))
-DEF_HELPER(void, helper_stgi, (void))
-DEF_HELPER(void, helper_clgi, (void))
-DEF_HELPER(void, helper_skinit, (void))
-DEF_HELPER(void, helper_invlpga, (int aflag))
+#include "def-helper.h"
+
+DEF_HELPER_FLAGS_1(cc_compute_all, TCG_CALL_PURE, i32, int)
+DEF_HELPER_FLAGS_1(cc_compute_c, TCG_CALL_PURE, i32, int)
+
+DEF_HELPER_0(lock, void)
+DEF_HELPER_0(unlock, void)
+DEF_HELPER_2(write_eflags, void, tl, i32)
+DEF_HELPER_0(read_eflags, tl)
+DEF_HELPER_1(divb_AL, void, tl)
+DEF_HELPER_1(idivb_AL, void, tl)
+DEF_HELPER_1(divw_AX, void, tl)
+DEF_HELPER_1(idivw_AX, void, tl)
+DEF_HELPER_1(divl_EAX, void, tl)
+DEF_HELPER_1(idivl_EAX, void, tl)
+#ifdef TARGET_X86_64
+DEF_HELPER_1(mulq_EAX_T0, void, tl)
+DEF_HELPER_1(imulq_EAX_T0, void, tl)
+DEF_HELPER_2(imulq_T0_T1, tl, tl, tl)
+DEF_HELPER_1(divq_EAX, void, tl)
+DEF_HELPER_1(idivq_EAX, void, tl)
+#endif
+
+DEF_HELPER_1(aam, void, int)
+DEF_HELPER_1(aad, void, int)
+DEF_HELPER_0(aaa, void)
+DEF_HELPER_0(aas, void)
+DEF_HELPER_0(daa, void)
+DEF_HELPER_0(das, void)
+
+DEF_HELPER_1(lsl, tl, tl)
+DEF_HELPER_1(lar, tl, tl)
+DEF_HELPER_1(verr, void, tl)
+DEF_HELPER_1(verw, void, tl)
+DEF_HELPER_1(lldt, void, int)
+DEF_HELPER_1(ltr, void, int)
+DEF_HELPER_2(load_seg, void, int, int)
+DEF_HELPER_3(ljmp_protected, void, int, tl, int)
+DEF_HELPER_4(lcall_real, void, int, tl, int, int)
+DEF_HELPER_4(lcall_protected, void, int, tl, int, int)
+DEF_HELPER_1(iret_real, void, int)
+DEF_HELPER_2(iret_protected, void, int, int)
+DEF_HELPER_2(lret_protected, void, int, int)
+DEF_HELPER_1(read_crN, tl, int)
+DEF_HELPER_2(write_crN, void, int, tl)
+DEF_HELPER_1(lmsw, void, tl)
+DEF_HELPER_0(clts, void)
+DEF_HELPER_2(movl_drN_T0, void, int, tl)
+DEF_HELPER_1(invlpg, void, tl)
+
+DEF_HELPER_3(enter_level, void, int, int, tl)
+#ifdef TARGET_X86_64
+DEF_HELPER_3(enter64_level, void, int, int, tl)
+#endif
+DEF_HELPER_0(sysenter, void)
+DEF_HELPER_1(sysexit, void, int)
+#ifdef TARGET_X86_64
+DEF_HELPER_1(syscall, void, int)
+DEF_HELPER_1(sysret, void, int)
+#endif
+DEF_HELPER_1(hlt, void, int)
+DEF_HELPER_1(monitor, void, tl)
+DEF_HELPER_1(mwait, void, int)
+DEF_HELPER_0(debug, void)
+DEF_HELPER_2(raise_interrupt, void, int, int)
+DEF_HELPER_1(raise_exception, void, int)
+DEF_HELPER_0(cli, void)
+DEF_HELPER_0(sti, void)
+DEF_HELPER_0(set_inhibit_irq, void)
+DEF_HELPER_0(reset_inhibit_irq, void)
+DEF_HELPER_2(boundw, void, tl, int)
+DEF_HELPER_2(boundl, void, tl, int)
+DEF_HELPER_0(rsm, void)
+DEF_HELPER_1(into, void, int)
+DEF_HELPER_1(cmpxchg8b, void, tl)
+#ifdef TARGET_X86_64
+DEF_HELPER_1(cmpxchg16b, void, tl)
+#endif
+DEF_HELPER_0(single_step, void)
+DEF_HELPER_0(cpuid, void)
+DEF_HELPER_0(rdtsc, void)
+DEF_HELPER_0(rdpmc, void)
+DEF_HELPER_0(rdmsr, void)
+DEF_HELPER_0(wrmsr, void)
+
+DEF_HELPER_1(check_iob, void, i32)
+DEF_HELPER_1(check_iow, void, i32)
+DEF_HELPER_1(check_iol, void, i32)
+DEF_HELPER_2(outb, void, i32, i32)
+DEF_HELPER_1(inb, tl, i32)
+DEF_HELPER_2(outw, void, i32, i32)
+DEF_HELPER_1(inw, tl, i32)
+DEF_HELPER_2(outl, void, i32, i32)
+DEF_HELPER_1(inl, tl, i32)
+
+DEF_HELPER_2(svm_check_intercept_param, void, i32, i64)
+DEF_HELPER_2(vmexit, void, i32, i64)
+DEF_HELPER_3(svm_check_io, void, i32, i32, i32)
+DEF_HELPER_2(vmrun, void, int, int)
+DEF_HELPER_0(vmmcall, void)
+DEF_HELPER_1(vmload, void, int)
+DEF_HELPER_1(vmsave, void, int)
+DEF_HELPER_0(stgi, void)
+DEF_HELPER_0(clgi, void)
+DEF_HELPER_0(skinit, void)
+DEF_HELPER_1(invlpga, void, int)
 
 /* x86 FPU */
 
-DEF_HELPER(void, helper_flds_FT0, (uint32_t val))
-DEF_HELPER(void, helper_fldl_FT0, (uint64_t val))
-DEF_HELPER(void, helper_fildl_FT0, (int32_t val))
-DEF_HELPER(void, helper_flds_ST0, (uint32_t val))
-DEF_HELPER(void, helper_fldl_ST0, (uint64_t val))
-DEF_HELPER(void, helper_fildl_ST0, (int32_t val))
-DEF_HELPER(void, helper_fildll_ST0, (int64_t val))
+DEF_HELPER_1(flds_FT0, void, i32)
+DEF_HELPER_1(fldl_FT0, void, i64)
+DEF_HELPER_1(fildl_FT0, void, s32)
+DEF_HELPER_1(flds_ST0, void, i32)
+DEF_HELPER_1(fldl_ST0, void, i64)
+DEF_HELPER_1(fildl_ST0, void, s32)
+DEF_HELPER_1(fildll_ST0, void, s64)
 #ifndef VBOX
-DEF_HELPER(uint32_t, helper_fsts_ST0, (void))
-DEF_HELPER(uint64_t, helper_fstl_ST0, (void))
-DEF_HELPER(int32_t, helper_fist_ST0, (void))
-DEF_HELPER(int32_t, helper_fistl_ST0, (void))
-DEF_HELPER(int64_t, helper_fistll_ST0, (void))
-DEF_HELPER(int32_t, helper_fistt_ST0, (void))
-DEF_HELPER(int32_t, helper_fisttl_ST0, (void))
-DEF_HELPER(int64_t, helper_fisttll_ST0, (void))
+DEF_HELPER_0(fsts_ST0, i32)
+DEF_HELPER_0(fstl_ST0, i64)
+DEF_HELPER_0(fist_ST0, s32)
+DEF_HELPER_0(fistl_ST0, s32)
+DEF_HELPER_0(fistll_ST0, s64)
+DEF_HELPER_0(fistt_ST0, s32)
+DEF_HELPER_0(fisttl_ST0, s32)
+DEF_HELPER_0(fisttll_ST0, s64)
 #else  /* VBOX */
-DEF_HELPER(RTCCUINTREG, helper_fsts_ST0, (void))
-DEF_HELPER(uint64_t, helper_fstl_ST0, (void))
-DEF_HELPER(RTCCINTREG, helper_fist_ST0, (void))
-DEF_HELPER(RTCCINTREG, helper_fistl_ST0, (void))
-DEF_HELPER(int64_t, helper_fistll_ST0, (void))
-DEF_HELPER(RTCCINTREG, helper_fistt_ST0, (void))
-DEF_HELPER(RTCCINTREG, helper_fisttl_ST0, (void))
-DEF_HELPER(int64_t, helper_fisttll_ST0, (void))
+DEF_HELPER_0(fsts_ST0, RTCCUINTREG)
+DEF_HELPER_0(fstl_ST0, i64)
+DEF_HELPER_0(fist_ST0, RTCCINTREG)
+DEF_HELPER_0(fistl_ST0, RTCCINTREG)
+DEF_HELPER_0(fistll_ST0, s64)
+DEF_HELPER_0(fistt_ST0, RTCCINTREG)
+DEF_HELPER_0(fisttl_ST0, RTCCINTREG)
+DEF_HELPER_0(fisttll_ST0, s64)
 #endif /* VBOX */
-DEF_HELPER(void, helper_fldt_ST0, (target_ulong ptr))
-DEF_HELPER(void, helper_fstt_ST0, (target_ulong ptr))
-DEF_HELPER(void, helper_fpush, (void))
-DEF_HELPER(void, helper_fpop, (void))
-DEF_HELPER(void, helper_fdecstp, (void))
-DEF_HELPER(void, helper_fincstp, (void))
-DEF_HELPER(void, helper_ffree_STN, (int st_index))
-DEF_HELPER(void, helper_fmov_ST0_FT0, (void))
-DEF_HELPER(void, helper_fmov_FT0_STN, (int st_index))
-DEF_HELPER(void, helper_fmov_ST0_STN, (int st_index))
-DEF_HELPER(void, helper_fmov_STN_ST0, (int st_index))
-DEF_HELPER(void, helper_fxchg_ST0_STN, (int st_index))
-DEF_HELPER(void, helper_fcom_ST0_FT0, (void))
-DEF_HELPER(void, helper_fucom_ST0_FT0, (void))
-DEF_HELPER(void, helper_fcomi_ST0_FT0, (void))
-DEF_HELPER(void, helper_fucomi_ST0_FT0, (void))
-DEF_HELPER(void, helper_fadd_ST0_FT0, (void))
-DEF_HELPER(void, helper_fmul_ST0_FT0, (void))
-DEF_HELPER(void, helper_fsub_ST0_FT0, (void))
-DEF_HELPER(void, helper_fsubr_ST0_FT0, (void))
-DEF_HELPER(void, helper_fdiv_ST0_FT0, (void))
-DEF_HELPER(void, helper_fdivr_ST0_FT0, (void))
-DEF_HELPER(void, helper_fadd_STN_ST0, (int st_index))
-DEF_HELPER(void, helper_fmul_STN_ST0, (int st_index))
-DEF_HELPER(void, helper_fsub_STN_ST0, (int st_index))
-DEF_HELPER(void, helper_fsubr_STN_ST0, (int st_index))
-DEF_HELPER(void, helper_fdiv_STN_ST0, (int st_index))
-DEF_HELPER(void, helper_fdivr_STN_ST0, (int st_index))
-DEF_HELPER(void, helper_fchs_ST0, (void))
-DEF_HELPER(void, helper_fabs_ST0, (void))
-DEF_HELPER(void, helper_fxam_ST0, (void))
-DEF_HELPER(void, helper_fld1_ST0, (void))
-DEF_HELPER(void, helper_fldl2t_ST0, (void))
-DEF_HELPER(void, helper_fldl2e_ST0, (void))
-DEF_HELPER(void, helper_fldpi_ST0, (void))
-DEF_HELPER(void, helper_fldlg2_ST0, (void))
-DEF_HELPER(void, helper_fldln2_ST0, (void))
-DEF_HELPER(void, helper_fldz_ST0, (void))
-DEF_HELPER(void, helper_fldz_FT0, (void))
+DEF_HELPER_1(fldt_ST0, void, tl)
+DEF_HELPER_1(fstt_ST0, void, tl)
+DEF_HELPER_0(fpush, void)
+DEF_HELPER_0(fpop, void)
+DEF_HELPER_0(fdecstp, void)
+DEF_HELPER_0(fincstp, void)
+DEF_HELPER_1(ffree_STN, void, int)
+DEF_HELPER_0(fmov_ST0_FT0, void)
+DEF_HELPER_1(fmov_FT0_STN, void, int)
+DEF_HELPER_1(fmov_ST0_STN, void, int)
+DEF_HELPER_1(fmov_STN_ST0, void, int)
+DEF_HELPER_1(fxchg_ST0_STN, void, int)
+DEF_HELPER_0(fcom_ST0_FT0, void)
+DEF_HELPER_0(fucom_ST0_FT0, void)
+DEF_HELPER_0(fcomi_ST0_FT0, void)
+DEF_HELPER_0(fucomi_ST0_FT0, void)
+DEF_HELPER_0(fadd_ST0_FT0, void)
+DEF_HELPER_0(fmul_ST0_FT0, void)
+DEF_HELPER_0(fsub_ST0_FT0, void)
+DEF_HELPER_0(fsubr_ST0_FT0, void)
+DEF_HELPER_0(fdiv_ST0_FT0, void)
+DEF_HELPER_0(fdivr_ST0_FT0, void)
+DEF_HELPER_1(fadd_STN_ST0, void, int)
+DEF_HELPER_1(fmul_STN_ST0, void, int)
+DEF_HELPER_1(fsub_STN_ST0, void, int)
+DEF_HELPER_1(fsubr_STN_ST0, void, int)
+DEF_HELPER_1(fdiv_STN_ST0, void, int)
+DEF_HELPER_1(fdivr_STN_ST0, void, int)
+DEF_HELPER_0(fchs_ST0, void)
+DEF_HELPER_0(fabs_ST0, void)
+DEF_HELPER_0(fxam_ST0, void)
+DEF_HELPER_0(fld1_ST0, void)
+DEF_HELPER_0(fldl2t_ST0, void)
+DEF_HELPER_0(fldl2e_ST0, void)
+DEF_HELPER_0(fldpi_ST0, void)
+DEF_HELPER_0(fldlg2_ST0, void)
+DEF_HELPER_0(fldln2_ST0, void)
+DEF_HELPER_0(fldz_ST0, void)
+DEF_HELPER_0(fldz_FT0, void)
 #ifndef VBOX
-DEF_HELPER(uint32_t, helper_fnstsw, (void))
-DEF_HELPER(uint32_t, helper_fnstcw, (void))
+DEF_HELPER_0(fnstsw, i32)
+DEF_HELPER_0(fnstcw, i32)
 #else  /* VBOX */
-DEF_HELPER(RTCCUINTREG, helper_fnstsw, (void))
-DEF_HELPER(RTCCUINTREG, helper_fnstcw, (void))
+DEF_HELPER_0(fnstsw, RTCCUINTREG)
+DEF_HELPER_0(fnstcw, RTCCUINTREG)
 #endif /* VBOX */
-DEF_HELPER(void, helper_fldcw, (uint32_t val))
-DEF_HELPER(void, helper_fclex, (void))
-DEF_HELPER(void, helper_fwait, (void))
-DEF_HELPER(void, helper_fninit, (void))
-DEF_HELPER(void, helper_fbld_ST0, (target_ulong ptr))
-DEF_HELPER(void, helper_fbst_ST0, (target_ulong ptr))
-DEF_HELPER(void, helper_f2xm1, (void))
-DEF_HELPER(void, helper_fyl2x, (void))
-DEF_HELPER(void, helper_fptan, (void))
-DEF_HELPER(void, helper_fpatan, (void))
-DEF_HELPER(void, helper_fxtract, (void))
-DEF_HELPER(void, helper_fprem1, (void))
-DEF_HELPER(void, helper_fprem, (void))
-DEF_HELPER(void, helper_fyl2xp1, (void))
-DEF_HELPER(void, helper_fsqrt, (void))
-DEF_HELPER(void, helper_fsincos, (void))
-DEF_HELPER(void, helper_frndint, (void))
-DEF_HELPER(void, helper_fscale, (void))
-DEF_HELPER(void, helper_fsin, (void))
-DEF_HELPER(void, helper_fcos, (void))
-DEF_HELPER(void, helper_fstenv, (target_ulong ptr, int data32))
-DEF_HELPER(void, helper_fldenv, (target_ulong ptr, int data32))
-DEF_HELPER(void, helper_fsave, (target_ulong ptr, int data32))
-DEF_HELPER(void, helper_frstor, (target_ulong ptr, int data32))
-DEF_HELPER(void, helper_fxsave, (target_ulong ptr, int data64))
-DEF_HELPER(void, helper_fxrstor, (target_ulong ptr, int data64))
-DEF_HELPER(target_ulong, helper_bsf, (target_ulong t0))
-DEF_HELPER(target_ulong, helper_bsr, (target_ulong t0))
+DEF_HELPER_1(fldcw, void, i32)
+DEF_HELPER_0(fclex, void)
+DEF_HELPER_0(fwait, void)
+DEF_HELPER_0(fninit, void)
+DEF_HELPER_1(fbld_ST0, void, tl)
+DEF_HELPER_1(fbst_ST0, void, tl)
+DEF_HELPER_0(f2xm1, void)
+DEF_HELPER_0(fyl2x, void)
+DEF_HELPER_0(fptan, void)
+DEF_HELPER_0(fpatan, void)
+DEF_HELPER_0(fxtract, void)
+DEF_HELPER_0(fprem1, void)
+DEF_HELPER_0(fprem, void)
+DEF_HELPER_0(fyl2xp1, void)
+DEF_HELPER_0(fsqrt, void)
+DEF_HELPER_0(fsincos, void)
+DEF_HELPER_0(frndint, void)
+DEF_HELPER_0(fscale, void)
+DEF_HELPER_0(fsin, void)
+DEF_HELPER_0(fcos, void)
+DEF_HELPER_2(fstenv, void, tl, int)
+DEF_HELPER_2(fldenv, void, tl, int)
+DEF_HELPER_2(fsave, void, tl, int)
+DEF_HELPER_2(frstor, void, tl, int)
+DEF_HELPER_2(fxsave, void, tl, int)
+DEF_HELPER_2(fxrstor, void, tl, int)
+DEF_HELPER_1(bsf, tl, tl)
+DEF_HELPER_1(bsr, tl, tl)
 
 /* MMX/SSE */
 
-DEF_HELPER(void, helper_enter_mmx, (void))
-DEF_HELPER(void, helper_emms, (void))
-DEF_HELPER(void, helper_movq, (uint64_t *d, uint64_t *s))
+DEF_HELPER_0(enter_mmx, void)
+DEF_HELPER_0(emms, void)
+DEF_HELPER_2(movq, void, ptr, ptr)
 
 #define SHIFT 0
@@ -239 +220 @@
 #include "ops_sse_header.h"
 
-DEF_HELPER(target_ulong, helper_rclb, (target_ulong t0, target_ulong t1))
-DEF_HELPER(target_ulong, helper_rclw, (target_ulong t0, target_ulong t1))
-DEF_HELPER(target_ulong, helper_rcll, (target_ulong t0, target_ulong t1))
-DEF_HELPER(target_ulong, helper_rcrb, (target_ulong t0, target_ulong t1))
-DEF_HELPER(target_ulong, helper_rcrw, (target_ulong t0, target_ulong t1))
-DEF_HELPER(target_ulong, helper_rcrl, (target_ulong t0, target_ulong t1))
-#ifdef TARGET_X86_64
-DEF_HELPER(target_ulong, helper_rclq, (target_ulong t0, target_ulong t1))
-DEF_HELPER(target_ulong, helper_rcrq, (target_ulong t0, target_ulong t1))
+DEF_HELPER_2(rclb, tl, tl, tl)
+DEF_HELPER_2(rclw, tl, tl, tl)
+DEF_HELPER_2(rcll, tl, tl, tl)
+DEF_HELPER_2(rcrb, tl, tl, tl)
+DEF_HELPER_2(rcrw, tl, tl, tl)
+DEF_HELPER_2(rcrl, tl, tl, tl)
+#ifdef TARGET_X86_64
+DEF_HELPER_2(rclq, tl, tl, tl)
+DEF_HELPER_2(rcrq, tl, tl, tl)
 #endif
 
 #ifdef VBOX
+DEF_HELPER_1(write_eflags_vme, void, tl)
+DEF_HELPER_0(read_eflags_vme, tl)
+DEF_HELPER_0(cli_vme, void)
+DEF_HELPER_0(sti_vme, void)
+DEF_HELPER_0(rdtscp, void)
+DEF_HELPER_0(check_external_event, void)
+DEF_HELPER_0(dump_state, void)
+DEF_HELPER_1(sync_seg, void, i32)
+
 void helper_external_event(void);
 void helper_record_call(void);
@@ -259 +249 @@
 #endif /* VBOX */
 
-#undef DEF_HELPER
+#include "def-helper.h"

trunk/src/recompiler/target-i386/helper_template.h

@@ -16 +16 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA  02110-1301 USA
  */
 
@@ -291 +291 @@
 #endif
     if (count) {
-        eflags = cc_table[CC_OP].compute_all();
+        eflags = helper_cc_compute_all(CC_OP);
         t0 &= DATA_MASK;
         src = t0;
@@ -320 +320 @@
 #endif
     if (count) {
-        eflags = cc_table[CC_OP].compute_all();
+        eflags = helper_cc_compute_all(CC_OP);
         t0 &= DATA_MASK;
         src = t0;

trunk/src/recompiler/target-i386/op_helper.c

@@ -16 +16 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA  02110-1301 USA
  */
 
@@ -30 +30 @@
 #define CPU_NO_GLOBAL_REGS
 #include "exec.h"
+#include "exec-all.h"
 #include "host-utils.h"
 
@@ -39 +40 @@
 //#define DEBUG_PCALL
 
+
+#ifdef DEBUG_PCALL
+#  define LOG_PCALL(...) qemu_log_mask(CPU_LOG_PCALL, ## __VA_ARGS__)
+#  define LOG_PCALL_STATE(env) \
+          log_cpu_state_mask(CPU_LOG_PCALL, (env), X86_DUMP_CCOP)
+#else
+#  define LOG_PCALL(...) do { } while (0)
+#  define LOG_PCALL_STATE(env) do { } while (0)
+#endif
+
+
 #if 0
 #define raise_exception_err(a, b)\
 do {\
-    if (logfile)\
-        fprintf(logfile, "raise_exception line=%d\n", __LINE__);\
+    qemu_log("raise_exception line=%d\n", __LINE__);\
     (raise_exception_err)(a, b);\
 } while (0)
 #endif
 
-const uint8_t parity_table[256] = {
+static const uint8_t parity_table[256] = {
     CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
     0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
@@ -84 +95 @@
 
 /* modulo 17 table */
-const uint8_t rclw_table[32] = {
+static const uint8_t rclw_table[32] = {
     0, 1, 2, 3, 4, 5, 6, 7,
     8, 9,10,11,12,13,14,15,
@@ -92 +103 @@
 
 /* modulo 9 table */
-const uint8_t rclb_table[32] = {
+static const uint8_t rclb_table[32] = {
     0, 1, 2, 3, 4, 5, 6, 7,
     8, 0, 1, 2, 3, 4, 5, 6,
@@ -99 +110 @@
 };
 
-const CPU86_LDouble f15rk[7] =
+static const CPU86_LDouble f15rk[7] =
 {
     0.00000000000000000000L,
@@ -112 +123 @@
 /* broken thread support */
 
-spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED;
+static spinlock_t global_cpu_lock = SPIN_LOCK_UNLOCKED;
 
 void helper_lock(void)
@@ -132 +143 @@
 {
     uint32_t eflags;
-    eflags = cc_table[CC_OP].compute_all();
+    eflags = helper_cc_compute_all(CC_OP);
     eflags |= (DF & DF_MASK);
     eflags |= env->eflags & ~(VM_MASK | RF_MASK);
@@ -166 +177 @@
 {
     uint32_t eflags;
-    eflags = cc_table[CC_OP].compute_all();
+    eflags = helper_cc_compute_all(CC_OP);
     eflags |= (DF & DF_MASK);
     eflags |= env->eflags & ~(VM_MASK | RF_MASK);
@@ -308 +319 @@
 
 #ifdef VBOX
-    e1 = e2 = 0;
+    e1 = e2 = 0; /* gcc warning? */
     cpl = env->hflags & HF_CPL_MASK;
     /* Trying to load a selector with CPL=1? */
@@ -392 +403 @@
 
     type = (e2 >> DESC_TYPE_SHIFT) & 0xf;
-#ifdef DEBUG_PCALL
-    if (loglevel & CPU_LOG_PCALL)
-        fprintf(logfile, "switch_tss: sel=0x%04x type=%d src=%d\n", tss_selector, type, source);
-#endif
-
-#if defined(VBOX) && defined(DEBUG)
-    printf("switch_tss %x %x %x %d %08x\n", tss_selector, e1, e2, source, next_eip);
-#endif
+    LOG_PCALL("switch_tss: sel=0x%04x type=%d src=%d\n", tss_selector, type, source);
 
     /* if task gate, we read the TSS segment and we load it */
@@ -628 +632 @@
         raise_exception_err(EXCP0D_GPF, 0);
     }
+
+#ifndef CONFIG_USER_ONLY
+    /* reset local breakpoints */
+    if (env->dr[7] & 0x55) {
+        for (i = 0; i < 4; i++) {
+            if (hw_breakpoint_enabled(env->dr[7], i) == 0x1)
+                hw_breakpoint_remove(env, i);
+        }
+        env->dr[7] &= ~0x55;
+    }
+#endif
 }
 
@@ -787 +802 @@
     int type, dpl, selector, ss_dpl, cpl;
     int has_error_code, new_stack, shift;
-    uint32_t e1, e2, offset, ss, esp, ss_e1, ss_e2;
+    uint32_t e1, e2, offset, ss = 0, esp, ss_e1 = 0, ss_e2 = 0;
     uint32_t old_eip, sp_mask;
 
 #ifdef VBOX
-    ss = ss_e1 = ss_e2 = 0;
     if (remR3NotifyTrap(env, intno, error_code, next_eip) != VINF_SUCCESS)
         cpu_loop_exit();
@@ -1271 +1285 @@
         env->eflags &= ~IF_MASK;
     }
-
 #ifndef VBOX
     env->eflags &= ~(TF_MASK | VM_MASK | RF_MASK | NT_MASK);
@@ -1285 +1298 @@
 #endif
 
+#ifdef TARGET_X86_64
 #if defined(CONFIG_USER_ONLY)
 void helper_syscall(int next_eip_addend)
@@ -1301 +1315 @@
     }
     selector = (env->star >> 32) & 0xffff;
-#ifdef TARGET_X86_64
     if (env->hflags & HF_LMA_MASK) {
         int code64;
@@ -1327 +1340 @@
         else
             env->eip = env->cstar;
-    } else
-#endif
-    {
+    } else {
         ECX = (uint32_t)(env->eip + next_eip_addend);
 
@@ -1348 +1359 @@
 }
 #endif
-
+#endif
+
+#ifdef TARGET_X86_64
 void helper_sysret(int dflag)
 {
@@ -1361 +1374 @@
     }
     selector = (env->star >> 48) & 0xffff;
-#ifdef TARGET_X86_64
     if (env->hflags & HF_LMA_MASK) {
         if (dflag == 2) {
@@ -1387 +1399 @@
                     IF_MASK | IOPL_MASK | VM_MASK | RF_MASK | NT_MASK);
         cpu_x86_set_cpl(env, 3);
-    } else
-#endif
-    {
+    } else {
         cpu_x86_load_seg_cache(env, R_CS, selector | 3,
                                0, 0xffffffff,
@@ -1413 +1423 @@
 #endif
 }
+#endif
 
 #ifdef VBOX
@@ -1421 +1432 @@
 void helper_external_event(void)
 {
-#if defined(RT_OS_DARWIN) && defined(VBOX_STRICT)
+# if defined(RT_OS_DARWIN) && defined(VBOX_STRICT)
     uintptr_t uSP;
-# ifdef RT_ARCH_AMD64
+#  ifdef RT_ARCH_AMD64
     __asm__ __volatile__("movq %%rsp, %0" : "=r" (uSP));
-# else
+#  else
     __asm__ __volatile__("movl %%esp, %0" : "=r" (uSP));
+#  endif
+    AssertMsg(!(uSP & 15), ("xSP=%#p\n", uSP));
 # endif
-    AssertMsg(!(uSP & 15), ("xSP=%#p\n", uSP));
-#endif
     /* Keep in sync with flags checked by gen_check_external_event() */
     if (env->interrupt_request & CPU_INTERRUPT_EXTERNAL_HARD)
@@ -1546 +1557 @@
                   target_ulong next_eip, int is_hw)
 {
+    if (qemu_loglevel_mask(CPU_LOG_INT)) {
+        if ((env->cr[0] & CR0_PE_MASK)) {
+            static int count;
+            qemu_log("%6d: v=%02x e=%04x i=%d cpl=%d IP=%04x:" TARGET_FMT_lx " pc=" TARGET_FMT_lx " SP=%04x:" TARGET_FMT_lx,
+                    count, intno, error_code, is_int,
+                    env->hflags & HF_CPL_MASK,
+                    env->segs[R_CS].selector, EIP,
+                    (int)env->segs[R_CS].base + EIP,
+                    env->segs[R_SS].selector, ESP);
+            if (intno == 0x0e) {
+                qemu_log(" CR2=" TARGET_FMT_lx, env->cr[2]);
+            } else {
+                qemu_log(" EAX=" TARGET_FMT_lx, EAX);
+            }
+            qemu_log("\n");
+            log_cpu_state(env, X86_DUMP_CCOP);
+#if 0
+            {
+                int i;
+                uint8_t *ptr;
+                qemu_log("       code=");
+                ptr = env->segs[R_CS].base + env->eip;
+                for(i = 0; i < 16; i++) {
+                    qemu_log(" %02x", ldub(ptr + i));
+                }
+                qemu_log("\n");
+            }
+#endif
+            count++;
+        }
+    }
 #ifdef VBOX
     if (RT_UNLIKELY(env->state & CPU_EMULATE_SINGLE_STEP)) {
@@ -1557 +1599 @@
     }
 #endif
-
-    if (loglevel & CPU_LOG_INT) {
-        if ((env->cr[0] & CR0_PE_MASK)) {
-            static int count;
-            fprintf(logfile, "%6d: v=%02x e=%04x i=%d cpl=%d IP=%04x:" TARGET_FMT_lx " pc=" TARGET_FMT_lx " SP=%04x:" TARGET_FMT_lx,
-                    count, intno, error_code, is_int,
-                    env->hflags & HF_CPL_MASK,
-                    env->segs[R_CS].selector, EIP,
-                    (int)env->segs[R_CS].base + EIP,
-                    env->segs[R_SS].selector, ESP);
-            if (intno == 0x0e) {
-                fprintf(logfile, " CR2=" TARGET_FMT_lx, env->cr[2]);
-            } else {
-                fprintf(logfile, " EAX=" TARGET_FMT_lx, EAX);
-            }
-            fprintf(logfile, "\n");
-            cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
-#if 0
-            {
-                int i;
-                uint8_t *ptr;
-                fprintf(logfile, "       code=");
-                ptr = env->segs[R_CS].base + env->eip;
-                for(i = 0; i < 16; i++) {
-                    fprintf(logfile, " %02x", ldub(ptr + i));
-                }
-                fprintf(logfile, "\n");
-            }
-#endif
-            count++;
-        }
-    }
     if (env->cr[0] & CR0_PE_MASK) {
 #ifdef TARGET_X86_64
@@ -1614 +1624 @@
 }
 
+/* This should come from sysemu.h - if we could include it here... */
+void qemu_system_reset_request(void);
+
 /*
  * Check nested exceptions and change to double or triple fault if
@@ -1627 +1640 @@
                                (intno >= 10 && intno <= 13);
 
-    if (loglevel & CPU_LOG_INT)
-        fprintf(logfile, "check_exception old: 0x%x new 0x%x\n",
+    qemu_log_mask(CPU_LOG_INT, "check_exception old: 0x%x new 0x%x\n",
                 env->old_exception, intno);
 
-    if (env->old_exception == EXCP08_DBLE)
-        cpu_abort(env, "triple fault");
+#if !defined(CONFIG_USER_ONLY)
+    if (env->old_exception == EXCP08_DBLE) {
+        if (env->hflags & HF_SVMI_MASK)
+            helper_vmexit(SVM_EXIT_SHUTDOWN, 0); /* does not return */
+
+        qemu_log_mask(CPU_LOG_RESET, "Triple fault\n");
+
+# ifndef VBOX
+        qemu_system_reset_request();
+# else
+        remR3RaiseRC(env->pVM, VINF_EM_RESET); /** @todo test + improve tripple fault handling. */
+# endif
+        return EXCP_HLT;
+    }
+#endif
 
     if ((first_contributory && second_contributory)
@@ -1654 +1679 @@
  * is_int is TRUE.
  */
-void raise_interrupt(int intno, int is_int, int error_code,
-                     int next_eip_addend)
+static void QEMU_NORETURN raise_interrupt(int intno, int is_int, int error_code,
+                                          int next_eip_addend)
 {
 #if defined(VBOX) && defined(DEBUG)
@@ -1676 +1701 @@
 /* shortcuts to generate exceptions */
 
-void (raise_exception_err)(int exception_index, int error_code)
+void raise_exception_err(int exception_index, int error_code)
 {
     raise_interrupt(exception_index, 0, error_code, 0);
@@ -1712 +1737 @@
     int i, offset;
 
-    if (loglevel & CPU_LOG_INT) {
-        fprintf(logfile, "SMM: enter\n");
-        cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
-    }
+    qemu_log_mask(CPU_LOG_INT, "SMM: enter\n");
+    log_cpu_state_mask(CPU_LOG_INT, env, X86_DUMP_CCOP);
 
     env->hflags |= HF_SMM_MASK;
@@ -1846 +1869 @@
    cpu_abort(env, "helper_rsm");
 #else /* !VBOX */
-    target_ulong sm_
-
     target_ulong sm_state;
     int i, offset;
@@ -1960 +1981 @@
     cpu_smm_update(env);
 
-    if (loglevel & CPU_LOG_INT) {
-        fprintf(logfile, "SMM: after RSM\n");
-        cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
-    }
+    qemu_log_mask(CPU_LOG_INT, "SMM: after RSM\n");
+    log_cpu_state_mask(CPU_LOG_INT, env, X86_DUMP_CCOP);
 #endif /* !VBOX */
 }
@@ -2107 +2126 @@
     int eflags;
 
-    eflags = cc_table[CC_OP].compute_all();
+    eflags = helper_cc_compute_all(CC_OP);
     af = eflags & CC_A;
     al = EAX & 0xff;
@@ -2123 +2142 @@
     EAX = (EAX & ~0xffff) | al | (ah << 8);
     CC_SRC = eflags;
-    FORCE_RET();
 }
 
@@ -2132 +2150 @@
     int eflags;
 
-    eflags = cc_table[CC_OP].compute_all();
+    eflags = helper_cc_compute_all(CC_OP);
     af = eflags & CC_A;
     al = EAX & 0xff;
@@ -2148 +2166 @@
     EAX = (EAX & ~0xffff) | al | (ah << 8);
     CC_SRC = eflags;
-    FORCE_RET();
 }
 
@@ -2156 +2173 @@
     int eflags;
 
-    eflags = cc_table[CC_OP].compute_all();
+    eflags = helper_cc_compute_all(CC_OP);
     cf = eflags & CC_C;
     af = eflags & CC_A;
@@ -2176 +2193 @@
     eflags |= (al & 0x80); /* sf */
     CC_SRC = eflags;
-    FORCE_RET();
 }
 
@@ -2184 +2200 @@
     int eflags;
 
-    eflags = cc_table[CC_OP].compute_all();
+    eflags = helper_cc_compute_all(CC_OP);
     cf = eflags & CC_C;
     af = eflags & CC_A;
@@ -2207 +2223 @@
     eflags |= (al & 0x80); /* sf */
     CC_SRC = eflags;
-    FORCE_RET();
 }
 
@@ -2213 +2228 @@
 {
     int eflags;
-    eflags = cc_table[CC_OP].compute_all();
+    eflags = helper_cc_compute_all(CC_OP);
     if (eflags & CC_O) {
         raise_interrupt(EXCP04_INTO, 1, 0, next_eip_addend);
@@ -2224 +2239 @@
     int eflags;
 
-    eflags = cc_table[CC_OP].compute_all();
+    eflags = helper_cc_compute_all(CC_OP);
     d = ldq(a0);
     if (d == (((uint64_t)EDX << 32) | (uint32_t)EAX)) {
@@ -2247 +2262 @@
     if ((a0 & 0xf) != 0)
         raise_exception(EXCP0D_GPF);
-    eflags = cc_table[CC_OP].compute_all();
+    eflags = helper_cc_compute_all(CC_OP);
     d0 = ldq(a0);
     d1 = ldq(a0 + 8);
@@ -2268 +2283 @@
 void helper_single_step(void)
 {
-    env->dr[6] |= 0x4000;
-    raise_exception(EXCP01_SSTP);
+#ifndef CONFIG_USER_ONLY
+    check_hw_breakpoints(env, 1);
+    env->dr[6] |= DR6_BS;
+#endif
+    raise_exception(EXCP01_DB);
 }
 
 void helper_cpuid(void)
 {
-#ifndef VBOX
-    uint32_t index;
+    uint32_t eax, ebx, ecx, edx;
 
     helper_svm_check_intercept_param(SVM_EXIT_CPUID, 0);
 
-    index = (uint32_t)EAX;
-    /* test if maximum index reached */
-    if (index & 0x80000000) {
-        if (index > env->cpuid_xlevel)
-            index = env->cpuid_level;
-    } else {
-        if (index > env->cpuid_level)
-            index = env->cpuid_level;
-    }
-
-    switch(index) {
-    case 0:
-        EAX = env->cpuid_level;
-        EBX = env->cpuid_vendor1;
-        EDX = env->cpuid_vendor2;
-        ECX = env->cpuid_vendor3;
-        break;
-    case 1:
-        EAX = env->cpuid_version;
-        EBX = (env->cpuid_apic_id << 24) | 8 << 8; /* CLFLUSH size in quad words, Linux wants it. */
-        ECX = env->cpuid_ext_features;
-        EDX = env->cpuid_features;
-        break;
-    case 2:
-        /* cache info: needed for Pentium Pro compatibility */
-        EAX = 1;
-        EBX = 0;
-        ECX = 0;
-        EDX = 0x2c307d;
-        break;
-    case 4:
-        /* cache info: needed for Core compatibility */
-        switch (ECX) {
-            case 0: /* L1 dcache info */
-                EAX = 0x0000121;
-                EBX = 0x1c0003f;
-                ECX = 0x000003f;
-                EDX = 0x0000001;
-                break;
-            case 1: /* L1 icache info */
-                EAX = 0x0000122;
-                EBX = 0x1c0003f;
-                ECX = 0x000003f;
-                EDX = 0x0000001;
-                break;
-            case 2: /* L2 cache info */
-                EAX = 0x0000143;
-                EBX = 0x3c0003f;
-                ECX = 0x0000fff;
-                EDX = 0x0000001;
-                break;
-            default: /* end of info */
-                EAX = 0;
-                EBX = 0;
-                ECX = 0;
-                EDX = 0;
-                break;
-        }
-
-        break;
-    case 5:
-        /* mwait info: needed for Core compatibility */
-        EAX = 0; /* Smallest monitor-line size in bytes */
-        EBX = 0; /* Largest monitor-line size in bytes */
-        ECX = CPUID_MWAIT_EMX | CPUID_MWAIT_IBE;
-        EDX = 0;
-        break;
-    case 6:
-        /* Thermal and Power Leaf */
-        EAX = 0;
-        EBX = 0;
-        ECX = 0;
-        EDX = 0;
-        break;
-    case 9:
-        /* Direct Cache Access Information Leaf */
-        EAX = 0; /* Bits 0-31 in DCA_CAP MSR */
-        EBX = 0;
-        ECX = 0;
-        EDX = 0;
-        break;
-    case 0xA:
-        /* Architectural Performance Monitoring Leaf */
-        EAX = 0;
-        EBX = 0;
-        ECX = 0;
-        EDX = 0;
-        break;
-    case 0x80000000:
-        EAX = env->cpuid_xlevel;
-        EBX = env->cpuid_vendor1;
-        EDX = env->cpuid_vendor2;
-        ECX = env->cpuid_vendor3;
-        break;
-    case 0x80000001:
-        EAX = env->cpuid_features;
-        EBX = 0;
-        ECX = env->cpuid_ext3_features;
-        EDX = env->cpuid_ext2_features;
-        break;
-    case 0x80000002:
-    case 0x80000003:
-    case 0x80000004:
-        EAX = env->cpuid_model[(index - 0x80000002) * 4 + 0];
-        EBX = env->cpuid_model[(index - 0x80000002) * 4 + 1];
-        ECX = env->cpuid_model[(index - 0x80000002) * 4 + 2];
-        EDX = env->cpuid_model[(index - 0x80000002) * 4 + 3];
-        break;
-    case 0x80000005:
-        /* cache info (L1 cache) */
-        EAX = 0x01ff01ff;
-        EBX = 0x01ff01ff;
-        ECX = 0x40020140;
-        EDX = 0x40020140;
-        break;
-    case 0x80000006:
-        /* cache info (L2 cache) */
-        EAX = 0;
-        EBX = 0x42004200;
-        ECX = 0x02008140;
-        EDX = 0;
-        break;
-    case 0x80000008:
-        /* virtual & phys address size in low 2 bytes. */
-/* XXX: This value must match the one used in the MMU code. */
-        if (env->cpuid_ext2_features & CPUID_EXT2_LM) {
-            /* 64 bit processor */
-#if defined(USE_KQEMU)
-            EAX = 0x00003020;   /* 48 bits virtual, 32 bits physical */
-#else
-/* XXX: The physical address space is limited to 42 bits in exec.c. */
-            EAX = 0x00003028;   /* 48 bits virtual, 40 bits physical */
-#endif
-        } else {
-#if defined(USE_KQEMU)
-            EAX = 0x00000020;   /* 32 bits physical */
-#else
-            if (env->cpuid_features & CPUID_PSE36)
-                EAX = 0x00000024; /* 36 bits physical */
-            else
-                EAX = 0x00000020; /* 32 bits physical */
-#endif
-        }
-        EBX = 0;
-        ECX = 0;
-        EDX = 0;
-        break;
-    case 0x8000000A:
-        EAX = 0x00000001;
-        EBX = 0;
-        ECX = 0;
-        EDX = 0;
-        break;
-    default:
-        /* reserved values: zero */
-        EAX = 0;
-        EBX = 0;
-        ECX = 0;
-        EDX = 0;
-        break;
-    }
-#else /* VBOX */
-    remR3CpuId(env, EAX, &EAX, &EBX, &ECX, &EDX);
-#endif /* VBOX */
+    cpu_x86_cpuid(env, (uint32_t)EAX, (uint32_t)ECX, &eax, &ebx, &ecx, &edx);
+    EAX = eax;
+    EBX = ebx;
+    ECX = ecx;
+    EDX = edx;
 }
 
@@ -2724 +2582 @@
                        e2);
 #if 0
-        fprintf(logfile, "load_seg: sel=0x%04x base=0x%08lx limit=0x%08lx flags=%08x\n",
+        qemu_log("load_seg: sel=0x%04x base=0x%08lx limit=0x%08lx flags=%08x\n",
                 selector, (unsigned long)sc->base, sc->limit, sc->flags);
 #endif
@@ -2738 +2596 @@
     target_ulong next_eip;
 
-#ifdef VBOX
+#ifdef VBOX /** @todo Why do we do this? */
     e1 = e2 = 0;
 #endif
@@ -2859 +2717 @@
     int new_stack, i;
     uint32_t e1, e2, cpl, dpl, rpl, selector, offset, param_count;
-    uint32_t ss, ss_e1, ss_e2, sp, type, ss_dpl, sp_mask;
+    uint32_t ss = 0, ss_e1 = 0, ss_e2 = 0, sp, type, ss_dpl, sp_mask;
     uint32_t val, limit, old_sp_mask;
     target_ulong ssp, old_ssp, next_eip;
 
-#ifdef VBOX
-    ss = ss_e1 = ss_e2 = e1 = e2 = 0;
+#ifdef VBOX /** @todo Why do we do this? */
+    e1 = e2 = 0;
 #endif
     next_eip = env->eip + next_eip_addend;
-#ifdef DEBUG_PCALL
-    if (loglevel & CPU_LOG_PCALL) {
-        fprintf(logfile, "lcall %04x:%08x s=%d\n",
-                new_cs, (uint32_t)new_eip, shift);
-        cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
-    }
-#endif
+    LOG_PCALL("lcall %04x:%08x s=%d\n", new_cs, (uint32_t)new_eip, shift);
+    LOG_PCALL_STATE(env);
     if ((new_cs & 0xfffc) == 0)
         raise_exception_err(EXCP0D_GPF, 0);
@@ -2879 +2732 @@
         raise_exception_err(EXCP0D_GPF, new_cs & 0xfffc);
     cpl = env->hflags & HF_CPL_MASK;
-#ifdef DEBUG_PCALL
-    if (loglevel & CPU_LOG_PCALL) {
-        fprintf(logfile, "desc=%08x:%08x\n", e1, e2);
-    }
-#endif
+    LOG_PCALL("desc=%08x:%08x\n", e1, e2);
     if (e2 & DESC_S_MASK) {
         if (!(e2 & DESC_CS_MASK))
@@ -2987 +2836 @@
             /* to inner privilege */
             get_ss_esp_from_tss(&ss, &sp, dpl);
-#ifdef DEBUG_PCALL
-            if (loglevel & CPU_LOG_PCALL)
-                fprintf(logfile, "new ss:esp=%04x:%08x param_count=%d ESP=" TARGET_FMT_lx "\n",
+            LOG_PCALL("new ss:esp=%04x:%08x param_count=%d ESP=" TARGET_FMT_lx "\n",
                         ss, sp, param_count, ESP);
-#endif
             if ((ss & 0xfffc) == 0)
                 raise_exception_err(EXCP0A_TSS, ss & 0xfffc);
@@ -3178 +3024 @@
     target_ulong ssp, sp, new_eip, new_esp, sp_mask;
 
-#ifdef VBOX
+#ifdef VBOX /** @todo Why do we do this? */
     ss_e1 = ss_e2 = e1 = e2 = 0;
 #endif
@@ -3233 +3079 @@
             POPW(ssp, sp, sp_mask, new_eflags);
     }
-#ifdef DEBUG_PCALL
-    if (loglevel & CPU_LOG_PCALL) {
-        fprintf(logfile, "lret new %04x:" TARGET_FMT_lx " s=%d addend=0x%x\n",
-                new_cs, new_eip, shift, addend);
-        cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
-    }
-#endif
+    LOG_PCALL("lret new %04x:" TARGET_FMT_lx " s=%d addend=0x%x\n",
+              new_cs, new_eip, shift, addend);
+    LOG_PCALL_STATE(env);
     if ((new_cs & 0xfffc) == 0)
     {
@@ -3324 +3166 @@
             POPW(ssp, sp, sp_mask, new_ss);
         }
-#ifdef DEBUG_PCALL
-        if (loglevel & CPU_LOG_PCALL) {
-            fprintf(logfile, "new ss:esp=%04x:" TARGET_FMT_lx "\n",
+        LOG_PCALL("new ss:esp=%04x:" TARGET_FMT_lx "\n",
                     new_ss, new_esp);
-        }
-#endif
         if ((new_ss & 0xfffc) == 0) {
 #ifdef TARGET_X86_64
@@ -3436 +3274 @@
 
 #ifdef VBOX
-    e1 = e2 = 0;
+    e1 = e2 = 0; /** @todo Why do we do this? */
     remR3TrapClear(env->pVM);
 #endif
@@ -3567 +3405 @@
 {
 }
+
+void helper_movl_drN_T0(int reg, target_ulong t0)
+{
+}
 #else
 target_ulong helper_read_crN(int reg)
@@ -3612 +3454 @@
     }
 }
+
+void helper_movl_drN_T0(int reg, target_ulong t0)
+{
+    int i;
+
+    if (reg < 4) {
+        hw_breakpoint_remove(env, reg);
+        env->dr[reg] = t0;
+        hw_breakpoint_insert(env, reg);
+    } else if (reg == 7) {
+        for (i = 0; i < 4; i++)
+            hw_breakpoint_remove(env, i);
+        env->dr[7] = t0;
+        for (i = 0; i < 4; i++)
+            hw_breakpoint_insert(env, i);
+    } else
+        env->dr[reg] = t0;
+}
 #endif
 
@@ -3626 +3486 @@
     env->cr[0] &= ~CR0_TS_MASK;
     env->hflags &= ~HF_TS_MASK;
-}
-
-/* XXX: do more */
-void helper_movl_drN_T0(int reg, target_ulong t0)
-{
-    env->dr[reg] = t0;
 }
 
@@ -3721 +3575 @@
         break;
     case MSR_IA32_APICBASE:
-#ifndef VBOX /* The CPUMSetGuestMsr call below does this now. */
+# ifndef VBOX /* The CPUMSetGuestMsr call below does this now. */
         cpu_set_apic_base(env, val);
-#endif
+# endif
         break;
     case MSR_EFER:
@@ -3739 +3593 @@
             if (env->cpuid_ext3_features & CPUID_EXT3_SVM)
                 update_mask |= MSR_EFER_SVME;
+            if (env->cpuid_ext2_features & CPUID_EXT2_FFXSR)
+                update_mask |= MSR_EFER_FFXSR;
             cpu_load_efer(env, (env->efer & ~update_mask) |
                           (val & update_mask));
@@ -3772 +3628 @@
         break;
 #endif
+# ifndef VBOX
+    case MSR_MTRRphysBase(0):
+    case MSR_MTRRphysBase(1):
+    case MSR_MTRRphysBase(2):
+    case MSR_MTRRphysBase(3):
+    case MSR_MTRRphysBase(4):
+    case MSR_MTRRphysBase(5):
+    case MSR_MTRRphysBase(6):
+    case MSR_MTRRphysBase(7):
+        env->mtrr_var[((uint32_t)ECX - MSR_MTRRphysBase(0)) / 2].base = val;
+        break;
+    case MSR_MTRRphysMask(0):
+    case MSR_MTRRphysMask(1):
+    case MSR_MTRRphysMask(2):
+    case MSR_MTRRphysMask(3):
+    case MSR_MTRRphysMask(4):
+    case MSR_MTRRphysMask(5):
+    case MSR_MTRRphysMask(6):
+    case MSR_MTRRphysMask(7):
+        env->mtrr_var[((uint32_t)ECX - MSR_MTRRphysMask(0)) / 2].mask = val;
+        break;
+    case MSR_MTRRfix64K_00000:
+        env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix64K_00000] = val;
+        break;
+    case MSR_MTRRfix16K_80000:
+    case MSR_MTRRfix16K_A0000:
+        env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix16K_80000 + 1] = val;
+        break;
+    case MSR_MTRRfix4K_C0000:
+    case MSR_MTRRfix4K_C8000:
+    case MSR_MTRRfix4K_D0000:
+    case MSR_MTRRfix4K_D8000:
+    case MSR_MTRRfix4K_E0000:
+    case MSR_MTRRfix4K_E8000:
+    case MSR_MTRRfix4K_F0000:
+    case MSR_MTRRfix4K_F8000:
+        env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix4K_C0000 + 3] = val;
+        break;
+    case MSR_MTRRdefType:
+        env->mtrr_deftype = val;
+        break;
+# endif /* !VBOX */
     default:
-#ifndef VBOX
+# ifndef VBOX
         /* XXX: exception ? */
-#endif
-        break;
-    }
-
-#ifdef VBOX
+# endif
+        break;
+    }
+
+# ifdef VBOX
     /* call CPUM. */
     if (cpu_wrmsr(env, (uint32_t)ECX, val) != 0)
@@ -3785 +3683 @@
         /** @todo be a brave man and raise a \#GP(0) here as we should... */
     }
-#endif
+# endif
 }
 
@@ -3791 +3689 @@
 {
     uint64_t val;
+
     helper_svm_check_intercept_param(SVM_EXIT_MSR, 0);
 
@@ -3818 +3717 @@
         val = env->vm_hsave;
         break;
-#ifndef VBOX /* forward to CPUMQueryGuestMsr. */
+# ifndef VBOX /* forward to CPUMQueryGuestMsr. */
     case MSR_IA32_PERF_STATUS:
         /* tsc_increment_by_tick */
@@ -3825 +3724 @@
         val |= (((uint64_t)4ULL) << 40);
         break;
-#endif /* !VBOX */
+# endif /* !VBOX */
 #ifdef TARGET_X86_64
     case MSR_LSTAR:
@@ -3855 +3754 @@
         break;
 #endif
+# ifndef VBOX
+    case MSR_MTRRphysBase(0):
+    case MSR_MTRRphysBase(1):
+    case MSR_MTRRphysBase(2):
+    case MSR_MTRRphysBase(3):
+    case MSR_MTRRphysBase(4):
+    case MSR_MTRRphysBase(5):
+    case MSR_MTRRphysBase(6):
+    case MSR_MTRRphysBase(7):
+        val = env->mtrr_var[((uint32_t)ECX - MSR_MTRRphysBase(0)) / 2].base;
+        break;
+    case MSR_MTRRphysMask(0):
+    case MSR_MTRRphysMask(1):
+    case MSR_MTRRphysMask(2):
+    case MSR_MTRRphysMask(3):
+    case MSR_MTRRphysMask(4):
+    case MSR_MTRRphysMask(5):
+    case MSR_MTRRphysMask(6):
+    case MSR_MTRRphysMask(7):
+        val = env->mtrr_var[((uint32_t)ECX - MSR_MTRRphysMask(0)) / 2].mask;
+        break;
+    case MSR_MTRRfix64K_00000:
+        val = env->mtrr_fixed[0];
+        break;
+    case MSR_MTRRfix16K_80000:
+    case MSR_MTRRfix16K_A0000:
+        val = env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix16K_80000 + 1];
+        break;
+    case MSR_MTRRfix4K_C0000:
+    case MSR_MTRRfix4K_C8000:
+    case MSR_MTRRfix4K_D0000:
+    case MSR_MTRRfix4K_D8000:
+    case MSR_MTRRfix4K_E0000:
+    case MSR_MTRRfix4K_E8000:
+    case MSR_MTRRfix4K_F0000:
+    case MSR_MTRRfix4K_F8000:
+        val = env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix4K_C0000 + 3];
+        break;
+    case MSR_MTRRdefType:
+        val = env->mtrr_deftype;
+        break;
+    case MSR_MTRRcap:
+        if (env->cpuid_features & CPUID_MTRR)
+            val = MSR_MTRRcap_VCNT | MSR_MTRRcap_FIXRANGE_SUPPORT | MSR_MTRRcap_WC_SUPPORTED;
+        else
+            /* XXX: exception ? */
+            val = 0;
+        break;
+# endif /* !VBOX */
     default:
-#ifndef VBOX
+# ifndef VBOX
         /* XXX: exception ? */
         val = 0;
-#else  /* VBOX */
+# else  /* VBOX */
         if (cpu_rdmsr(env, (uint32_t)ECX, &val) != 0)
         {
@@ -3865 +3813 @@
             val = 0;
         }
-#endif /* VBOX */
+# endif /* VBOX */
         break;
     }
@@ -3871 +3819 @@
     EDX = (uint32_t)(val >> 32);
 
-#ifdef VBOX_STRICT
+# ifdef VBOX_STRICT
     if (cpu_rdmsr(env, (uint32_t)ECX, &val) != 0)
         val = 0;
     AssertMsg(val == RT_MAKE_U64(EAX, EDX), ("idMsr=%#x val=%#llx eax:edx=%#llx\n", (uint32_t)ECX, val, RT_MAKE_U64(EAX, EDX)));
-#endif
+# endif
 }
 #endif
@@ -3886 +3834 @@
 
     selector = selector1 & 0xffff;
-    eflags = cc_table[CC_OP].compute_all();
+    eflags = helper_cc_compute_all(CC_OP);
     if (load_segment(&e1, &e2, selector) != 0)
         goto fail;
@@ -3928 +3876 @@
 
     selector = selector1 & 0xffff;
-    eflags = cc_table[CC_OP].compute_all();
+    eflags = helper_cc_compute_all(CC_OP);
     if ((selector & 0xfffc) == 0)
         goto fail;
@@ -3974 +3922 @@
 
     selector = selector1 & 0xffff;
-    eflags = cc_table[CC_OP].compute_all();
+    eflags = helper_cc_compute_all(CC_OP);
     if ((selector & 0xfffc) == 0)
         goto fail;
@@ -4007 +3955 @@
 
     selector = selector1 & 0xffff;
-    eflags = cc_table[CC_OP].compute_all();
+    eflags = helper_cc_compute_all(CC_OP);
     if ((selector & 0xfffc) == 0)
         goto fail;
@@ -4047 +3995 @@
 }
 
-void fpu_raise_exception(void)
+static void fpu_raise_exception(void)
 {
     if (env->cr[0] & CR0_NE_MASK) {
@@ -4297 +4245 @@
     ret = floatx_compare(ST0, FT0, &env->fp_status);
     env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret + 1];
-    FORCE_RET();
 }
 
@@ -4306 +4253 @@
     ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
     env->fpus = (env->fpus & ~0x4500) | fcom_ccval[ret+ 1];
-    FORCE_RET();
 }
 
@@ -4317 +4263 @@
 
     ret = floatx_compare(ST0, FT0, &env->fp_status);
-    eflags = cc_table[CC_OP].compute_all();
+    eflags = helper_cc_compute_all(CC_OP);
     eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
     CC_SRC = eflags;
-    FORCE_RET();
 }
 
@@ -4329 +4274 @@
 
     ret = floatx_compare_quiet(ST0, FT0, &env->fp_status);
-    eflags = cc_table[CC_OP].compute_all();
+    eflags = helper_cc_compute_all(CC_OP);
     eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
     CC_SRC = eflags;
-    FORCE_RET();
 }
 
@@ -4525 +4469 @@
     if (env->fpus & FPUS_SE)
         fpu_raise_exception();
-    FORCE_RET();
 }
 
@@ -5040 +4983 @@
             nb_xmm_regs = 8;
         addr = ptr + 0xa0;
-        for(i = 0; i < nb_xmm_regs; i++) {
-            stq(addr, env->xmm_regs[i].XMM_Q(0));
-            stq(addr + 8, env->xmm_regs[i].XMM_Q(1));
-            addr += 16;
+        /* Fast FXSAVE leaves out the XMM registers */
+        if (!(env->efer & MSR_EFER_FFXSR)
+          || (env->hflags & HF_CPL_MASK)
+          || !(env->hflags & HF_LMA_MASK)) {
+            for(i = 0; i < nb_xmm_regs; i++) {
+                stq(addr, env->xmm_regs[i].XMM_Q(0));
+                stq(addr + 8, env->xmm_regs[i].XMM_Q(1));
+                addr += 16;
+            }
         }
     }
@@ -5080 +5028 @@
             nb_xmm_regs = 8;
         addr = ptr + 0xa0;
-        for(i = 0; i < nb_xmm_regs; i++) {
+        /* Fast FXRESTORE leaves out the XMM registers */
+        if (!(env->efer & MSR_EFER_FFXSR)
+          || (env->hflags & HF_CPL_MASK)
+          || !(env->hflags & HF_LMA_MASK)) {
+            for(i = 0; i < nb_xmm_regs; i++) {
 #if !defined(VBOX) || __GNUC__ < 4
-            env->xmm_regs[i].XMM_Q(0) = ldq(addr);
-            env->xmm_regs[i].XMM_Q(1) = ldq(addr + 8);
+                env->xmm_regs[i].XMM_Q(0) = ldq(addr);
+                env->xmm_regs[i].XMM_Q(1) = ldq(addr + 8);
 #else /* VBOX + __GNUC__ >= 4: gcc 4.x compiler bug - it runs out of registers for the 64-bit value. */
 # if 1
-            env->xmm_regs[i].XMM_L(0) = ldl(addr);
-            env->xmm_regs[i].XMM_L(1) = ldl(addr + 4);
-            env->xmm_regs[i].XMM_L(2) = ldl(addr + 8);
-            env->xmm_regs[i].XMM_L(3) = ldl(addr + 12);
+                env->xmm_regs[i].XMM_L(0) = ldl(addr);
+                env->xmm_regs[i].XMM_L(1) = ldl(addr + 4);
+                env->xmm_regs[i].XMM_L(2) = ldl(addr + 8);
+                env->xmm_regs[i].XMM_L(3) = ldl(addr + 12);
 # else
-            /* this works fine on Mac OS X, gcc 4.0.1 */
-            uint64_t u64 = ldq(addr);
-            env->xmm_regs[i].XMM_Q(0);
-            u64 = ldq(addr + 4);
-            env->xmm_regs[i].XMM_Q(1) = u64;
+                /* this works fine on Mac OS X, gcc 4.0.1 */
+                uint64_t u64 = ldq(addr);
+                env->xmm_regs[i].XMM_Q(0);
+                u64 = ldq(addr + 4);
+                env->xmm_regs[i].XMM_Q(1) = u64;
 # endif
 #endif
-            addr += 16;
+                addr += 16;
+            }
         }
     }
@@ -5429 +5382 @@
         raise_exception(EXCP05_BOUND);
     }
-    FORCE_RET();
 }
 
@@ -5440 +5392 @@
         raise_exception(EXCP05_BOUND);
     }
-    FORCE_RET();
 }
 
@@ -5520 +5471 @@
 #endif /* VBOX */
 
+#if !defined(CONFIG_USER_ONLY)
 /* try to fill the TLB and return an exception if error. If retaddr is
    NULL, it means that the function was called in C code (i.e. not
@@ -5552 +5504 @@
     env = saved_env;
 }
+#endif
 
 #ifdef VBOX
@@ -6148 +6101 @@
         addr = (uint32_t)EAX;
 
-    if (loglevel & CPU_LOG_TB_IN_ASM)
-        fprintf(logfile,"vmrun! " TARGET_FMT_lx "\n", addr);
+    qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmrun! " TARGET_FMT_lx "\n", addr);
 
     env->vm_vmcb = addr;
@@ -6269 +6221 @@
         stl_phys(env->vm_vmcb + offsetof(struct vmcb, control.event_inj), event_inj & ~SVM_EVTINJ_VALID);
 
-        if (loglevel & CPU_LOG_TB_IN_ASM)
-            fprintf(logfile, "Injecting(%#hx): ", valid_err);
+        qemu_log_mask(CPU_LOG_TB_IN_ASM, "Injecting(%#hx): ", valid_err);
         /* FIXME: need to implement valid_err */
         switch (event_inj & SVM_EVTINJ_TYPE_MASK) {
@@ -6278 +6229 @@
                 env->exception_is_int = 0;
                 env->exception_next_eip = -1;
-                if (loglevel & CPU_LOG_TB_IN_ASM)
-                    fprintf(logfile, "INTR");
+                qemu_log_mask(CPU_LOG_TB_IN_ASM, "INTR");
                 /* XXX: is it always correct ? */
                 do_interrupt(vector, 0, 0, 0, 1);
@@ -6288 +6238 @@
                 env->exception_is_int = 0;
                 env->exception_next_eip = EIP;
-                if (loglevel & CPU_LOG_TB_IN_ASM)
-                    fprintf(logfile, "NMI");
+                qemu_log_mask(CPU_LOG_TB_IN_ASM, "NMI");
                 cpu_loop_exit();
                 break;
@@ -6297 +6246 @@
                 env->exception_is_int = 0;
                 env->exception_next_eip = -1;
-                if (loglevel & CPU_LOG_TB_IN_ASM)
-                    fprintf(logfile, "EXEPT");
+                qemu_log_mask(CPU_LOG_TB_IN_ASM, "EXEPT");
                 cpu_loop_exit();
                 break;
@@ -6306 +6254 @@
                 env->exception_is_int = 1;
                 env->exception_next_eip = EIP;
-                if (loglevel & CPU_LOG_TB_IN_ASM)
-                    fprintf(logfile, "SOFT");
+                qemu_log_mask(CPU_LOG_TB_IN_ASM, "SOFT");
                 cpu_loop_exit();
                 break;
         }
-        if (loglevel & CPU_LOG_TB_IN_ASM)
-            fprintf(logfile, " %#x %#x\n", env->exception_index, env->error_code);
+        qemu_log_mask(CPU_LOG_TB_IN_ASM, " %#x %#x\n", env->exception_index, env->error_code);
     }
 }
@@ -6332 +6278 @@
         addr = (uint32_t)EAX;
 
-    if (loglevel & CPU_LOG_TB_IN_ASM)
-        fprintf(logfile,"vmload! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n",
+    qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmload! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n",
                 addr, ldq_phys(addr + offsetof(struct vmcb, save.fs.base)),
                 env->segs[R_FS].base);
@@ -6368 +6313 @@
         addr = (uint32_t)EAX;
 
-    if (loglevel & CPU_LOG_TB_IN_ASM)
-        fprintf(logfile,"vmsave! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n",
+    qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmsave! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n",
                 addr, ldq_phys(addr + offsetof(struct vmcb, save.fs.base)),
                 env->segs[R_FS].base);
@@ -6521 +6465 @@
     uint32_t int_ctl;
 
-    if (loglevel & CPU_LOG_TB_IN_ASM)
-        fprintf(logfile,"vmexit(%08x, %016" PRIx64 ", %016" PRIx64 ", " TARGET_FMT_lx ")!\n",
+    qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016" PRIx64 ", " TARGET_FMT_lx ")!\n",
                 exit_code, exit_info_1,
                 ldq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2)),
@@ -6668 +6611 @@
 
 /* XXX: suppress */
-void helper_movq(uint64_t *d, uint64_t *s)
-{
-    *d = *s;
+void helper_movq(void *d, void *s)
+{
+    *(uint64_t *)d = *(uint64_t *)s;
 }
 
@@ -6740 +6683 @@
 }
 
-CCTable cc_table[CC_OP_NB] = {
-    [CC_OP_DYNAMIC] = { /* should never happen */ },
-
-    [CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
-
-    [CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
-    [CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
-    [CC_OP_MULL] = { compute_all_mull, compute_c_mull },
-
-    [CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
-    [CC_OP_ADDW] = { compute_all_addw, compute_c_addw  },
-    [CC_OP_ADDL] = { compute_all_addl, compute_c_addl  },
-
-    [CC_OP_ADCB] = { compute_all_adcb, compute_c_adcb },
-    [CC_OP_ADCW] = { compute_all_adcw, compute_c_adcw  },
-    [CC_OP_ADCL] = { compute_all_adcl, compute_c_adcl  },
-
-    [CC_OP_SUBB] = { compute_all_subb, compute_c_subb  },
-    [CC_OP_SUBW] = { compute_all_subw, compute_c_subw  },
-    [CC_OP_SUBL] = { compute_all_subl, compute_c_subl  },
-
-    [CC_OP_SBBB] = { compute_all_sbbb, compute_c_sbbb  },
-    [CC_OP_SBBW] = { compute_all_sbbw, compute_c_sbbw  },
-    [CC_OP_SBBL] = { compute_all_sbbl, compute_c_sbbl  },
-
-    [CC_OP_LOGICB] = { compute_all_logicb, compute_c_logicb },
-    [CC_OP_LOGICW] = { compute_all_logicw, compute_c_logicw },
-    [CC_OP_LOGICL] = { compute_all_logicl, compute_c_logicl },
-
-    [CC_OP_INCB] = { compute_all_incb, compute_c_incl },
-    [CC_OP_INCW] = { compute_all_incw, compute_c_incl },
-    [CC_OP_INCL] = { compute_all_incl, compute_c_incl },
-
-    [CC_OP_DECB] = { compute_all_decb, compute_c_incl },
-    [CC_OP_DECW] = { compute_all_decw, compute_c_incl },
-    [CC_OP_DECL] = { compute_all_decl, compute_c_incl },
-
-    [CC_OP_SHLB] = { compute_all_shlb, compute_c_shlb },
-    [CC_OP_SHLW] = { compute_all_shlw, compute_c_shlw },
-    [CC_OP_SHLL] = { compute_all_shll, compute_c_shll },
-
-    [CC_OP_SARB] = { compute_all_sarb, compute_c_sarl },
-    [CC_OP_SARW] = { compute_all_sarw, compute_c_sarl },
-    [CC_OP_SARL] = { compute_all_sarl, compute_c_sarl },
+uint32_t helper_cc_compute_all(int op)
+{
+    switch (op) {
+    default: /* should never happen */ return 0;
+
+    case CC_OP_EFLAGS: return compute_all_eflags();
+
+    case CC_OP_MULB: return compute_all_mulb();
+    case CC_OP_MULW: return compute_all_mulw();
+    case CC_OP_MULL: return compute_all_mull();
+
+    case CC_OP_ADDB: return compute_all_addb();
+    case CC_OP_ADDW: return compute_all_addw();
+    case CC_OP_ADDL: return compute_all_addl();
+
+    case CC_OP_ADCB: return compute_all_adcb();
+    case CC_OP_ADCW: return compute_all_adcw();
+    case CC_OP_ADCL: return compute_all_adcl();
+
+    case CC_OP_SUBB: return compute_all_subb();
+    case CC_OP_SUBW: return compute_all_subw();
+    case CC_OP_SUBL: return compute_all_subl();
+
+    case CC_OP_SBBB: return compute_all_sbbb();
+    case CC_OP_SBBW: return compute_all_sbbw();
+    case CC_OP_SBBL: return compute_all_sbbl();
+
+    case CC_OP_LOGICB: return compute_all_logicb();
+    case CC_OP_LOGICW: return compute_all_logicw();
+    case CC_OP_LOGICL: return compute_all_logicl();
+
+    case CC_OP_INCB: return compute_all_incb();
+    case CC_OP_INCW: return compute_all_incw();
+    case CC_OP_INCL: return compute_all_incl();
+
+    case CC_OP_DECB: return compute_all_decb();
+    case CC_OP_DECW: return compute_all_decw();
+    case CC_OP_DECL: return compute_all_decl();
+
+    case CC_OP_SHLB: return compute_all_shlb();
+    case CC_OP_SHLW: return compute_all_shlw();
+    case CC_OP_SHLL: return compute_all_shll();
+
+    case CC_OP_SARB: return compute_all_sarb();
+    case CC_OP_SARW: return compute_all_sarw();
+    case CC_OP_SARL: return compute_all_sarl();
 
 #ifdef TARGET_X86_64
-    [CC_OP_MULQ] = { compute_all_mulq, compute_c_mull },
-
-    [CC_OP_ADDQ] = { compute_all_addq, compute_c_addq  },
-
-    [CC_OP_ADCQ] = { compute_all_adcq, compute_c_adcq  },
-
-    [CC_OP_SUBQ] = { compute_all_subq, compute_c_subq  },
-
-    [CC_OP_SBBQ] = { compute_all_sbbq, compute_c_sbbq  },
-
-    [CC_OP_LOGICQ] = { compute_all_logicq, compute_c_logicq },
-
-    [CC_OP_INCQ] = { compute_all_incq, compute_c_incl },
-
-    [CC_OP_DECQ] = { compute_all_decq, compute_c_incl },
-
-    [CC_OP_SHLQ] = { compute_all_shlq, compute_c_shlq },
-
-    [CC_OP_SARQ] = { compute_all_sarq, compute_c_sarl },
-#endif
-};
-
+    case CC_OP_MULQ: return compute_all_mulq();
+
+    case CC_OP_ADDQ: return compute_all_addq();
+
+    case CC_OP_ADCQ: return compute_all_adcq();
+
+    case CC_OP_SUBQ: return compute_all_subq();
+
+    case CC_OP_SBBQ: return compute_all_sbbq();
+
+    case CC_OP_LOGICQ: return compute_all_logicq();
+
+    case CC_OP_INCQ: return compute_all_incq();
+
+    case CC_OP_DECQ: return compute_all_decq();
+
+    case CC_OP_SHLQ: return compute_all_shlq();
+
+    case CC_OP_SARQ: return compute_all_sarq();
+#endif
+    }
+}
+
+uint32_t helper_cc_compute_c(int op)
+{
+    switch (op) {
+    default: /* should never happen */ return 0;
+
+    case CC_OP_EFLAGS: return compute_c_eflags();
+
+    case CC_OP_MULB: return compute_c_mull();
+    case CC_OP_MULW: return compute_c_mull();
+    case CC_OP_MULL: return compute_c_mull();
+
+    case CC_OP_ADDB: return compute_c_addb();
+    case CC_OP_ADDW: return compute_c_addw();
+    case CC_OP_ADDL: return compute_c_addl();
+
+    case CC_OP_ADCB: return compute_c_adcb();
+    case CC_OP_ADCW: return compute_c_adcw();
+    case CC_OP_ADCL: return compute_c_adcl();
+
+    case CC_OP_SUBB: return compute_c_subb();
+    case CC_OP_SUBW: return compute_c_subw();
+    case CC_OP_SUBL: return compute_c_subl();
+
+    case CC_OP_SBBB: return compute_c_sbbb();
+    case CC_OP_SBBW: return compute_c_sbbw();
+    case CC_OP_SBBL: return compute_c_sbbl();
+
+    case CC_OP_LOGICB: return compute_c_logicb();
+    case CC_OP_LOGICW: return compute_c_logicw();
+    case CC_OP_LOGICL: return compute_c_logicl();
+
+    case CC_OP_INCB: return compute_c_incl();
+    case CC_OP_INCW: return compute_c_incl();
+    case CC_OP_INCL: return compute_c_incl();
+
+    case CC_OP_DECB: return compute_c_incl();
+    case CC_OP_DECW: return compute_c_incl();
+    case CC_OP_DECL: return compute_c_incl();
+
+    case CC_OP_SHLB: return compute_c_shlb();
+    case CC_OP_SHLW: return compute_c_shlw();
+    case CC_OP_SHLL: return compute_c_shll();
+
+    case CC_OP_SARB: return compute_c_sarl();
+    case CC_OP_SARW: return compute_c_sarl();
+    case CC_OP_SARL: return compute_c_sarl();
+
+#ifdef TARGET_X86_64
+    case CC_OP_MULQ: return compute_c_mull();
+
+    case CC_OP_ADDQ: return compute_c_addq();
+
+    case CC_OP_ADCQ: return compute_c_adcq();
+
+    case CC_OP_SUBQ: return compute_c_subq();
+
+    case CC_OP_SBBQ: return compute_c_sbbq();
+
+    case CC_OP_LOGICQ: return compute_c_logicq();
+
+    case CC_OP_INCQ: return compute_c_incl();
+
+    case CC_OP_DECQ: return compute_c_incl();
+
+    case CC_OP_SHLQ: return compute_c_shlq();
+
+    case CC_OP_SARQ: return compute_c_sarl();
+#endif
+    }
+}

trunk/src/recompiler/target-i386/ops_sse.h

@@ -17 +17 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA  02110-1301 USA
  */
 
@@ -69 +69 @@
 #endif
     }
-    FORCE_RET();
 }
 
@@ -115 +114 @@
 #endif
     }
-    FORCE_RET();
 }
 
@@ -136 +134 @@
 #endif
     }
-    FORCE_RET();
 }
 
@@ -174 +171 @@
 #endif
     }
-    FORCE_RET();
 }
 
@@ -193 +189 @@
 #endif
     }
-    FORCE_RET();
 }
 
@@ -212 +207 @@
 #endif
     }
-    FORCE_RET();
 }
 
@@ -227 +221 @@
     for(i = 16 - shift; i < 16; i++)
         d->B(i) = 0;
-    FORCE_RET();
 }
 
@@ -241 +234 @@
     for(i = 0; i < shift; i++)
         d->B(i) = 0;
-    FORCE_RET();
 }
 #endif
@@ -443 +435 @@
             (int16_t)s->W(2*i+1) * (int16_t)d->W(2*i+1);
     }
-    FORCE_RET();
 }
 
@@ -490 +481 @@
             stb(a0 + i, d->B(i));
     }
-    FORCE_RET();
 }
 
@@ -928 +918 @@
     ret = float32_compare_quiet(s0, s1, &env->sse_status);
     CC_SRC = comis_eflags[ret + 1];
-    FORCE_RET();
 }
 
@@ -940 +929 @@
     ret = float32_compare(s0, s1, &env->sse_status);
     CC_SRC = comis_eflags[ret + 1];
-    FORCE_RET();
 }
 
@@ -952 +940 @@
     ret = float64_compare_quiet(d0, d1, &env->sse_status);
     CC_SRC = comis_eflags[ret + 1];
-    FORCE_RET();
 }
 
@@ -964 +951 @@
     ret = float64_compare(d0, d1, &env->sse_status);
     CC_SRC = comis_eflags[ret + 1];
-    FORCE_RET();
 }
 
@@ -991 +977 @@
     uint32_t val;
     val = 0;
-    val |= (s->XMM_B(0) >> 7);
-    val |= (s->XMM_B(1) >> 6) & 0x02;
-    val |= (s->XMM_B(2) >> 5) & 0x04;
-    val |= (s->XMM_B(3) >> 4) & 0x08;
-    val |= (s->XMM_B(4) >> 3) & 0x10;
-    val |= (s->XMM_B(5) >> 2) & 0x20;
-    val |= (s->XMM_B(6) >> 1) & 0x40;
-    val |= (s->XMM_B(7)) & 0x80;
-#if SHIFT == 1
-    val |= (s->XMM_B(8) << 1) & 0x0100;
-    val |= (s->XMM_B(9) << 2) & 0x0200;
-    val |= (s->XMM_B(10) << 3) & 0x0400;
-    val |= (s->XMM_B(11) << 4) & 0x0800;
-    val |= (s->XMM_B(12) << 5) & 0x1000;
-    val |= (s->XMM_B(13) << 6) & 0x2000;
-    val |= (s->XMM_B(14) << 7) & 0x4000;
-    val |= (s->XMM_B(15) << 8) & 0x8000;
+    val |= (s->B(0) >> 7);
+    val |= (s->B(1) >> 6) & 0x02;
+    val |= (s->B(2) >> 5) & 0x04;
+    val |= (s->B(3) >> 4) & 0x08;
+    val |= (s->B(4) >> 3) & 0x10;
+    val |= (s->B(5) >> 2) & 0x20;
+    val |= (s->B(6) >> 1) & 0x40;
+    val |= (s->B(7)) & 0x80;
+#if SHIFT == 1
+    val |= (s->B(8) << 1) & 0x0100;
+    val |= (s->B(9) << 2) & 0x0200;
+    val |= (s->B(10) << 3) & 0x0400;
+    val |= (s->B(11) << 4) & 0x0800;
+    val |= (s->B(12) << 5) & 0x1000;
+    val |= (s->B(13) << 6) & 0x2000;
+    val |= (s->B(14) << 7) & 0x4000;
+    val |= (s->B(15) << 8) & 0x8000;
 #endif
     return val;
@@ -1510 +1496 @@
     d->elem(0) = F(0);\
     d->elem(1) = F(1);\
-    d->elem(2) = F(2);\
-    d->elem(3) = F(3);\
-    if (num > 3) {\
-        d->elem(4) = F(4);\
-        d->elem(5) = F(5);\
-        if (num > 5) {\
+    if (num > 2) {\
+        d->elem(2) = F(2);\
+        d->elem(3) = F(3);\
+        if (num > 4) {\
+            d->elem(4) = F(4);\
+            d->elem(5) = F(5);\
             d->elem(6) = F(6);\
             d->elem(7) = F(7);\

trunk/src/recompiler/target-i386/ops_sse_header.h

@@ -16 +16 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA  02110-1301 USA
  */
 
@@ -36 +36 @@
 #endif
 
-DEF_HELPER(void, glue(helper_psrlw, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_psraw, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_psllw, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_psrld, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_psrad, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pslld, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_psrlq, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_psllq, SUFFIX), (Reg *d, Reg *s))
-
-#if SHIFT == 1
-DEF_HELPER(void, glue(helper_psrldq, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pslldq, SUFFIX), (Reg *d, Reg *s))
+#define dh_alias_Reg ptr
+#define dh_alias_XMMReg ptr
+#define dh_alias_MMXReg ptr
+#define dh_ctype_Reg Reg *
+#define dh_ctype_XMMReg XMMReg *
+#define dh_ctype_MMXReg MMXReg *
+
+DEF_HELPER_2(glue(psrlw, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(psraw, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(psllw, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(psrld, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(psrad, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pslld, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(psrlq, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(psllq, SUFFIX), void, Reg, Reg)
+
+#if SHIFT == 1
+DEF_HELPER_2(glue(psrldq, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pslldq, SUFFIX), void, Reg, Reg)
 #endif
 
 #define SSE_HELPER_B(name, F)\
-    DEF_HELPER(void, glue(name, SUFFIX), (Reg *d, Reg *s))
+    DEF_HELPER_2(glue(name, SUFFIX), void, Reg, Reg)
 
 #define SSE_HELPER_W(name, F)\
-    DEF_HELPER(void, glue(name, SUFFIX), (Reg *d, Reg *s))
+    DEF_HELPER_2(glue(name, SUFFIX), void, Reg, Reg)
 
 #define SSE_HELPER_L(name, F)\
-    DEF_HELPER(void, glue(name, SUFFIX), (Reg *d, Reg *s))
+    DEF_HELPER_2(glue(name, SUFFIX), void, Reg, Reg)
 
 #define SSE_HELPER_Q(name, F)\
-    DEF_HELPER(void, glue(name, SUFFIX), (Reg *d, Reg *s))
-
-SSE_HELPER_B(helper_paddb, FADD)
-SSE_HELPER_W(helper_paddw, FADD)
-SSE_HELPER_L(helper_paddl, FADD)
-SSE_HELPER_Q(helper_paddq, FADD)
-
-SSE_HELPER_B(helper_psubb, FSUB)
-SSE_HELPER_W(helper_psubw, FSUB)
-SSE_HELPER_L(helper_psubl, FSUB)
-SSE_HELPER_Q(helper_psubq, FSUB)
-
-SSE_HELPER_B(helper_paddusb, FADDUB)
-SSE_HELPER_B(helper_paddsb, FADDSB)
-SSE_HELPER_B(helper_psubusb, FSUBUB)
-SSE_HELPER_B(helper_psubsb, FSUBSB)
-
-SSE_HELPER_W(helper_paddusw, FADDUW)
-SSE_HELPER_W(helper_paddsw, FADDSW)
-SSE_HELPER_W(helper_psubusw, FSUBUW)
-SSE_HELPER_W(helper_psubsw, FSUBSW)
-
-SSE_HELPER_B(helper_pminub, FMINUB)
-SSE_HELPER_B(helper_pmaxub, FMAXUB)
-
-SSE_HELPER_W(helper_pminsw, FMINSW)
-SSE_HELPER_W(helper_pmaxsw, FMAXSW)
-
-SSE_HELPER_Q(helper_pand, FAND)
-SSE_HELPER_Q(helper_pandn, FANDN)
-SSE_HELPER_Q(helper_por, FOR)
-SSE_HELPER_Q(helper_pxor, FXOR)
-
-SSE_HELPER_B(helper_pcmpgtb, FCMPGTB)
-SSE_HELPER_W(helper_pcmpgtw, FCMPGTW)
-SSE_HELPER_L(helper_pcmpgtl, FCMPGTL)
-
-SSE_HELPER_B(helper_pcmpeqb, FCMPEQ)
-SSE_HELPER_W(helper_pcmpeqw, FCMPEQ)
-SSE_HELPER_L(helper_pcmpeql, FCMPEQ)
-
-SSE_HELPER_W(helper_pmullw, FMULLW)
+    DEF_HELPER_2(glue(name, SUFFIX), void, Reg, Reg)
+
+SSE_HELPER_B(paddb, FADD)
+SSE_HELPER_W(paddw, FADD)
+SSE_HELPER_L(paddl, FADD)
+SSE_HELPER_Q(paddq, FADD)
+
+SSE_HELPER_B(psubb, FSUB)
+SSE_HELPER_W(psubw, FSUB)
+SSE_HELPER_L(psubl, FSUB)
+SSE_HELPER_Q(psubq, FSUB)
+
+SSE_HELPER_B(paddusb, FADDUB)
+SSE_HELPER_B(paddsb, FADDSB)
+SSE_HELPER_B(psubusb, FSUBUB)
+SSE_HELPER_B(psubsb, FSUBSB)
+
+SSE_HELPER_W(paddusw, FADDUW)
+SSE_HELPER_W(paddsw, FADDSW)
+SSE_HELPER_W(psubusw, FSUBUW)
+SSE_HELPER_W(psubsw, FSUBSW)
+
+SSE_HELPER_B(pminub, FMINUB)
+SSE_HELPER_B(pmaxub, FMAXUB)
+
+SSE_HELPER_W(pminsw, FMINSW)
+SSE_HELPER_W(pmaxsw, FMAXSW)
+
+SSE_HELPER_Q(pand, FAND)
+SSE_HELPER_Q(pandn, FANDN)
+SSE_HELPER_Q(por, FOR)
+SSE_HELPER_Q(pxor, FXOR)
+
+SSE_HELPER_B(pcmpgtb, FCMPGTB)
+SSE_HELPER_W(pcmpgtw, FCMPGTW)
+SSE_HELPER_L(pcmpgtl, FCMPGTL)
+
+SSE_HELPER_B(pcmpeqb, FCMPEQ)
+SSE_HELPER_W(pcmpeqw, FCMPEQ)
+SSE_HELPER_L(pcmpeql, FCMPEQ)
+
+SSE_HELPER_W(pmullw, FMULLW)
 #if SHIFT == 0
-SSE_HELPER_W(helper_pmulhrw, FMULHRW)
-#endif
-SSE_HELPER_W(helper_pmulhuw, FMULHUW)
-SSE_HELPER_W(helper_pmulhw, FMULHW)
-
-SSE_HELPER_B(helper_pavgb, FAVG)
-SSE_HELPER_W(helper_pavgw, FAVG)
-
-DEF_HELPER(void, glue(helper_pmuludq, SUFFIX) , (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmaddwd, SUFFIX) , (Reg *d, Reg *s))
-
-DEF_HELPER(void, glue(helper_psadbw, SUFFIX) , (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_maskmov, SUFFIX) , (Reg *d, Reg *s, target_ulong a0))
-DEF_HELPER(void, glue(helper_movl_mm_T0, SUFFIX) , (Reg *d, uint32_t val))
+SSE_HELPER_W(pmulhrw, FMULHRW)
+#endif
+SSE_HELPER_W(pmulhuw, FMULHUW)
+SSE_HELPER_W(pmulhw, FMULHW)
+
+SSE_HELPER_B(pavgb, FAVG)
+SSE_HELPER_W(pavgw, FAVG)
+
+DEF_HELPER_2(glue(pmuludq, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmaddwd, SUFFIX), void, Reg, Reg)
+
+DEF_HELPER_2(glue(psadbw, SUFFIX), void, Reg, Reg)
+DEF_HELPER_3(glue(maskmov, SUFFIX), void, Reg, Reg, tl)
+DEF_HELPER_2(glue(movl_mm_T0, SUFFIX), void, Reg, i32)
 #ifdef TARGET_X86_64
-DEF_HELPER(void, glue(helper_movq_mm_T0, SUFFIX) , (Reg *d, uint64_t val))
+DEF_HELPER_2(glue(movq_mm_T0, SUFFIX), void, Reg, i64)
 #endif
 
 #if SHIFT == 0
-DEF_HELPER(void, glue(helper_pshufw, SUFFIX) , (Reg *d, Reg *s, int order))
+DEF_HELPER_3(glue(pshufw, SUFFIX), void, Reg, Reg, int)
 #else
-DEF_HELPER(void, helper_shufps, (Reg *d, Reg *s, int order))
-DEF_HELPER(void, helper_shufpd, (Reg *d, Reg *s, int order))
-DEF_HELPER(void, glue(helper_pshufd, SUFFIX) , (Reg *d, Reg *s, int order))
-DEF_HELPER(void, glue(helper_pshuflw, SUFFIX) , (Reg *d, Reg *s, int order))
-DEF_HELPER(void, glue(helper_pshufhw, SUFFIX) , (Reg *d, Reg *s, int order))
+DEF_HELPER_3(shufps, void, Reg, Reg, int)
+DEF_HELPER_3(shufpd, void, Reg, Reg, int)
+DEF_HELPER_3(glue(pshufd, SUFFIX), void, Reg, Reg, int)
+DEF_HELPER_3(glue(pshuflw, SUFFIX), void, Reg, Reg, int)
+DEF_HELPER_3(glue(pshufhw, SUFFIX), void, Reg, Reg, int)
 #endif
 
@@ -136 +143 @@
 
 #define SSE_HELPER_S(name, F)\
-    DEF_HELPER(void, helper_ ## name ## ps , (Reg *d, Reg *s))        \
-    DEF_HELPER(void, helper_ ## name ## ss , (Reg *d, Reg *s))        \
-    DEF_HELPER(void, helper_ ## name ## pd , (Reg *d, Reg *s))        \
-    DEF_HELPER(void, helper_ ## name ## sd , (Reg *d, Reg *s))
+    DEF_HELPER_2(name ## ps , void, Reg, Reg)        \
+    DEF_HELPER_2(name ## ss , void, Reg, Reg)        \
+    DEF_HELPER_2(name ## pd , void, Reg, Reg)        \
+    DEF_HELPER_2(name ## sd , void, Reg, Reg)
 
 SSE_HELPER_S(add, FPU_ADD)
@@ -150 +157 @@
 
 
-DEF_HELPER(void, helper_cvtps2pd, (Reg *d, Reg *s))
-DEF_HELPER(void, helper_cvtpd2ps, (Reg *d, Reg *s))
-DEF_HELPER(void, helper_cvtss2sd, (Reg *d, Reg *s))
-DEF_HELPER(void, helper_cvtsd2ss, (Reg *d, Reg *s))
-DEF_HELPER(void, helper_cvtdq2ps, (Reg *d, Reg *s))
-DEF_HELPER(void, helper_cvtdq2pd, (Reg *d, Reg *s))
-DEF_HELPER(void, helper_cvtpi2ps, (XMMReg *d, MMXReg *s))
-DEF_HELPER(void, helper_cvtpi2pd, (XMMReg *d, MMXReg *s))
-DEF_HELPER(void, helper_cvtsi2ss, (XMMReg *d, uint32_t val))
-DEF_HELPER(void, helper_cvtsi2sd, (XMMReg *d, uint32_t val))
+DEF_HELPER_2(cvtps2pd, void, Reg, Reg)
+DEF_HELPER_2(cvtpd2ps, void, Reg, Reg)
+DEF_HELPER_2(cvtss2sd, void, Reg, Reg)
+DEF_HELPER_2(cvtsd2ss, void, Reg, Reg)
+DEF_HELPER_2(cvtdq2ps, void, Reg, Reg)
+DEF_HELPER_2(cvtdq2pd, void, Reg, Reg)
+DEF_HELPER_2(cvtpi2ps, void, XMMReg, MMXReg)
+DEF_HELPER_2(cvtpi2pd, void, XMMReg, MMXReg)
+DEF_HELPER_2(cvtsi2ss, void, XMMReg, i32)
+DEF_HELPER_2(cvtsi2sd, void, XMMReg, i32)
 
 #ifdef TARGET_X86_64
-DEF_HELPER(void, helper_cvtsq2ss, (XMMReg *d, uint64_t val))
-DEF_HELPER(void, helper_cvtsq2sd, (XMMReg *d, uint64_t val))
-#endif
-
-DEF_HELPER(void, helper_cvtps2dq, (XMMReg *d, XMMReg *s))
-DEF_HELPER(void, helper_cvtpd2dq, (XMMReg *d, XMMReg *s))
-DEF_HELPER(void, helper_cvtps2pi, (MMXReg *d, XMMReg *s))
-DEF_HELPER(void, helper_cvtpd2pi, (MMXReg *d, XMMReg *s))
-DEF_HELPER(int32_t, helper_cvtss2si, (XMMReg *s))
-DEF_HELPER(int32_t, helper_cvtsd2si, (XMMReg *s))
+DEF_HELPER_2(cvtsq2ss, void, XMMReg, i64)
+DEF_HELPER_2(cvtsq2sd, void, XMMReg, i64)
+#endif
+
+DEF_HELPER_2(cvtps2dq, void, XMMReg, XMMReg)
+DEF_HELPER_2(cvtpd2dq, void, XMMReg, XMMReg)
+DEF_HELPER_2(cvtps2pi, void, MMXReg, XMMReg)
+DEF_HELPER_2(cvtpd2pi, void, MMXReg, XMMReg)
+DEF_HELPER_1(cvtss2si, s32, XMMReg)
+DEF_HELPER_1(cvtsd2si, s32, XMMReg)
 #ifdef TARGET_X86_64
-DEF_HELPER(int64_t, helper_cvtss2sq, (XMMReg *s))
-DEF_HELPER(int64_t, helper_cvtsd2sq, (XMMReg *s))
-#endif
-
-DEF_HELPER(void, helper_cvttps2dq, (XMMReg *d, XMMReg *s))
-DEF_HELPER(void, helper_cvttpd2dq, (XMMReg *d, XMMReg *s))
-DEF_HELPER(void, helper_cvttps2pi, (MMXReg *d, XMMReg *s))
-DEF_HELPER(void, helper_cvttpd2pi, (MMXReg *d, XMMReg *s))
-DEF_HELPER(int32_t, helper_cvttss2si, (XMMReg *s))
-DEF_HELPER(int32_t, helper_cvttsd2si, (XMMReg *s))
+DEF_HELPER_1(cvtss2sq, s64, XMMReg)
+DEF_HELPER_1(cvtsd2sq, s64, XMMReg)
+#endif
+
+DEF_HELPER_2(cvttps2dq, void, XMMReg, XMMReg)
+DEF_HELPER_2(cvttpd2dq, void, XMMReg, XMMReg)
+DEF_HELPER_2(cvttps2pi, void, MMXReg, XMMReg)
+DEF_HELPER_2(cvttpd2pi, void, MMXReg, XMMReg)
+DEF_HELPER_1(cvttss2si, s32, XMMReg)
+DEF_HELPER_1(cvttsd2si, s32, XMMReg)
 #ifdef TARGET_X86_64
-DEF_HELPER(int64_t, helper_cvttss2sq, (XMMReg *s))
-DEF_HELPER(int64_t, helper_cvttsd2sq, (XMMReg *s))
-#endif
-
-DEF_HELPER(void, helper_rsqrtps, (XMMReg *d, XMMReg *s))
-DEF_HELPER(void, helper_rsqrtss, (XMMReg *d, XMMReg *s))
-DEF_HELPER(void, helper_rcpps, (XMMReg *d, XMMReg *s))
-DEF_HELPER(void, helper_rcpss, (XMMReg *d, XMMReg *s))
-DEF_HELPER(void, helper_haddps, (XMMReg *d, XMMReg *s))
-DEF_HELPER(void, helper_haddpd, (XMMReg *d, XMMReg *s))
-DEF_HELPER(void, helper_hsubps, (XMMReg *d, XMMReg *s))
-DEF_HELPER(void, helper_hsubpd, (XMMReg *d, XMMReg *s))
-DEF_HELPER(void, helper_addsubps, (XMMReg *d, XMMReg *s))
-DEF_HELPER(void, helper_addsubpd, (XMMReg *d, XMMReg *s))
+DEF_HELPER_1(cvttss2sq, s64, XMMReg)
+DEF_HELPER_1(cvttsd2sq, s64, XMMReg)
+#endif
+
+DEF_HELPER_2(rsqrtps, void, XMMReg, XMMReg)
+DEF_HELPER_2(rsqrtss, void, XMMReg, XMMReg)
+DEF_HELPER_2(rcpps, void, XMMReg, XMMReg)
+DEF_HELPER_2(rcpss, void, XMMReg, XMMReg)
+DEF_HELPER_2(haddps, void, XMMReg, XMMReg)
+DEF_HELPER_2(haddpd, void, XMMReg, XMMReg)
+DEF_HELPER_2(hsubps, void, XMMReg, XMMReg)
+DEF_HELPER_2(hsubpd, void, XMMReg, XMMReg)
+DEF_HELPER_2(addsubps, void, XMMReg, XMMReg)
+DEF_HELPER_2(addsubpd, void, XMMReg, XMMReg)
 
 #define SSE_HELPER_CMP(name, F)\
-    DEF_HELPER(void, helper_ ## name ## ps , (Reg *d, Reg *s))        \
-    DEF_HELPER(void, helper_ ## name ## ss , (Reg *d, Reg *s))        \
-    DEF_HELPER(void, helper_ ## name ## pd , (Reg *d, Reg *s))        \
-    DEF_HELPER(void, helper_ ## name ## sd , (Reg *d, Reg *s))
+    DEF_HELPER_2( name ## ps , void, Reg, Reg)        \
+    DEF_HELPER_2( name ## ss , void, Reg, Reg)        \
+    DEF_HELPER_2( name ## pd , void, Reg, Reg)        \
+    DEF_HELPER_2( name ## sd , void, Reg, Reg)
 
 SSE_HELPER_CMP(cmpeq, FPU_CMPEQ)
@@ -214 +221 @@
 SSE_HELPER_CMP(cmpord, FPU_CMPORD)
 
-DEF_HELPER(void, helper_ucomiss, (Reg *d, Reg *s))
-DEF_HELPER(void, helper_comiss, (Reg *d, Reg *s))
-DEF_HELPER(void, helper_ucomisd, (Reg *d, Reg *s))
-DEF_HELPER(void, helper_comisd, (Reg *d, Reg *s))
-DEF_HELPER(uint32_t, helper_movmskps, (Reg *s))
-DEF_HELPER(uint32_t, helper_movmskpd, (Reg *s))
-#endif
-
-DEF_HELPER(uint32_t, glue(helper_pmovmskb, SUFFIX), (Reg *s))
-DEF_HELPER(void, glue(helper_packsswb, SUFFIX) , (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_packuswb, SUFFIX) , (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_packssdw, SUFFIX) , (Reg *d, Reg *s))
+DEF_HELPER_2(ucomiss, void, Reg, Reg)
+DEF_HELPER_2(comiss, void, Reg, Reg)
+DEF_HELPER_2(ucomisd, void, Reg, Reg)
+DEF_HELPER_2(comisd, void, Reg, Reg)
+DEF_HELPER_1(movmskps, i32, Reg)
+DEF_HELPER_1(movmskpd, i32, Reg)
+#endif
+
+DEF_HELPER_1(glue(pmovmskb, SUFFIX), i32, Reg)
+DEF_HELPER_2(glue(packsswb, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(packuswb, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(packssdw, SUFFIX), void, Reg, Reg)
 #define UNPCK_OP(base_name, base)                               \
-    DEF_HELPER(void, glue(helper_punpck ## base_name ## bw, SUFFIX) , (Reg *d, Reg *s)) \
-    DEF_HELPER(void, glue(helper_punpck ## base_name ## wd, SUFFIX) , (Reg *d, Reg *s)) \
-    DEF_HELPER(void, glue(helper_punpck ## base_name ## dq, SUFFIX) , (Reg *d, Reg *s))
+    DEF_HELPER_2(glue(punpck ## base_name ## bw, SUFFIX) , void, Reg, Reg) \
+    DEF_HELPER_2(glue(punpck ## base_name ## wd, SUFFIX) , void, Reg, Reg) \
+    DEF_HELPER_2(glue(punpck ## base_name ## dq, SUFFIX) , void, Reg, Reg)
 
 UNPCK_OP(l, 0)
@@ -235 +242 @@
 
 #if SHIFT == 1
-DEF_HELPER(void, glue(helper_punpcklqdq, SUFFIX) , (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_punpckhqdq, SUFFIX) , (Reg *d, Reg *s))
+DEF_HELPER_2(glue(punpcklqdq, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(punpckhqdq, SUFFIX), void, Reg, Reg)
 #endif
 
 /* 3DNow! float ops */
 #if SHIFT == 0
-DEF_HELPER(void, helper_pi2fd, (MMXReg *d, MMXReg *s))
-DEF_HELPER(void, helper_pi2fw, (MMXReg *d, MMXReg *s))
-DEF_HELPER(void, helper_pf2id, (MMXReg *d, MMXReg *s))
-DEF_HELPER(void, helper_pf2iw, (MMXReg *d, MMXReg *s))
-DEF_HELPER(void, helper_pfacc, (MMXReg *d, MMXReg *s))
-DEF_HELPER(void, helper_pfadd, (MMXReg *d, MMXReg *s))
-DEF_HELPER(void, helper_pfcmpeq, (MMXReg *d, MMXReg *s))
-DEF_HELPER(void, helper_pfcmpge, (MMXReg *d, MMXReg *s))
-DEF_HELPER(void, helper_pfcmpgt, (MMXReg *d, MMXReg *s))
-DEF_HELPER(void, helper_pfmax, (MMXReg *d, MMXReg *s))
-DEF_HELPER(void, helper_pfmin, (MMXReg *d, MMXReg *s))
-DEF_HELPER(void, helper_pfmul, (MMXReg *d, MMXReg *s))
-DEF_HELPER(void, helper_pfnacc, (MMXReg *d, MMXReg *s))
-DEF_HELPER(void, helper_pfpnacc, (MMXReg *d, MMXReg *s))
-DEF_HELPER(void, helper_pfrcp, (MMXReg *d, MMXReg *s))
-DEF_HELPER(void, helper_pfrsqrt, (MMXReg *d, MMXReg *s))
-DEF_HELPER(void, helper_pfsub, (MMXReg *d, MMXReg *s))
-DEF_HELPER(void, helper_pfsubr, (MMXReg *d, MMXReg *s))
-DEF_HELPER(void, helper_pswapd, (MMXReg *d, MMXReg *s))
+DEF_HELPER_2(pi2fd, void, MMXReg, MMXReg)
+DEF_HELPER_2(pi2fw, void, MMXReg, MMXReg)
+DEF_HELPER_2(pf2id, void, MMXReg, MMXReg)
+DEF_HELPER_2(pf2iw, void, MMXReg, MMXReg)
+DEF_HELPER_2(pfacc, void, MMXReg, MMXReg)
+DEF_HELPER_2(pfadd, void, MMXReg, MMXReg)
+DEF_HELPER_2(pfcmpeq, void, MMXReg, MMXReg)
+DEF_HELPER_2(pfcmpge, void, MMXReg, MMXReg)
+DEF_HELPER_2(pfcmpgt, void, MMXReg, MMXReg)
+DEF_HELPER_2(pfmax, void, MMXReg, MMXReg)
+DEF_HELPER_2(pfmin, void, MMXReg, MMXReg)
+DEF_HELPER_2(pfmul, void, MMXReg, MMXReg)
+DEF_HELPER_2(pfnacc, void, MMXReg, MMXReg)
+DEF_HELPER_2(pfpnacc, void, MMXReg, MMXReg)
+DEF_HELPER_2(pfrcp, void, MMXReg, MMXReg)
+DEF_HELPER_2(pfrsqrt, void, MMXReg, MMXReg)
+DEF_HELPER_2(pfsub, void, MMXReg, MMXReg)
+DEF_HELPER_2(pfsubr, void, MMXReg, MMXReg)
+DEF_HELPER_2(pswapd, void, MMXReg, MMXReg)
 #endif
 
 /* SSSE3 op helpers */
-DEF_HELPER(void, glue(helper_phaddw, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_phaddd, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_phaddsw, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_phsubw, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_phsubd, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_phsubsw, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pabsb, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pabsw, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pabsd, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmaddubsw, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmulhrsw, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pshufb, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_psignb, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_psignw, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_psignd, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_palignr, SUFFIX), (Reg *d, Reg *s, int32_t shift))
+DEF_HELPER_2(glue(phaddw, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(phaddd, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(phaddsw, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(phsubw, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(phsubd, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(phsubsw, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pabsb, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pabsw, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pabsd, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmaddubsw, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmulhrsw, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pshufb, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(psignb, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(psignw, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(psignd, SUFFIX), void, Reg, Reg)
+DEF_HELPER_3(glue(palignr, SUFFIX), void, Reg, Reg, s32)
 
 /* SSE4.1 op helpers */
 #if SHIFT == 1
-DEF_HELPER(void, glue(helper_pblendvb, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_blendvps, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_blendvpd, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_ptest, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmovsxbw, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmovsxbd, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmovsxbq, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmovsxwd, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmovsxwq, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmovsxdq, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmovzxbw, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmovzxbd, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmovzxbq, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmovzxwd, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmovzxwq, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmovzxdq, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmuldq, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pcmpeqq, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_packusdw, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pminsb, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pminsd, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pminuw, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pminud, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmaxsb, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmaxsd, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmaxuw, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmaxud, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pmulld, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_phminposuw, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_roundps, SUFFIX), (Reg *d, Reg *s, uint32_t mode))
-DEF_HELPER(void, glue(helper_roundpd, SUFFIX), (Reg *d, Reg *s, uint32_t mode))
-DEF_HELPER(void, glue(helper_roundss, SUFFIX), (Reg *d, Reg *s, uint32_t mode))
-DEF_HELPER(void, glue(helper_roundsd, SUFFIX), (Reg *d, Reg *s, uint32_t mode))
-DEF_HELPER(void, glue(helper_blendps, SUFFIX), (Reg *d, Reg *s, uint32_t imm))
-DEF_HELPER(void, glue(helper_blendpd, SUFFIX), (Reg *d, Reg *s, uint32_t imm))
-DEF_HELPER(void, glue(helper_pblendw, SUFFIX), (Reg *d, Reg *s, uint32_t imm))
-DEF_HELPER(void, glue(helper_dpps, SUFFIX), (Reg *d, Reg *s, uint32_t mask))
-DEF_HELPER(void, glue(helper_dppd, SUFFIX), (Reg *d, Reg *s, uint32_t mask))
-DEF_HELPER(void, glue(helper_mpsadbw, SUFFIX), (Reg *d, Reg *s, uint32_t off))
+DEF_HELPER_2(glue(pblendvb, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(blendvps, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(blendvpd, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(ptest, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmovsxbw, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmovsxbd, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmovsxbq, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmovsxwd, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmovsxwq, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmovsxdq, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmovzxbw, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmovzxbd, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmovzxbq, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmovzxwd, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmovzxwq, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmovzxdq, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmuldq, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pcmpeqq, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(packusdw, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pminsb, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pminsd, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pminuw, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pminud, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmaxsb, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmaxsd, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmaxuw, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmaxud, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(pmulld, SUFFIX), void, Reg, Reg)
+DEF_HELPER_2(glue(phminposuw, SUFFIX), void, Reg, Reg)
+DEF_HELPER_3(glue(roundps, SUFFIX), void, Reg, Reg, i32)
+DEF_HELPER_3(glue(roundpd, SUFFIX), void, Reg, Reg, i32)
+DEF_HELPER_3(glue(roundss, SUFFIX), void, Reg, Reg, i32)
+DEF_HELPER_3(glue(roundsd, SUFFIX), void, Reg, Reg, i32)
+DEF_HELPER_3(glue(blendps, SUFFIX), void, Reg, Reg, i32)
+DEF_HELPER_3(glue(blendpd, SUFFIX), void, Reg, Reg, i32)
+DEF_HELPER_3(glue(pblendw, SUFFIX), void, Reg, Reg, i32)
+DEF_HELPER_3(glue(dpps, SUFFIX), void, Reg, Reg, i32)
+DEF_HELPER_3(glue(dppd, SUFFIX), void, Reg, Reg, i32)
+DEF_HELPER_3(glue(mpsadbw, SUFFIX), void, Reg, Reg, i32)
 #endif
 
 /* SSE4.2 op helpers */
 #if SHIFT == 1
-DEF_HELPER(void, glue(helper_pcmpgtq, SUFFIX), (Reg *d, Reg *s))
-DEF_HELPER(void, glue(helper_pcmpestri, SUFFIX), (Reg *d, Reg *s, uint32_t ctl))
-DEF_HELPER(void, glue(helper_pcmpestrm, SUFFIX), (Reg *d, Reg *s, uint32_t ctl))
-DEF_HELPER(void, glue(helper_pcmpistri, SUFFIX), (Reg *d, Reg *s, uint32_t ctl))
-DEF_HELPER(void, glue(helper_pcmpistrm, SUFFIX), (Reg *d, Reg *s, uint32_t ctl))
-DEF_HELPER(target_ulong, helper_crc32,
-                (uint32_t crc1, target_ulong msg, uint32_t len))
-DEF_HELPER(target_ulong, helper_popcnt, (target_ulong n, uint32_t type))
+DEF_HELPER_2(glue(pcmpgtq, SUFFIX), void, Reg, Reg)
+DEF_HELPER_3(glue(pcmpestri, SUFFIX), void, Reg, Reg, i32)
+DEF_HELPER_3(glue(pcmpestrm, SUFFIX), void, Reg, Reg, i32)
+DEF_HELPER_3(glue(pcmpistri, SUFFIX), void, Reg, Reg, i32)
+DEF_HELPER_3(glue(pcmpistrm, SUFFIX), void, Reg, Reg, i32)
+DEF_HELPER_3(crc32, tl, i32, tl, i32)
+DEF_HELPER_2(popcnt, tl, tl, i32)
 #endif
 

trunk/src/recompiler/target-i386/translate.c

@@ -16 +16 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA  02110-1301 USA
  */
 
@@ -33 +33 @@
 #include <string.h>
 #ifndef VBOX
-# include <inttypes.h>
-# include <signal.h>
-# include <assert.h>
+#include <inttypes.h>
+#include <signal.h>
+#include <assert.h>
 #endif /* !VBOX */
 
@@ -41 +41 @@
 #include "exec-all.h"
 #include "disas.h"
+#include "tcg-op.h"
+
 #include "helper.h"
-#include "tcg-op.h"
+#define GEN_HELPER 1
+#include "helper.h"
 
 #define PREFIX_REPZ   0x01
@@ -71 +74 @@
 
 /* global register indexes */
-static TCGv cpu_env, cpu_A0, cpu_cc_op, cpu_cc_src, cpu_cc_dst, cpu_cc_tmp;
+static TCGv_ptr cpu_env;
+static TCGv cpu_A0, cpu_cc_src, cpu_cc_dst, cpu_cc_tmp;
+static TCGv_i32 cpu_cc_op;
 /* local temps */
 static TCGv cpu_T[2], cpu_T3;
 /* local register indexes (only used inside old micro ops) */
-static TCGv cpu_tmp0, cpu_tmp1_i64, cpu_tmp2_i32, cpu_tmp3_i32, cpu_tmp4, cpu_ptr0, cpu_ptr1;
+static TCGv cpu_tmp0, cpu_tmp4;
+static TCGv_ptr cpu_ptr0, cpu_ptr1;
+static TCGv_i32 cpu_tmp2_i32, cpu_tmp3_i32;
+static TCGv_i64 cpu_tmp1_i64;
 static TCGv cpu_tmp5, cpu_tmp6;
 
@@ -658 +666 @@
     default:
     case 3:
+        /* Should never happen on 32-bit targets.  */
+#ifdef TARGET_X86_64
         tcg_gen_qemu_ld64(t0, a0, mem_index);
+#endif
         break;
     }
@@ -694 +705 @@
     default:
     case 3:
+        /* Should never happen on 32-bit targets.  */
+#ifdef TARGET_X86_64
         tcg_gen_qemu_st64(t0, a0, mem_index);
+#endif
         break;
     }
@@ -716 +730 @@
     /** @todo: once TCG codegen improves, we may want to use version
         from else version */
-    tcg_gen_helper_0_0(helper_check_external_event);
+    gen_helper_check_external_event();
 # else
     int skip_label;
@@ -736 +750 @@
     tcg_temp_free(t0);
 
-    tcg_gen_helper_0_0(helper_check_external_event);
+    gen_helper_check_external_event();
 
    gen_set_label(skip_label);
@@ -745 +759 @@
 static void gen_check_external_event2()
 {
-    tcg_gen_helper_0_0(helper_check_external_event);
+    gen_helper_check_external_event();
 }
 # endif
@@ -762 +776 @@
     gen_jmp_im(pc);
 # ifdef VBOX_DUMP_STATE
-    tcg_gen_helper_0_0(helper_dump_state);
+    gen_helper_dump_state();
 # endif
 }
@@ -877 +891 @@
 }
 
-static void *helper_in_func[3] = {
-    helper_inb,
-    helper_inw,
-    helper_inl,
-};
-
-static void *helper_out_func[3] = {
-    helper_outb,
-    helper_outw,
-    helper_outl,
-};
-
-static void *gen_check_io_func[3] = {
-    helper_check_iob,
-    helper_check_iow,
-    helper_check_iol,
-};
+static void gen_helper_in_func(int ot, TCGv v, TCGv_i32 n)
+{
+    switch (ot) {
+    case 0: gen_helper_inb(v, n); break;
+    case 1: gen_helper_inw(v, n); break;
+    case 2: gen_helper_inl(v, n); break;
+    }
+
+}
+
+static void gen_helper_out_func(int ot, TCGv_i32 v, TCGv_i32 n)
+{
+    switch (ot) {
+    case 0: gen_helper_outb(v, n); break;
+    case 1: gen_helper_outw(v, n); break;
+    case 2: gen_helper_outl(v, n); break;
+    }
+
+}
 
 static void gen_check_io(DisasContext *s, int ot, target_ulong cur_eip,
@@ -908 +924 @@
         state_saved = 1;
         tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
-        tcg_gen_helper_0_1(gen_check_io_func[ot],
-                           cpu_tmp2_i32);
+        switch (ot) {
+        case 0: gen_helper_check_iob(cpu_tmp2_i32); break;
+        case 1: gen_helper_check_iow(cpu_tmp2_i32); break;
+        case 2: gen_helper_check_iol(cpu_tmp2_i32); break;
+        }
     }
     if(s->flags & HF_SVMI_MASK) {
@@ -921 +940 @@
         next_eip = s->pc - s->cs_base;
         tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
-        tcg_gen_helper_0_3(helper_svm_check_io,
-                           cpu_tmp2_i32,
-                           tcg_const_i32(svm_flags),
-                           tcg_const_i32(next_eip - cur_eip));
+        gen_helper_svm_check_io(cpu_tmp2_i32, tcg_const_i32(svm_flags),
+                                tcg_const_i32(next_eip - cur_eip));
     }
 }
@@ -980 +997 @@
 static void gen_compute_eflags_c(TCGv reg)
 {
-#if TCG_TARGET_REG_BITS == 32
-    tcg_gen_shli_i32(cpu_tmp2_i32, cpu_cc_op, 3);
-    tcg_gen_addi_i32(cpu_tmp2_i32, cpu_tmp2_i32,
-                     (long)cc_table + offsetof(CCTable, compute_c));
-    tcg_gen_ld_i32(cpu_tmp2_i32, cpu_tmp2_i32, 0);
-    tcg_gen_call(&tcg_ctx, cpu_tmp2_i32, TCG_CALL_PURE,
-                 1, &cpu_tmp2_i32, 0, NULL);
-#else
-    tcg_gen_extu_i32_tl(cpu_tmp1_i64, cpu_cc_op);
-    tcg_gen_shli_i64(cpu_tmp1_i64, cpu_tmp1_i64, 4);
-    tcg_gen_addi_i64(cpu_tmp1_i64, cpu_tmp1_i64,
-                     (long)cc_table + offsetof(CCTable, compute_c));
-    tcg_gen_ld_i64(cpu_tmp1_i64, cpu_tmp1_i64, 0);
-    tcg_gen_call(&tcg_ctx, cpu_tmp1_i64, TCG_CALL_PURE,
-                 1, &cpu_tmp2_i32, 0, NULL);
-#endif
+    gen_helper_cc_compute_c(cpu_tmp2_i32, cpu_cc_op);
     tcg_gen_extu_i32_tl(reg, cpu_tmp2_i32);
 }
@@ -1002 +1004 @@
 static void gen_compute_eflags(TCGv reg)
 {
-#if TCG_TARGET_REG_BITS == 32
-    tcg_gen_shli_i32(cpu_tmp2_i32, cpu_cc_op, 3);
-    tcg_gen_addi_i32(cpu_tmp2_i32, cpu_tmp2_i32,
-                     (long)cc_table + offsetof(CCTable, compute_all));
-    tcg_gen_ld_i32(cpu_tmp2_i32, cpu_tmp2_i32, 0);
-    tcg_gen_call(&tcg_ctx, cpu_tmp2_i32, TCG_CALL_PURE,
-                 1, &cpu_tmp2_i32, 0, NULL);
-#else
-    tcg_gen_extu_i32_tl(cpu_tmp1_i64, cpu_cc_op);
-    tcg_gen_shli_i64(cpu_tmp1_i64, cpu_tmp1_i64, 4);
-    tcg_gen_addi_i64(cpu_tmp1_i64, cpu_tmp1_i64,
-                     (long)cc_table + offsetof(CCTable, compute_all));
-    tcg_gen_ld_i64(cpu_tmp1_i64, cpu_tmp1_i64, 0);
-    tcg_gen_call(&tcg_ctx, cpu_tmp1_i64, TCG_CALL_PURE,
-                 1, &cpu_tmp2_i32, 0, NULL);
-#endif
+    gen_helper_cc_compute_all(cpu_tmp2_i32, cpu_cc_op);
     tcg_gen_extu_i32_tl(reg, cpu_tmp2_i32);
 }
@@ -1391 +1378 @@
     tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[1]);
     tcg_gen_andi_i32(cpu_tmp2_i32, cpu_tmp2_i32, 0xffff);
-    tcg_gen_helper_1_1(helper_in_func[ot], cpu_T[0], cpu_tmp2_i32);
+    gen_helper_in_func(ot, cpu_T[0], cpu_tmp2_i32);
     gen_op_st_T0_A0(ot + s->mem_index);
     gen_op_movl_T0_Dshift(ot);
@@ -1410 +1397 @@
     tcg_gen_andi_i32(cpu_tmp2_i32, cpu_tmp2_i32, 0xffff);
     tcg_gen_trunc_tl_i32(cpu_tmp3_i32, cpu_T[0]);
-    tcg_gen_helper_0_2(helper_out_func[ot], cpu_tmp2_i32, cpu_tmp3_i32);
+    gen_helper_out_func(ot, cpu_tmp2_i32, cpu_tmp3_i32);
 
     gen_op_movl_T0_Dshift(ot);
@@ -1462 +1449 @@
 GEN_REPZ2(cmps)
 
-static void *helper_fp_arith_ST0_FT0[8] = {
-    helper_fadd_ST0_FT0,
-    helper_fmul_ST0_FT0,
-    helper_fcom_ST0_FT0,
-    helper_fcom_ST0_FT0,
-    helper_fsub_ST0_FT0,
-    helper_fsubr_ST0_FT0,
-    helper_fdiv_ST0_FT0,
-    helper_fdivr_ST0_FT0,
-};
+static void gen_helper_fp_arith_ST0_FT0(int op)
+{
+    switch (op) {
+    case 0: gen_helper_fadd_ST0_FT0(); break;
+    case 1: gen_helper_fmul_ST0_FT0(); break;
+    case 2: gen_helper_fcom_ST0_FT0(); break;
+    case 3: gen_helper_fcom_ST0_FT0(); break;
+    case 4: gen_helper_fsub_ST0_FT0(); break;
+    case 5: gen_helper_fsubr_ST0_FT0(); break;
+    case 6: gen_helper_fdiv_ST0_FT0(); break;
+    case 7: gen_helper_fdivr_ST0_FT0(); break;
+    }
+}
 
 /* NOTE the exception in "r" op ordering */
-static void *helper_fp_arith_STN_ST0[8] = {
-    helper_fadd_STN_ST0,
-    helper_fmul_STN_ST0,
-    NULL,
-    NULL,
-    helper_fsubr_STN_ST0,
-    helper_fsub_STN_ST0,
-    helper_fdivr_STN_ST0,
-    helper_fdiv_STN_ST0,
-};
+static void gen_helper_fp_arith_STN_ST0(int op, int opreg)
+{
+    TCGv_i32 tmp = tcg_const_i32(opreg);
+    switch (op) {
+    case 0: gen_helper_fadd_STN_ST0(tmp); break;
+    case 1: gen_helper_fmul_STN_ST0(tmp); break;
+    case 4: gen_helper_fsubr_STN_ST0(tmp); break;
+    case 5: gen_helper_fsub_STN_ST0(tmp); break;
+    case 6: gen_helper_fdivr_STN_ST0(tmp); break;
+    case 7: gen_helper_fdiv_STN_ST0(tmp); break;
+    }
+}
 
 /* if d == OR_TMP0, it means memory operand (address in A0) */
@@ -1653 +1645 @@
 
     /* XXX: inefficient */
-    t0 = tcg_temp_local_new(TCG_TYPE_TL);
-    t1 = tcg_temp_local_new(TCG_TYPE_TL);
+    t0 = tcg_temp_local_new();
+    t1 = tcg_temp_local_new();
 
     tcg_gen_mov_tl(t0, cpu_T[0]);
@@ -1744 +1736 @@
 
     /* XXX: inefficient, but we must use local temps */
-    t0 = tcg_temp_local_new(TCG_TYPE_TL);
-    t1 = tcg_temp_local_new(TCG_TYPE_TL);
-    t2 = tcg_temp_local_new(TCG_TYPE_TL);
-    a0 = tcg_temp_local_new(TCG_TYPE_TL);
+    t0 = tcg_temp_local_new();
+    t1 = tcg_temp_local_new();
+    t2 = tcg_temp_local_new();
+    a0 = tcg_temp_local_new();
 
     if (ot == OT_QUAD)
@@ -1832 +1824 @@
 }
 
-static void *helper_rotc[8] = {
-    helper_rclb,
-    helper_rclw,
-    helper_rcll,
-    X86_64_ONLY(helper_rclq),
-    helper_rcrb,
-    helper_rcrw,
-    helper_rcrl,
-    X86_64_ONLY(helper_rcrq),
-};
-
 /* XXX: add faster immediate = 1 case */
 static void gen_rotc_rm_T1(DisasContext *s, int ot, int op1,
@@ -1858 +1839 @@
         gen_op_mov_TN_reg(ot, 0, op1);
 
-    tcg_gen_helper_1_2(helper_rotc[ot + (is_right * 4)],
-                       cpu_T[0], cpu_T[0], cpu_T[1]);
+    if (is_right) {
+        switch (ot) {
+        case 0: gen_helper_rcrb(cpu_T[0], cpu_T[0], cpu_T[1]); break;
+        case 1: gen_helper_rcrw(cpu_T[0], cpu_T[0], cpu_T[1]); break;
+        case 2: gen_helper_rcrl(cpu_T[0], cpu_T[0], cpu_T[1]); break;
+#ifdef TARGET_X86_64
+        case 3: gen_helper_rcrq(cpu_T[0], cpu_T[0], cpu_T[1]); break;
+#endif
+        }
+    } else {
+        switch (ot) {
+        case 0: gen_helper_rclb(cpu_T[0], cpu_T[0], cpu_T[1]); break;
+        case 1: gen_helper_rclw(cpu_T[0], cpu_T[0], cpu_T[1]); break;
+        case 2: gen_helper_rcll(cpu_T[0], cpu_T[0], cpu_T[1]); break;
+#ifdef TARGET_X86_64
+        case 3: gen_helper_rclq(cpu_T[0], cpu_T[0], cpu_T[1]); break;
+#endif
+        }
+    }
     /* store */
     if (op1 == OR_TMP0)
@@ -1886 +1884 @@
     TCGv t0, t1, t2, a0;
 
-    t0 = tcg_temp_local_new(TCG_TYPE_TL);
-    t1 = tcg_temp_local_new(TCG_TYPE_TL);
-    t2 = tcg_temp_local_new(TCG_TYPE_TL);
-    a0 = tcg_temp_local_new(TCG_TYPE_TL);
+    t0 = tcg_temp_local_new();
+    t1 = tcg_temp_local_new();
+    t2 = tcg_temp_local_new();
+    a0 = tcg_temp_local_new();
 
     if (ot == OT_QUAD)
@@ -2449 +2447 @@
         /* nominal case: we use a jump */
         /* XXX: make it faster by adding new instructions in TCG */
-        t0 = tcg_temp_local_new(TCG_TYPE_TL);
+        t0 = tcg_temp_local_new();
         tcg_gen_movi_tl(t0, 0);
         l1 = gen_new_label();
@@ -2507 +2505 @@
         gen_jmp_im(cur_eip);
         tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
-        tcg_gen_helper_0_2(helper_load_seg, tcg_const_i32(seg_reg), cpu_tmp2_i32);
+        gen_helper_load_seg(tcg_const_i32(seg_reg), cpu_tmp2_i32);
         /* abort translation because the addseg value may change or
            because ss32 may change. For R_SS, translation must always
@@ -2536 +2534 @@
         gen_op_set_cc_op(s->cc_op);
     gen_jmp_im(pc_start - s->cs_base);
-    tcg_gen_helper_0_2(helper_svm_check_intercept_param,
-                       tcg_const_i32(type), tcg_const_i64(param));
+    gen_helper_svm_check_intercept_param(tcg_const_i32(type),
+                                         tcg_const_i64(param));
 }
 
@@ -2744 +2742 @@
         if (level) {
             /* XXX: must save state */
-            tcg_gen_helper_0_3(helper_enter64_level,
-                               tcg_const_i32(level),
-                               tcg_const_i32((ot == OT_QUAD)),
-                               cpu_T[1]);
+            gen_helper_enter64_level(tcg_const_i32(level),
+                                     tcg_const_i32((ot == OT_QUAD)),
+                                     cpu_T[1]);
         }
         gen_op_mov_reg_T1(ot, R_EBP);
@@ -2770 +2767 @@
         if (level) {
             /* XXX: must save state */
-            tcg_gen_helper_0_3(helper_enter_level,
-                               tcg_const_i32(level),
-                               tcg_const_i32(s->dflag),
-                               cpu_T[1]);
+            gen_helper_enter_level(tcg_const_i32(level),
+                                   tcg_const_i32(s->dflag),
+                                   cpu_T[1]);
         }
         gen_op_mov_reg_T1(ot, R_EBP);
@@ -2786 +2782 @@
         gen_op_set_cc_op(s->cc_op);
     gen_jmp_im(cur_eip);
-    tcg_gen_helper_0_1(helper_raise_exception, tcg_const_i32(trapno));
+    gen_helper_raise_exception(tcg_const_i32(trapno));
     s->is_jmp = 3;
 }
@@ -2798 +2794 @@
         gen_op_set_cc_op(s->cc_op);
     gen_jmp_im(cur_eip);
-    tcg_gen_helper_0_2(helper_raise_interrupt,
-                       tcg_const_i32(intno),
-                       tcg_const_i32(next_eip - cur_eip));
+    gen_helper_raise_interrupt(tcg_const_i32(intno),
+                               tcg_const_i32(next_eip - cur_eip));
     s->is_jmp = 3;
 }
@@ -2809 +2804 @@
         gen_op_set_cc_op(s->cc_op);
     gen_jmp_im(cur_eip);
-    tcg_gen_helper_0_0(helper_debug);
+    gen_helper_debug();
     s->is_jmp = 3;
 }
@@ -2820 +2815 @@
         gen_op_set_cc_op(s->cc_op);
     if (s->tb->flags & HF_INHIBIT_IRQ_MASK) {
-        tcg_gen_helper_0_0(helper_reset_inhibit_irq);
+        gen_helper_reset_inhibit_irq();
     }
-
-#ifdef VBOX
-    gen_check_external_event();
-#endif /* VBOX */
-
     if (   s->singlestep_enabled
 #ifdef VBOX
@@ -2833 +2823 @@
 #endif
        ) {
-        tcg_gen_helper_0_0(helper_debug);
+        gen_helper_debug();
     } else if (s->tf) {
-        tcg_gen_helper_0_0(helper_single_step);
+        gen_helper_single_step();
     } else {
         tcg_gen_exit_tb(0);
@@ -2927 +2917 @@
 #define SSE_DUMMY ((void *)2)
 
-#define MMX_OP2(x) { helper_ ## x ## _mmx, helper_ ## x ## _xmm }
-#define SSE_FOP(x) { helper_ ## x ## ps, helper_ ## x ## pd, \
-                     helper_ ## x ## ss, helper_ ## x ## sd, }
+#define MMX_OP2(x) { gen_helper_ ## x ## _mmx, gen_helper_ ## x ## _xmm }
+#define SSE_FOP(x) { gen_helper_ ## x ## ps, gen_helper_ ## x ## pd, \
+                     gen_helper_ ## x ## ss, gen_helper_ ## x ## sd, }
 
 static void *sse_op_table1[256][4] = {
@@ -2940 +2930 @@
     [0x12] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, /* movlps, movlpd, movsldup, movddup */
     [0x13] = { SSE_SPECIAL, SSE_SPECIAL },  /* movlps, movlpd */
-    [0x14] = { helper_punpckldq_xmm, helper_punpcklqdq_xmm },
-    [0x15] = { helper_punpckhdq_xmm, helper_punpckhqdq_xmm },
+    [0x14] = { gen_helper_punpckldq_xmm, gen_helper_punpcklqdq_xmm },
+    [0x15] = { gen_helper_punpckhdq_xmm, gen_helper_punpckhqdq_xmm },
     [0x16] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL },  /* movhps, movhpd, movshdup */
     [0x17] = { SSE_SPECIAL, SSE_SPECIAL },  /* movhps, movhpd */
@@ -2951 +2941 @@
     [0x2c] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, /* cvttps2pi, cvttpd2pi, cvttsd2si, cvttss2si */
     [0x2d] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, /* cvtps2pi, cvtpd2pi, cvtsd2si, cvtss2si */
-    [0x2e] = { helper_ucomiss, helper_ucomisd },
-    [0x2f] = { helper_comiss, helper_comisd },
+    [0x2e] = { gen_helper_ucomiss, gen_helper_ucomisd },
+    [0x2f] = { gen_helper_comiss, gen_helper_comisd },
     [0x50] = { SSE_SPECIAL, SSE_SPECIAL }, /* movmskps, movmskpd */
     [0x51] = SSE_FOP(sqrt),
-    [0x52] = { helper_rsqrtps, NULL, helper_rsqrtss, NULL },
-    [0x53] = { helper_rcpps, NULL, helper_rcpss, NULL },
-    [0x54] = { helper_pand_xmm, helper_pand_xmm }, /* andps, andpd */
-    [0x55] = { helper_pandn_xmm, helper_pandn_xmm }, /* andnps, andnpd */
-    [0x56] = { helper_por_xmm, helper_por_xmm }, /* orps, orpd */
-    [0x57] = { helper_pxor_xmm, helper_pxor_xmm }, /* xorps, xorpd */
+    [0x52] = { gen_helper_rsqrtps, NULL, gen_helper_rsqrtss, NULL },
+    [0x53] = { gen_helper_rcpps, NULL, gen_helper_rcpss, NULL },
+    [0x54] = { gen_helper_pand_xmm, gen_helper_pand_xmm }, /* andps, andpd */
+    [0x55] = { gen_helper_pandn_xmm, gen_helper_pandn_xmm }, /* andnps, andnpd */
+    [0x56] = { gen_helper_por_xmm, gen_helper_por_xmm }, /* orps, orpd */
+    [0x57] = { gen_helper_pxor_xmm, gen_helper_pxor_xmm }, /* xorps, xorpd */
     [0x58] = SSE_FOP(add),
     [0x59] = SSE_FOP(mul),
-    [0x5a] = { helper_cvtps2pd, helper_cvtpd2ps,
-               helper_cvtss2sd, helper_cvtsd2ss },
-    [0x5b] = { helper_cvtdq2ps, helper_cvtps2dq, helper_cvttps2dq },
+    [0x5a] = { gen_helper_cvtps2pd, gen_helper_cvtpd2ps,
+               gen_helper_cvtss2sd, gen_helper_cvtsd2ss },
+    [0x5b] = { gen_helper_cvtdq2ps, gen_helper_cvtps2dq, gen_helper_cvttps2dq },
     [0x5c] = SSE_FOP(sub),
     [0x5d] = SSE_FOP(min),
@@ -2972 +2962 @@
 
     [0xc2] = SSE_FOP(cmpeq),
-    [0xc6] = { helper_shufps, helper_shufpd },
+    [0xc6] = { gen_helper_shufps, gen_helper_shufpd },
 
     [0x38] = { SSE_SPECIAL, SSE_SPECIAL, NULL, SSE_SPECIAL }, /* SSSE3/SSE4 */
@@ -2990 +2980 @@
     [0x6a] = MMX_OP2(punpckhdq),
     [0x6b] = MMX_OP2(packssdw),
-    [0x6c] = { NULL, helper_punpcklqdq_xmm },
-    [0x6d] = { NULL, helper_punpckhqdq_xmm },
+    [0x6c] = { NULL, gen_helper_punpcklqdq_xmm },
+    [0x6d] = { NULL, gen_helper_punpckhqdq_xmm },
     [0x6e] = { SSE_SPECIAL, SSE_SPECIAL }, /* movd mm, ea */
     [0x6f] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, /* movq, movdqa, , movqdu */
-    [0x70] = { helper_pshufw_mmx,
-               helper_pshufd_xmm,
-               helper_pshufhw_xmm,
-               helper_pshuflw_xmm },
+    [0x70] = { gen_helper_pshufw_mmx,
+               gen_helper_pshufd_xmm,
+               gen_helper_pshufhw_xmm,
+               gen_helper_pshuflw_xmm },
     [0x71] = { SSE_SPECIAL, SSE_SPECIAL }, /* shiftw */
     [0x72] = { SSE_SPECIAL, SSE_SPECIAL }, /* shiftd */
@@ -3005 +2995 @@
     [0x76] = MMX_OP2(pcmpeql),
     [0x77] = { SSE_DUMMY }, /* emms */
-    [0x7c] = { NULL, helper_haddpd, NULL, helper_haddps },
-    [0x7d] = { NULL, helper_hsubpd, NULL, helper_hsubps },
+    [0x7c] = { NULL, gen_helper_haddpd, NULL, gen_helper_haddps },
+    [0x7d] = { NULL, gen_helper_hsubpd, NULL, gen_helper_hsubps },
     [0x7e] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, /* movd, movd, , movq */
     [0x7f] = { SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL }, /* movq, movdqa, movdqu */
     [0xc4] = { SSE_SPECIAL, SSE_SPECIAL }, /* pinsrw */
     [0xc5] = { SSE_SPECIAL, SSE_SPECIAL }, /* pextrw */
-    [0xd0] = { NULL, helper_addsubpd, NULL, helper_addsubps },
+    [0xd0] = { NULL, gen_helper_addsubpd, NULL, gen_helper_addsubps },
     [0xd1] = MMX_OP2(psrlw),
     [0xd2] = MMX_OP2(psrld),
@@ -3033 +3023 @@
     [0xe4] = MMX_OP2(pmulhuw),
     [0xe5] = MMX_OP2(pmulhw),
-    [0xe6] = { NULL, helper_cvttpd2dq, helper_cvtdq2pd, helper_cvtpd2dq },
+    [0xe6] = { NULL, gen_helper_cvttpd2dq, gen_helper_cvtdq2pd, gen_helper_cvtpd2dq },
     [0xe7] = { SSE_SPECIAL , SSE_SPECIAL },  /* movntq, movntq */
     [0xe8] = MMX_OP2(psubsb),
@@ -3068 +3058 @@
     [8 + 6] = MMX_OP2(pslld),
     [16 + 2] = MMX_OP2(psrlq),
-    [16 + 3] = { NULL, helper_psrldq_xmm },
+    [16 + 3] = { NULL, gen_helper_psrldq_xmm },
     [16 + 6] = MMX_OP2(psllq),
-    [16 + 7] = { NULL, helper_pslldq_xmm },
+    [16 + 7] = { NULL, gen_helper_pslldq_xmm },
 };
 
 static void *sse_op_table3[4 * 3] = {
-    helper_cvtsi2ss,
-    helper_cvtsi2sd,
-    X86_64_ONLY(helper_cvtsq2ss),
-    X86_64_ONLY(helper_cvtsq2sd),
-
-    helper_cvttss2si,
-    helper_cvttsd2si,
-    X86_64_ONLY(helper_cvttss2sq),
-    X86_64_ONLY(helper_cvttsd2sq),
-
-    helper_cvtss2si,
-    helper_cvtsd2si,
-    X86_64_ONLY(helper_cvtss2sq),
-    X86_64_ONLY(helper_cvtsd2sq),
+    gen_helper_cvtsi2ss,
+    gen_helper_cvtsi2sd,
+    X86_64_ONLY(gen_helper_cvtsq2ss),
+    X86_64_ONLY(gen_helper_cvtsq2sd),
+
+    gen_helper_cvttss2si,
+    gen_helper_cvttsd2si,
+    X86_64_ONLY(gen_helper_cvttss2sq),
+    X86_64_ONLY(gen_helper_cvttsd2sq),
+
+    gen_helper_cvtss2si,
+    gen_helper_cvtsd2si,
+    X86_64_ONLY(gen_helper_cvtss2sq),
+    X86_64_ONLY(gen_helper_cvtsd2sq),
 };
 
@@ -3102 +3092 @@
 
 static void *sse_op_table5[256] = {
-    [0x0c] = helper_pi2fw,
-    [0x0d] = helper_pi2fd,
-    [0x1c] = helper_pf2iw,
-    [0x1d] = helper_pf2id,
-    [0x8a] = helper_pfnacc,
-    [0x8e] = helper_pfpnacc,
-    [0x90] = helper_pfcmpge,
-    [0x94] = helper_pfmin,
-    [0x96] = helper_pfrcp,
-    [0x97] = helper_pfrsqrt,
-    [0x9a] = helper_pfsub,
-    [0x9e] = helper_pfadd,
-    [0xa0] = helper_pfcmpgt,
-    [0xa4] = helper_pfmax,
-    [0xa6] = helper_movq, /* pfrcpit1; no need to actually increase precision */
-    [0xa7] = helper_movq, /* pfrsqit1 */
-    [0xaa] = helper_pfsubr,
-    [0xae] = helper_pfacc,
-    [0xb0] = helper_pfcmpeq,
-    [0xb4] = helper_pfmul,
-    [0xb6] = helper_movq, /* pfrcpit2 */
-    [0xb7] = helper_pmulhrw_mmx,
-    [0xbb] = helper_pswapd,
-    [0xbf] = helper_pavgb_mmx /* pavgusb */
+    [0x0c] = gen_helper_pi2fw,
+    [0x0d] = gen_helper_pi2fd,
+    [0x1c] = gen_helper_pf2iw,
+    [0x1d] = gen_helper_pf2id,
+    [0x8a] = gen_helper_pfnacc,
+    [0x8e] = gen_helper_pfpnacc,
+    [0x90] = gen_helper_pfcmpge,
+    [0x94] = gen_helper_pfmin,
+    [0x96] = gen_helper_pfrcp,
+    [0x97] = gen_helper_pfrsqrt,
+    [0x9a] = gen_helper_pfsub,
+    [0x9e] = gen_helper_pfadd,
+    [0xa0] = gen_helper_pfcmpgt,
+    [0xa4] = gen_helper_pfmax,
+    [0xa6] = gen_helper_movq, /* pfrcpit1; no need to actually increase precision */
+    [0xa7] = gen_helper_movq, /* pfrsqit1 */
+    [0xaa] = gen_helper_pfsubr,
+    [0xae] = gen_helper_pfacc,
+    [0xb0] = gen_helper_pfcmpeq,
+    [0xb4] = gen_helper_pfmul,
+    [0xb6] = gen_helper_movq, /* pfrcpit2 */
+    [0xb7] = gen_helper_pmulhrw_mmx,
+    [0xbb] = gen_helper_pswapd,
+    [0xbf] = gen_helper_pavgb_mmx /* pavgusb */
 };
 
@@ -3132 +3122 @@
 };
 #define SSSE3_OP(x) { MMX_OP2(x), CPUID_EXT_SSSE3 }
-#define SSE41_OP(x) { { NULL, helper_ ## x ## _xmm }, CPUID_EXT_SSE41 }
-#define SSE42_OP(x) { { NULL, helper_ ## x ## _xmm }, CPUID_EXT_SSE42 }
+#define SSE41_OP(x) { { NULL, gen_helper_ ## x ## _xmm }, CPUID_EXT_SSE41 }
+#define SSE42_OP(x) { { NULL, gen_helper_ ## x ## _xmm }, CPUID_EXT_SSE42 }
 #define SSE41_SPECIAL { { NULL, SSE_SPECIAL }, CPUID_EXT_SSE41 }
 static struct sse_op_helper_s sse_op_table6[256] = {
@@ -3254 +3244 @@
             goto illegal_op;
         /* femms */
-        tcg_gen_helper_0_0(helper_emms);
+        gen_helper_emms();
         return;
     }
     if (b == 0x77) {
         /* emms */
-        tcg_gen_helper_0_0(helper_emms);
+        gen_helper_emms();
         return;
     }
@@ -3265 +3255 @@
        the static cpu state) */
     if (!is_xmm) {
-        tcg_gen_helper_0_0(helper_enter_mmx);
+        gen_helper_enter_mmx();
     }
 
@@ -3302 +3292 @@
                 tcg_gen_addi_ptr(cpu_ptr0, cpu_env,
                                  offsetof(CPUX86State,fpregs[reg].mmx));
-                tcg_gen_helper_0_2(helper_movl_mm_T0_mmx, cpu_ptr0, cpu_T[0]);
+                tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
+                gen_helper_movl_mm_T0_mmx(cpu_ptr0, cpu_tmp2_i32);
             }
             break;
@@ -3311 +3302 @@
                 tcg_gen_addi_ptr(cpu_ptr0, cpu_env,
                                  offsetof(CPUX86State,xmm_regs[reg]));
-                tcg_gen_helper_0_2(helper_movq_mm_T0_xmm, cpu_ptr0, cpu_T[0]);
+                gen_helper_movq_mm_T0_xmm(cpu_ptr0, cpu_T[0]);
             } else
 #endif
@@ -3319 +3310 @@
                                  offsetof(CPUX86State,xmm_regs[reg]));
                 tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
-                tcg_gen_helper_0_2(helper_movl_mm_T0_xmm, cpu_ptr0, cpu_tmp2_i32);
+                gen_helper_movl_mm_T0_xmm(cpu_ptr0, cpu_tmp2_i32);
             }
             break;
@@ -3580 +3571 @@
             tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op2_offset);
             tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op1_offset);
-            tcg_gen_helper_0_2(sse_op2, cpu_ptr0, cpu_ptr1);
+            ((void (*)(TCGv_ptr, TCGv_ptr))sse_op2)(cpu_ptr0, cpu_ptr1);
             break;
         case 0x050: /* movmskps */
@@ -3586 +3577 @@
             tcg_gen_addi_ptr(cpu_ptr0, cpu_env,
                              offsetof(CPUX86State,xmm_regs[rm]));
-            tcg_gen_helper_1_1(helper_movmskps, cpu_tmp2_i32, cpu_ptr0);
+            gen_helper_movmskps(cpu_tmp2_i32, cpu_ptr0);
             tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32);
             gen_op_mov_reg_T0(OT_LONG, reg);
@@ -3594 +3585 @@
             tcg_gen_addi_ptr(cpu_ptr0, cpu_env,
                              offsetof(CPUX86State,xmm_regs[rm]));
-            tcg_gen_helper_1_1(helper_movmskpd, cpu_tmp2_i32, cpu_ptr0);
+            gen_helper_movmskpd(cpu_tmp2_i32, cpu_ptr0);
             tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32);
             gen_op_mov_reg_T0(OT_LONG, reg);
@@ -3600 +3591 @@
         case 0x02a: /* cvtpi2ps */
         case 0x12a: /* cvtpi2pd */
-            tcg_gen_helper_0_0(helper_enter_mmx);
+            gen_helper_enter_mmx();
             if (mod != 3) {
                 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
@@ -3614 +3605 @@
             switch(b >> 8) {
             case 0x0:
-                tcg_gen_helper_0_2(helper_cvtpi2ps, cpu_ptr0, cpu_ptr1);
+                gen_helper_cvtpi2ps(cpu_ptr0, cpu_ptr1);
                 break;
             default:
             case 0x1:
-                tcg_gen_helper_0_2(helper_cvtpi2pd, cpu_ptr0, cpu_ptr1);
+                gen_helper_cvtpi2pd(cpu_ptr0, cpu_ptr1);
                 break;
             }
@@ -3631 +3622 @@
             if (ot == OT_LONG) {
                 tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
-                tcg_gen_helper_0_2(sse_op2, cpu_ptr0, cpu_tmp2_i32);
+                ((void (*)(TCGv_ptr, TCGv_i32))sse_op2)(cpu_ptr0, cpu_tmp2_i32);
             } else {
-                tcg_gen_helper_0_2(sse_op2, cpu_ptr0, cpu_T[0]);
+                ((void (*)(TCGv_ptr, TCGv))sse_op2)(cpu_ptr0, cpu_T[0]);
             }
             break;
@@ -3640 +3631 @@
         case 0x02d: /* cvtps2pi */
         case 0x12d: /* cvtpd2pi */
-            tcg_gen_helper_0_0(helper_enter_mmx);
+            gen_helper_enter_mmx();
             if (mod != 3) {
                 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
@@ -3654 +3645 @@
             switch(b) {
             case 0x02c:
-                tcg_gen_helper_0_2(helper_cvttps2pi, cpu_ptr0, cpu_ptr1);
+                gen_helper_cvttps2pi(cpu_ptr0, cpu_ptr1);
                 break;
             case 0x12c:
-                tcg_gen_helper_0_2(helper_cvttpd2pi, cpu_ptr0, cpu_ptr1);
+                gen_helper_cvttpd2pi(cpu_ptr0, cpu_ptr1);
                 break;
             case 0x02d:
-                tcg_gen_helper_0_2(helper_cvtps2pi, cpu_ptr0, cpu_ptr1);
+                gen_helper_cvtps2pi(cpu_ptr0, cpu_ptr1);
                 break;
             case 0x12d:
-                tcg_gen_helper_0_2(helper_cvtpd2pi, cpu_ptr0, cpu_ptr1);
+                gen_helper_cvtpd2pi(cpu_ptr0, cpu_ptr1);
                 break;
             }
@@ -3689 +3680 @@
             tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op2_offset);
             if (ot == OT_LONG) {
-                tcg_gen_helper_1_1(sse_op2, cpu_tmp2_i32, cpu_ptr0);
+                ((void (*)(TCGv_i32, TCGv_ptr))sse_op2)(cpu_tmp2_i32, cpu_ptr0);
                 tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32);
             } else {
-                tcg_gen_helper_1_1(sse_op2, cpu_T[0], cpu_ptr0);
+                ((void (*)(TCGv, TCGv_ptr))sse_op2)(cpu_T[0], cpu_ptr0);
             }
             gen_op_mov_reg_T0(ot, reg);
@@ -3743 +3734 @@
             break;
         case 0x2d6: /* movq2dq */
-            tcg_gen_helper_0_0(helper_enter_mmx);
+            gen_helper_enter_mmx();
             rm = (modrm & 7);
             gen_op_movq(offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)),
@@ -3750 +3741 @@
             break;
         case 0x3d6: /* movdq2q */
-            tcg_gen_helper_0_0(helper_enter_mmx);
+            gen_helper_enter_mmx();
             rm = (modrm & 7) | REX_B(s);
             gen_op_movq(offsetof(CPUX86State,fpregs[reg & 7].mmx),
@@ -3762 +3753 @@
                 rm = (modrm & 7) | REX_B(s);
                 tcg_gen_addi_ptr(cpu_ptr0, cpu_env, offsetof(CPUX86State,xmm_regs[rm]));
-                tcg_gen_helper_1_1(helper_pmovmskb_xmm, cpu_tmp2_i32, cpu_ptr0);
+                gen_helper_pmovmskb_xmm(cpu_tmp2_i32, cpu_ptr0);
             } else {
                 rm = (modrm & 7);
                 tcg_gen_addi_ptr(cpu_ptr0, cpu_env, offsetof(CPUX86State,fpregs[rm].mmx));
-                tcg_gen_helper_1_1(helper_pmovmskb_mmx, cpu_tmp2_i32, cpu_ptr0);
+                gen_helper_pmovmskb_mmx(cpu_tmp2_i32, cpu_ptr0);
             }
             tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32);
@@ -3804 +3795 @@
                     case 0x21: case 0x31: /* pmovsxbd, pmovzxbd */
                     case 0x24: case 0x34: /* pmovsxwq, pmovzxwq */
-                        tcg_gen_qemu_ld32u(cpu_tmp2_i32, cpu_A0,
+                        tcg_gen_qemu_ld32u(cpu_tmp0, cpu_A0,
                                           (s->mem_index >> 2) - 1);
+                        tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_tmp0);
                         tcg_gen_st_i32(cpu_tmp2_i32, cpu_env, op2_offset +
                                         offsetof(XMMReg, XMM_L(0)));
@@ -3837 +3829 @@
             tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset);
             tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset);
-            tcg_gen_helper_0_2(sse_op2, cpu_ptr0, cpu_ptr1);
+            ((void (*)(TCGv_ptr, TCGv_ptr))sse_op2)(cpu_ptr0, cpu_ptr1);
 
             if (b == 0x17)
@@ -3866 +3858 @@
             tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
             gen_ldst_modrm(s, modrm, ot, OR_TMP0, 0);
-            tcg_gen_helper_1_3(helper_crc32, cpu_T[0], cpu_tmp2_i32,
-                            cpu_T[0], tcg_const_i32(8 << ot));
+            gen_helper_crc32(cpu_T[0], cpu_tmp2_i32,
+                             cpu_T[0], tcg_const_i32(8 << ot));
 
             ot = (s->dflag == 2) ? OT_QUAD : OT_LONG;
@@ -3917 +3909 @@
                                         offsetof(CPUX86State,
                                                 xmm_regs[reg].XMM_L(val & 3)));
+                        tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32);
                         if (mod == 3)
-                            gen_op_mov_reg_v(ot, rm, cpu_tmp2_i32);
+                            gen_op_mov_reg_v(ot, rm, cpu_T[0]);
                         else
-                            tcg_gen_qemu_st32(cpu_tmp2_i32, cpu_A0,
+                            tcg_gen_qemu_st32(cpu_T[0], cpu_A0,
                                             (s->mem_index >> 2) - 1);
                     } else { /* pextrq */
+#ifdef TARGET_X86_64
                         tcg_gen_ld_i64(cpu_tmp1_i64, cpu_env,
                                         offsetof(CPUX86State,
@@ -3931 +3925 @@
                             tcg_gen_qemu_st64(cpu_tmp1_i64, cpu_A0,
                                             (s->mem_index >> 2) - 1);
+#else
+                        goto illegal_op;
+#endif
                     }
                     break;
@@ -3946 +3943 @@
                         gen_op_mov_TN_reg(OT_LONG, 0, rm);
                     else
-                        tcg_gen_qemu_ld8u(cpu_T[0], cpu_A0,
+                        tcg_gen_qemu_ld8u(cpu_tmp0, cpu_A0,
                                         (s->mem_index >> 2) - 1);
-                    tcg_gen_st8_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,
+                    tcg_gen_st8_tl(cpu_tmp0, cpu_env, offsetof(CPUX86State,
                                             xmm_regs[reg].XMM_B(val & 15)));
                     break;
                 case 0x21: /* insertps */
-                    if (mod == 3)
+                    if (mod == 3) {
                         tcg_gen_ld_i32(cpu_tmp2_i32, cpu_env,
                                         offsetof(CPUX86State,xmm_regs[rm]
                                                 .XMM_L((val >> 6) & 3)));
-                    else
-                        tcg_gen_qemu_ld32u(cpu_tmp2_i32, cpu_A0,
+                    } else {
+                        tcg_gen_qemu_ld32u(cpu_tmp0, cpu_A0,
                                         (s->mem_index >> 2) - 1);
+                        tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_tmp0);
+                    }
                     tcg_gen_st_i32(cpu_tmp2_i32, cpu_env,
                                     offsetof(CPUX86State,xmm_regs[reg]
@@ -3982 +3981 @@
                     if (ot == OT_LONG) { /* pinsrd */
                         if (mod == 3)
-                            gen_op_mov_v_reg(ot, cpu_tmp2_i32, rm);
+                            gen_op_mov_v_reg(ot, cpu_tmp0, rm);
                         else
-                            tcg_gen_qemu_ld32u(cpu_tmp2_i32, cpu_A0,
+                            tcg_gen_qemu_ld32u(cpu_tmp0, cpu_A0,
                                             (s->mem_index >> 2) - 1);
+                        tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_tmp0);
                         tcg_gen_st_i32(cpu_tmp2_i32, cpu_env,
                                         offsetof(CPUX86State,
                                                 xmm_regs[reg].XMM_L(val & 3)));
                     } else { /* pinsrq */
+#ifdef TARGET_X86_64
                         if (mod == 3)
                             gen_op_mov_v_reg(ot, cpu_tmp1_i64, rm);
@@ -3998 +3999 @@
                                         offsetof(CPUX86State,
                                                 xmm_regs[reg].XMM_Q(val & 1)));
+#else
+                        goto illegal_op;
+#endif
                     }
                     break;
@@ -4035 +4039 @@
             tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset);
             tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset);
-            tcg_gen_helper_0_3(sse_op2, cpu_ptr0, cpu_ptr1, tcg_const_i32(val));
+            ((void (*)(TCGv_ptr, TCGv_ptr, TCGv_i32))sse_op2)(cpu_ptr0, cpu_ptr1, tcg_const_i32(val));
             break;
         default:
@@ -4095 +4099 @@
             tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset);
             tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset);
-            tcg_gen_helper_0_2(sse_op2, cpu_ptr0, cpu_ptr1);
+            ((void (*)(TCGv_ptr, TCGv_ptr))sse_op2)(cpu_ptr0, cpu_ptr1);
             break;
         case 0x70: /* pshufx insn */
@@ -4102 +4106 @@
             tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset);
             tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset);
-            tcg_gen_helper_0_3(sse_op2, cpu_ptr0, cpu_ptr1, tcg_const_i32(val));
+            ((void (*)(TCGv_ptr, TCGv_ptr, TCGv_i32))sse_op2)(cpu_ptr0, cpu_ptr1, tcg_const_i32(val));
             break;
         case 0xc2:
@@ -4112 +4116 @@
             tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset);
             tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset);
-            tcg_gen_helper_0_2(sse_op2, cpu_ptr0, cpu_ptr1);
+            ((void (*)(TCGv_ptr, TCGv_ptr))sse_op2)(cpu_ptr0, cpu_ptr1);
             break;
         case 0xf7:
@@ -4132 +4136 @@
             tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset);
             tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset);
-            tcg_gen_helper_0_3(sse_op2, cpu_ptr0, cpu_ptr1, cpu_A0);
+            ((void (*)(TCGv_ptr, TCGv_ptr, TCGv))sse_op2)(cpu_ptr0, cpu_ptr1, cpu_A0);
             break;
         default:
             tcg_gen_addi_ptr(cpu_ptr0, cpu_env, op1_offset);
             tcg_gen_addi_ptr(cpu_ptr1, cpu_env, op2_offset);
-            tcg_gen_helper_0_2(sse_op2, cpu_ptr0, cpu_ptr1);
+            ((void (*)(TCGv_ptr, TCGv_ptr))sse_op2)(cpu_ptr0, cpu_ptr1);
             break;
         }
@@ -4298 +4302 @@
     int rex_w, rex_r;
 
-    if (unlikely(loglevel & CPU_LOG_TB_OP))
+    if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP)))
         tcg_gen_debug_insn_start(pc_start);
     s->pc = pc_start;
@@ -4431 +4435 @@
 #ifndef VBOX
     if (prefixes & PREFIX_LOCK)
-        tcg_gen_helper_0_0(helper_lock);
+        gen_helper_lock();
 #else /* VBOX */
     if (prefixes & PREFIX_LOCK) {
@@ -4438 +4442 @@
             return s->pc;
         }
-        tcg_gen_helper_0_0(helper_lock);
+        gen_helper_lock();
     }
 #endif /* VBOX */
@@ -4659 +4663 @@
 #else
                 {
-                    TCGv t0, t1;
-                    t0 = tcg_temp_new(TCG_TYPE_I64);
-                    t1 = tcg_temp_new(TCG_TYPE_I64);
+                    TCGv_i64 t0, t1;
+                    t0 = tcg_temp_new_i64();
+                    t1 = tcg_temp_new_i64();
                     gen_op_mov_TN_reg(OT_LONG, 1, R_EAX);
                     tcg_gen_extu_i32_i64(t0, cpu_T[0]);
@@ -4679 +4683 @@
 #ifdef TARGET_X86_64
             case OT_QUAD:
-                tcg_gen_helper_0_1(helper_mulq_EAX_T0, cpu_T[0]);
+                gen_helper_mulq_EAX_T0(cpu_T[0]);
                 s->cc_op = CC_OP_MULQ;
                 break;
@@ -4728 +4732 @@
 #else
                 {
-                    TCGv t0, t1;
-                    t0 = tcg_temp_new(TCG_TYPE_I64);
-                    t1 = tcg_temp_new(TCG_TYPE_I64);
+                    TCGv_i64 t0, t1;
+                    t0 = tcg_temp_new_i64();
+                    t1 = tcg_temp_new_i64();
                     gen_op_mov_TN_reg(OT_LONG, 1, R_EAX);
                     tcg_gen_ext_i32_i64(t0, cpu_T[0]);
@@ -4749 +4753 @@
 #ifdef TARGET_X86_64
             case OT_QUAD:
-                tcg_gen_helper_0_1(helper_imulq_EAX_T0, cpu_T[0]);
+                gen_helper_imulq_EAX_T0(cpu_T[0]);
                 s->cc_op = CC_OP_MULQ;
                 break;
@@ -4759 +4763 @@
             case OT_BYTE:
                 gen_jmp_im(pc_start - s->cs_base);
-                tcg_gen_helper_0_1(helper_divb_AL, cpu_T[0]);
+                gen_helper_divb_AL(cpu_T[0]);
                 break;
             case OT_WORD:
                 gen_jmp_im(pc_start - s->cs_base);
-                tcg_gen_helper_0_1(helper_divw_AX, cpu_T[0]);
+                gen_helper_divw_AX(cpu_T[0]);
                 break;
             default:
             case OT_LONG:
                 gen_jmp_im(pc_start - s->cs_base);
-                tcg_gen_helper_0_1(helper_divl_EAX, cpu_T[0]);
+                gen_helper_divl_EAX(cpu_T[0]);
                 break;
 #ifdef TARGET_X86_64
             case OT_QUAD:
                 gen_jmp_im(pc_start - s->cs_base);
-                tcg_gen_helper_0_1(helper_divq_EAX, cpu_T[0]);
+                gen_helper_divq_EAX(cpu_T[0]);
                 break;
 #endif
@@ -4782 +4786 @@
             case OT_BYTE:
                 gen_jmp_im(pc_start - s->cs_base);
-                tcg_gen_helper_0_1(helper_idivb_AL, cpu_T[0]);
+                gen_helper_idivb_AL(cpu_T[0]);
                 break;
             case OT_WORD:
                 gen_jmp_im(pc_start - s->cs_base);
-                tcg_gen_helper_0_1(helper_idivw_AX, cpu_T[0]);
+                gen_helper_idivw_AX(cpu_T[0]);
                 break;
             default:
             case OT_LONG:
                 gen_jmp_im(pc_start - s->cs_base);
-                tcg_gen_helper_0_1(helper_idivl_EAX, cpu_T[0]);
+                gen_helper_idivl_EAX(cpu_T[0]);
                 break;
 #ifdef TARGET_X86_64
             case OT_QUAD:
                 gen_jmp_im(pc_start - s->cs_base);
-                tcg_gen_helper_0_1(helper_idivq_EAX, cpu_T[0]);
+                gen_helper_idivq_EAX(cpu_T[0]);
                 break;
 #endif
@@ -4880 +4884 @@
                 gen_jmp_im(pc_start - s->cs_base);
                 tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
-                tcg_gen_helper_0_4(helper_lcall_protected,
-                                   cpu_tmp2_i32, cpu_T[1],
-                                   tcg_const_i32(dflag),
-                                   tcg_const_i32(s->pc - pc_start));
+                gen_helper_lcall_protected(cpu_tmp2_i32, cpu_T[1],
+                                           tcg_const_i32(dflag),
+                                           tcg_const_i32(s->pc - pc_start));
             } else {
                 tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
-                tcg_gen_helper_0_4(helper_lcall_real,
-                                   cpu_tmp2_i32, cpu_T[1],
-                                   tcg_const_i32(dflag),
-                                   tcg_const_i32(s->pc - s->cs_base));
+                gen_helper_lcall_real(cpu_tmp2_i32, cpu_T[1],
+                                      tcg_const_i32(dflag),
+                                      tcg_const_i32(s->pc - s->cs_base));
             }
             gen_eob(s);
@@ -4909 +4911 @@
                 gen_jmp_im(pc_start - s->cs_base);
                 tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
-                tcg_gen_helper_0_3(helper_ljmp_protected,
-                                   cpu_tmp2_i32,
-                                   cpu_T[1],
-                                   tcg_const_i32(s->pc - pc_start));
+                gen_helper_ljmp_protected(cpu_tmp2_i32, cpu_T[1],
+                                          tcg_const_i32(s->pc - pc_start));
             } else {
                 gen_op_movl_seg_T0_vm(R_CS);
@@ -5021 +5021 @@
 #ifdef TARGET_X86_64
         if (ot == OT_QUAD) {
-            tcg_gen_helper_1_2(helper_imulq_T0_T1, cpu_T[0], cpu_T[0], cpu_T[1]);
+            gen_helper_imulq_T0_T1(cpu_T[0], cpu_T[0], cpu_T[1]);
         } else
 #endif
@@ -5034 +5034 @@
 #else
                 {
-                    TCGv t0, t1;
-                    t0 = tcg_temp_new(TCG_TYPE_I64);
-                    t1 = tcg_temp_new(TCG_TYPE_I64);
+                    TCGv_i64 t0, t1;
+                    t0 = tcg_temp_new_i64();
+                    t1 = tcg_temp_new_i64();
                     tcg_gen_ext_i32_i64(t0, cpu_T[0]);
                     tcg_gen_ext_i32_i64(t1, cpu_T[1]);
@@ -5100 +5100 @@
             reg = ((modrm >> 3) & 7) | rex_r;
             mod = (modrm >> 6) & 3;
-            t0 = tcg_temp_local_new(TCG_TYPE_TL);
-            t1 = tcg_temp_local_new(TCG_TYPE_TL);
-            t2 = tcg_temp_local_new(TCG_TYPE_TL);
-            a0 = tcg_temp_local_new(TCG_TYPE_TL);
+            t0 = tcg_temp_local_new();
+            t1 = tcg_temp_local_new();
+            t2 = tcg_temp_local_new();
+            a0 = tcg_temp_local_new();
             gen_op_mov_v_reg(ot, t1, reg);
             if (mod == 3) {
@@ -5155 +5155 @@
                 gen_op_set_cc_op(s->cc_op);
             gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
-            tcg_gen_helper_0_1(helper_cmpxchg16b, cpu_A0);
+            gen_helper_cmpxchg16b(cpu_A0);
         } else
 #endif
@@ -5165 +5165 @@
                 gen_op_set_cc_op(s->cc_op);
             gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
-            tcg_gen_helper_0_1(helper_cmpxchg8b, cpu_A0);
+            gen_helper_cmpxchg8b(cpu_A0);
         }
         s->cc_op = CC_OP_EFLAGS;
@@ -5291 +5291 @@
                _first_ does it */
             if (!(s->tb->flags & HF_INHIBIT_IRQ_MASK))
-                tcg_gen_helper_0_0(helper_set_inhibit_irq);
+                gen_helper_set_inhibit_irq();
             s->tf = 0;
         }
@@ -5371 +5371 @@
                _first_ does it */
             if (!(s->tb->flags & HF_INHIBIT_IRQ_MASK))
-                tcg_gen_helper_0_0(helper_set_inhibit_irq);
+                gen_helper_set_inhibit_irq();
             s->tf = 0;
         }
@@ -5565 +5565 @@
             /* for xchg, lock is implicit */
             if (!(prefixes & PREFIX_LOCK))
-                tcg_gen_helper_0_0(helper_lock);
+                gen_helper_lock();
             gen_op_ld_T1_A0(ot + s->mem_index);
             gen_op_st_T0_A0(ot + s->mem_index);
             if (!(prefixes & PREFIX_LOCK))
-                tcg_gen_helper_0_0(helper_unlock);
+                gen_helper_unlock();
             gen_op_mov_reg_T1(ot, reg);
         }
@@ -5728 +5728 @@
                         gen_op_ld_T0_A0(OT_LONG + s->mem_index);
                         tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
-                        tcg_gen_helper_0_1(helper_flds_FT0, cpu_tmp2_i32);
+                        gen_helper_flds_FT0(cpu_tmp2_i32);
                         break;
                     case 1:
                         gen_op_ld_T0_A0(OT_LONG + s->mem_index);
                         tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
-                        tcg_gen_helper_0_1(helper_fildl_FT0, cpu_tmp2_i32);
+                        gen_helper_fildl_FT0(cpu_tmp2_i32);
                         break;
                     case 2:
                         tcg_gen_qemu_ld64(cpu_tmp1_i64, cpu_A0,
                                           (s->mem_index >> 2) - 1);
-                        tcg_gen_helper_0_1(helper_fldl_FT0, cpu_tmp1_i64);
+                        gen_helper_fldl_FT0(cpu_tmp1_i64);
                         break;
                     case 3:
@@ -5744 +5744 @@
                         gen_op_lds_T0_A0(OT_WORD + s->mem_index);
                         tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
-                        tcg_gen_helper_0_1(helper_fildl_FT0, cpu_tmp2_i32);
+                        gen_helper_fildl_FT0(cpu_tmp2_i32);
                         break;
                     }
 
-                    tcg_gen_helper_0_0(helper_fp_arith_ST0_FT0[op1]);
+                    gen_helper_fp_arith_ST0_FT0(op1);
                     if (op1 == 3) {
                         /* fcomp needs pop */
-                        tcg_gen_helper_0_0(helper_fpop);
+                        gen_helper_fpop();
                     }
                 }
@@ -5767 +5767 @@
                         gen_op_ld_T0_A0(OT_LONG + s->mem_index);
                         tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
-                        tcg_gen_helper_0_1(helper_flds_ST0, cpu_tmp2_i32);
+                        gen_helper_flds_ST0(cpu_tmp2_i32);
                         break;
                     case 1:
                         gen_op_ld_T0_A0(OT_LONG + s->mem_index);
                         tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
-                        tcg_gen_helper_0_1(helper_fildl_ST0, cpu_tmp2_i32);
+                        gen_helper_fildl_ST0(cpu_tmp2_i32);
                         break;
                     case 2:
                         tcg_gen_qemu_ld64(cpu_tmp1_i64, cpu_A0,
                                           (s->mem_index >> 2) - 1);
-                        tcg_gen_helper_0_1(helper_fldl_ST0, cpu_tmp1_i64);
+                        gen_helper_fldl_ST0(cpu_tmp1_i64);
                         break;
                     case 3:
@@ -5783 +5783 @@
                         gen_op_lds_T0_A0(OT_WORD + s->mem_index);
                         tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
-                        tcg_gen_helper_0_1(helper_fildl_ST0, cpu_tmp2_i32);
+                        gen_helper_fildl_ST0(cpu_tmp2_i32);
                         break;
                     }
@@ -5791 +5791 @@
                     switch(op >> 4) {
                     case 1:
-                        tcg_gen_helper_1_0(helper_fisttl_ST0, cpu_tmp2_i32);
+                        gen_helper_fisttl_ST0(cpu_tmp2_i32);
                         tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32);
                         gen_op_st_T0_A0(OT_LONG + s->mem_index);
                         break;
                     case 2:
-                        tcg_gen_helper_1_0(helper_fisttll_ST0, cpu_tmp1_i64);
+                        gen_helper_fisttll_ST0(cpu_tmp1_i64);
                         tcg_gen_qemu_st64(cpu_tmp1_i64, cpu_A0,
                                           (s->mem_index >> 2) - 1);
@@ -5802 +5802 @@
                     case 3:
                     default:
-                        tcg_gen_helper_1_0(helper_fistt_ST0, cpu_tmp2_i32);
+                        gen_helper_fistt_ST0(cpu_tmp2_i32);
                         tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32);
                         gen_op_st_T0_A0(OT_WORD + s->mem_index);
                         break;
                     }
-                    tcg_gen_helper_0_0(helper_fpop);
+                    gen_helper_fpop();
                     break;
                 default:
                     switch(op >> 4) {
                     case 0:
-                        tcg_gen_helper_1_0(helper_fsts_ST0, cpu_tmp2_i32);
+                        gen_helper_fsts_ST0(cpu_tmp2_i32);
                         tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32);
                         gen_op_st_T0_A0(OT_LONG + s->mem_index);
                         break;
                     case 1:
-                        tcg_gen_helper_1_0(helper_fistl_ST0, cpu_tmp2_i32);
+                        gen_helper_fistl_ST0(cpu_tmp2_i32);
                         tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32);
                         gen_op_st_T0_A0(OT_LONG + s->mem_index);
                         break;
                     case 2:
-                        tcg_gen_helper_1_0(helper_fstl_ST0, cpu_tmp1_i64);
+                        gen_helper_fstl_ST0(cpu_tmp1_i64);
                         tcg_gen_qemu_st64(cpu_tmp1_i64, cpu_A0,
                                           (s->mem_index >> 2) - 1);
@@ -5828 +5828 @@
                     case 3:
                     default:
-                        tcg_gen_helper_1_0(helper_fist_ST0, cpu_tmp2_i32);
+                        gen_helper_fist_ST0(cpu_tmp2_i32);
                         tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32);
                         gen_op_st_T0_A0(OT_WORD + s->mem_index);
@@ -5834 +5834 @@
                     }
                     if ((op & 7) == 3)
-                        tcg_gen_helper_0_0(helper_fpop);
+                        gen_helper_fpop();
                     break;
                 }
@@ -5842 +5842 @@
                     gen_op_set_cc_op(s->cc_op);
                 gen_jmp_im(pc_start - s->cs_base);
-                tcg_gen_helper_0_2(helper_fldenv,
+                gen_helper_fldenv(
                                    cpu_A0, tcg_const_i32(s->dflag));
                 break;
@@ -5848 +5848 @@
                 gen_op_ld_T0_A0(OT_WORD + s->mem_index);
                 tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
-                tcg_gen_helper_0_1(helper_fldcw, cpu_tmp2_i32);
+                gen_helper_fldcw(cpu_tmp2_i32);
                 break;
             case 0x0e: /* fnstenv mem */
@@ -5854 +5854 @@
                     gen_op_set_cc_op(s->cc_op);
                 gen_jmp_im(pc_start - s->cs_base);
-                tcg_gen_helper_0_2(helper_fstenv,
-                                   cpu_A0, tcg_const_i32(s->dflag));
+                gen_helper_fstenv(cpu_A0, tcg_const_i32(s->dflag));
                 break;
             case 0x0f: /* fnstcw mem */
-                tcg_gen_helper_1_0(helper_fnstcw, cpu_tmp2_i32);
+                gen_helper_fnstcw(cpu_tmp2_i32);
                 tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32);
                 gen_op_st_T0_A0(OT_WORD + s->mem_index);
@@ -5866 +5865 @@
                     gen_op_set_cc_op(s->cc_op);
                 gen_jmp_im(pc_start - s->cs_base);
-                tcg_gen_helper_0_1(helper_fldt_ST0, cpu_A0);
+                gen_helper_fldt_ST0(cpu_A0);
                 break;
             case 0x1f: /* fstpt mem */
@@ -5872 +5871 @@
                     gen_op_set_cc_op(s->cc_op);
                 gen_jmp_im(pc_start - s->cs_base);
-                tcg_gen_helper_0_1(helper_fstt_ST0, cpu_A0);
-                tcg_gen_helper_0_0(helper_fpop);
+                gen_helper_fstt_ST0(cpu_A0);
+                gen_helper_fpop();
                 break;
             case 0x2c: /* frstor mem */
@@ -5879 +5878 @@
                     gen_op_set_cc_op(s->cc_op);
                 gen_jmp_im(pc_start - s->cs_base);
-                tcg_gen_helper_0_2(helper_frstor,
-                                   cpu_A0, tcg_const_i32(s->dflag));
+                gen_helper_frstor(cpu_A0, tcg_const_i32(s->dflag));
                 break;
             case 0x2e: /* fnsave mem */
@@ -5886 +5884 @@
                     gen_op_set_cc_op(s->cc_op);
                 gen_jmp_im(pc_start - s->cs_base);
-                tcg_gen_helper_0_2(helper_fsave,
-                                   cpu_A0, tcg_const_i32(s->dflag));
+                gen_helper_fsave(cpu_A0, tcg_const_i32(s->dflag));
                 break;
             case 0x2f: /* fnstsw mem */
-                tcg_gen_helper_1_0(helper_fnstsw, cpu_tmp2_i32);
+                gen_helper_fnstsw(cpu_tmp2_i32);
                 tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32);
                 gen_op_st_T0_A0(OT_WORD + s->mem_index);
@@ -5898 +5895 @@
                     gen_op_set_cc_op(s->cc_op);
                 gen_jmp_im(pc_start - s->cs_base);
-                tcg_gen_helper_0_1(helper_fbld_ST0, cpu_A0);
+                gen_helper_fbld_ST0(cpu_A0);
                 break;
             case 0x3e: /* fbstp */
@@ -5904 +5901 @@
                     gen_op_set_cc_op(s->cc_op);
                 gen_jmp_im(pc_start - s->cs_base);
-                tcg_gen_helper_0_1(helper_fbst_ST0, cpu_A0);
-                tcg_gen_helper_0_0(helper_fpop);
+                gen_helper_fbst_ST0(cpu_A0);
+                gen_helper_fpop();
                 break;
             case 0x3d: /* fildll */
                 tcg_gen_qemu_ld64(cpu_tmp1_i64, cpu_A0,
                                   (s->mem_index >> 2) - 1);
-                tcg_gen_helper_0_1(helper_fildll_ST0, cpu_tmp1_i64);
+                gen_helper_fildll_ST0(cpu_tmp1_i64);
                 break;
             case 0x3f: /* fistpll */
-                tcg_gen_helper_1_0(helper_fistll_ST0, cpu_tmp1_i64);
+                gen_helper_fistll_ST0(cpu_tmp1_i64);
                 tcg_gen_qemu_st64(cpu_tmp1_i64, cpu_A0,
                                   (s->mem_index >> 2) - 1);
-                tcg_gen_helper_0_0(helper_fpop);
+                gen_helper_fpop();
                 break;
             default:
@@ -5927 +5924 @@
             switch(op) {
             case 0x08: /* fld sti */
-                tcg_gen_helper_0_0(helper_fpush);
-                tcg_gen_helper_0_1(helper_fmov_ST0_STN, tcg_const_i32((opreg + 1) & 7));
+                gen_helper_fpush();
+                gen_helper_fmov_ST0_STN(tcg_const_i32((opreg + 1) & 7));
                 break;
             case 0x09: /* fxchg sti */
             case 0x29: /* fxchg4 sti, undocumented op */
             case 0x39: /* fxchg7 sti, undocumented op */
-                tcg_gen_helper_0_1(helper_fxchg_ST0_STN, tcg_const_i32(opreg));
+                gen_helper_fxchg_ST0_STN(tcg_const_i32(opreg));
                 break;
             case 0x0a: /* grp d9/2 */
@@ -5942 +5939 @@
                         gen_op_set_cc_op(s->cc_op);
                     gen_jmp_im(pc_start - s->cs_base);
-                    tcg_gen_helper_0_0(helper_fwait);
+                    gen_helper_fwait();
                     break;
                 default:
@@ -5951 +5948 @@
                 switch(rm) {
                 case 0: /* fchs */
-                    tcg_gen_helper_0_0(helper_fchs_ST0);
+                    gen_helper_fchs_ST0();
                     break;
                 case 1: /* fabs */
-                    tcg_gen_helper_0_0(helper_fabs_ST0);
+                    gen_helper_fabs_ST0();
                     break;
                 case 4: /* ftst */
-                    tcg_gen_helper_0_0(helper_fldz_FT0);
-                    tcg_gen_helper_0_0(helper_fcom_ST0_FT0);
+                    gen_helper_fldz_FT0();
+                    gen_helper_fcom_ST0_FT0();
                     break;
                 case 5: /* fxam */
-                    tcg_gen_helper_0_0(helper_fxam_ST0);
+                    gen_helper_fxam_ST0();
                     break;
                 default:
@@ -5971 +5968 @@
                     switch(rm) {
                     case 0:
-                        tcg_gen_helper_0_0(helper_fpush);
-                        tcg_gen_helper_0_0(helper_fld1_ST0);
+                        gen_helper_fpush();
+                        gen_helper_fld1_ST0();
                         break;
                     case 1:
-                        tcg_gen_helper_0_0(helper_fpush);
-                        tcg_gen_helper_0_0(helper_fldl2t_ST0);
+                        gen_helper_fpush();
+                        gen_helper_fldl2t_ST0();
                         break;
                     case 2:
-                        tcg_gen_helper_0_0(helper_fpush);
-                        tcg_gen_helper_0_0(helper_fldl2e_ST0);
+                        gen_helper_fpush();
+                        gen_helper_fldl2e_ST0();
                         break;
                     case 3:
-                        tcg_gen_helper_0_0(helper_fpush);
-                        tcg_gen_helper_0_0(helper_fldpi_ST0);
+                        gen_helper_fpush();
+                        gen_helper_fldpi_ST0();
                         break;
                     case 4:
-                        tcg_gen_helper_0_0(helper_fpush);
-                        tcg_gen_helper_0_0(helper_fldlg2_ST0);
+                        gen_helper_fpush();
+                        gen_helper_fldlg2_ST0();
                         break;
                     case 5:
-                        tcg_gen_helper_0_0(helper_fpush);
-                        tcg_gen_helper_0_0(helper_fldln2_ST0);
+                        gen_helper_fpush();
+                        gen_helper_fldln2_ST0();
                         break;
                     case 6:
-                        tcg_gen_helper_0_0(helper_fpush);
-                        tcg_gen_helper_0_0(helper_fldz_ST0);
+                        gen_helper_fpush();
+                        gen_helper_fldz_ST0();
                         break;
                     default:
@@ -6006 +6003 @@
                 switch(rm) {
                 case 0: /* f2xm1 */
-                    tcg_gen_helper_0_0(helper_f2xm1);
+                    gen_helper_f2xm1();
                     break;
                 case 1: /* fyl2x */
-                    tcg_gen_helper_0_0(helper_fyl2x);
+                    gen_helper_fyl2x();
                     break;
                 case 2: /* fptan */
-                    tcg_gen_helper_0_0(helper_fptan);
+                    gen_helper_fptan();
                     break;
                 case 3: /* fpatan */
-                    tcg_gen_helper_0_0(helper_fpatan);
+                    gen_helper_fpatan();
                     break;
                 case 4: /* fxtract */
-                    tcg_gen_helper_0_0(helper_fxtract);
+                    gen_helper_fxtract();
                     break;
                 case 5: /* fprem1 */
-                    tcg_gen_helper_0_0(helper_fprem1);
+                    gen_helper_fprem1();
                     break;
                 case 6: /* fdecstp */
-                    tcg_gen_helper_0_0(helper_fdecstp);
+                    gen_helper_fdecstp();
                     break;
                 default:
                 case 7: /* fincstp */
-                    tcg_gen_helper_0_0(helper_fincstp);
+                    gen_helper_fincstp();
                     break;
                 }
@@ -6035 +6032 @@
                 switch(rm) {
                 case 0: /* fprem */
-                    tcg_gen_helper_0_0(helper_fprem);
+                    gen_helper_fprem();
                     break;
                 case 1: /* fyl2xp1 */
-                    tcg_gen_helper_0_0(helper_fyl2xp1);
+                    gen_helper_fyl2xp1();
                     break;
                 case 2: /* fsqrt */
-                    tcg_gen_helper_0_0(helper_fsqrt);
+                    gen_helper_fsqrt();
                     break;
                 case 3: /* fsincos */
-                    tcg_gen_helper_0_0(helper_fsincos);
+                    gen_helper_fsincos();
                     break;
                 case 5: /* fscale */
-                    tcg_gen_helper_0_0(helper_fscale);
+                    gen_helper_fscale();
                     break;
                 case 4: /* frndint */
-                    tcg_gen_helper_0_0(helper_frndint);
+                    gen_helper_frndint();
                     break;
                 case 6: /* fsin */
-                    tcg_gen_helper_0_0(helper_fsin);
+                    gen_helper_fsin();
                     break;
                 default:
                 case 7: /* fcos */
-                    tcg_gen_helper_0_0(helper_fcos);
+                    gen_helper_fcos();
                     break;
                 }
@@ -6069 +6066 @@
                     op1 = op & 7;
                     if (op >= 0x20) {
-                        tcg_gen_helper_0_1(helper_fp_arith_STN_ST0[op1], tcg_const_i32(opreg));
+                        gen_helper_fp_arith_STN_ST0(op1, opreg);
                         if (op >= 0x30)
-                            tcg_gen_helper_0_0(helper_fpop);
+                            gen_helper_fpop();
                     } else {
-                        tcg_gen_helper_0_1(helper_fmov_FT0_STN, tcg_const_i32(opreg));
-                        tcg_gen_helper_0_0(helper_fp_arith_ST0_FT0[op1]);
+                        gen_helper_fmov_FT0_STN(tcg_const_i32(opreg));
+                        gen_helper_fp_arith_ST0_FT0(op1);
                     }
                 }
@@ -6080 +6077 @@
             case 0x02: /* fcom */
             case 0x22: /* fcom2, undocumented op */
-                tcg_gen_helper_0_1(helper_fmov_FT0_STN, tcg_const_i32(opreg));
-                tcg_gen_helper_0_0(helper_fcom_ST0_FT0);
+                gen_helper_fmov_FT0_STN(tcg_const_i32(opreg));
+                gen_helper_fcom_ST0_FT0();
                 break;
             case 0x03: /* fcomp */
             case 0x23: /* fcomp3, undocumented op */
             case 0x32: /* fcomp5, undocumented op */
-                tcg_gen_helper_0_1(helper_fmov_FT0_STN, tcg_const_i32(opreg));
-                tcg_gen_helper_0_0(helper_fcom_ST0_FT0);
-                tcg_gen_helper_0_0(helper_fpop);
+                gen_helper_fmov_FT0_STN(tcg_const_i32(opreg));
+                gen_helper_fcom_ST0_FT0();
+                gen_helper_fpop();
                 break;
             case 0x15: /* da/5 */
                 switch(rm) {
                 case 1: /* fucompp */
-                    tcg_gen_helper_0_1(helper_fmov_FT0_STN, tcg_const_i32(1));
-                    tcg_gen_helper_0_0(helper_fucom_ST0_FT0);
-                    tcg_gen_helper_0_0(helper_fpop);
-                    tcg_gen_helper_0_0(helper_fpop);
+                    gen_helper_fmov_FT0_STN(tcg_const_i32(1));
+                    gen_helper_fucom_ST0_FT0();
+                    gen_helper_fpop();
+                    gen_helper_fpop();
                     break;
                 default:
@@ -6109 +6106 @@
                     break;
                 case 2: /* fclex */
-                    tcg_gen_helper_0_0(helper_fclex);
+                    gen_helper_fclex();
                     break;
                 case 3: /* fninit */
-                    tcg_gen_helper_0_0(helper_fninit);
+                    gen_helper_fninit();
                     break;
                 case 4: /* fsetpm (287 only, just do nop here) */
@@ -6123 +6120 @@
                 if (s->cc_op != CC_OP_DYNAMIC)
                     gen_op_set_cc_op(s->cc_op);
-                tcg_gen_helper_0_1(helper_fmov_FT0_STN, tcg_const_i32(opreg));
-                tcg_gen_helper_0_0(helper_fucomi_ST0_FT0);
+                gen_helper_fmov_FT0_STN(tcg_const_i32(opreg));
+                gen_helper_fucomi_ST0_FT0();
                 s->cc_op = CC_OP_EFLAGS;
                 break;
@@ -6130 +6127 @@
                 if (s->cc_op != CC_OP_DYNAMIC)
                     gen_op_set_cc_op(s->cc_op);
-                tcg_gen_helper_0_1(helper_fmov_FT0_STN, tcg_const_i32(opreg));
-                tcg_gen_helper_0_0(helper_fcomi_ST0_FT0);
+                gen_helper_fmov_FT0_STN(tcg_const_i32(opreg));
+                gen_helper_fcomi_ST0_FT0();
                 s->cc_op = CC_OP_EFLAGS;
                 break;
             case 0x28: /* ffree sti */
-                tcg_gen_helper_0_1(helper_ffree_STN, tcg_const_i32(opreg));
+                gen_helper_ffree_STN(tcg_const_i32(opreg));
                 break;
             case 0x2a: /* fst sti */
-                tcg_gen_helper_0_1(helper_fmov_STN_ST0, tcg_const_i32(opreg));
+                gen_helper_fmov_STN_ST0(tcg_const_i32(opreg));
                 break;
             case 0x2b: /* fstp sti */
@@ -6144 +6141 @@
             case 0x3a: /* fstp8 sti, undocumented op */
             case 0x3b: /* fstp9 sti, undocumented op */
-                tcg_gen_helper_0_1(helper_fmov_STN_ST0, tcg_const_i32(opreg));
-                tcg_gen_helper_0_0(helper_fpop);
+                gen_helper_fmov_STN_ST0(tcg_const_i32(opreg));
+                gen_helper_fpop();
                 break;
             case 0x2c: /* fucom st(i) */
-                tcg_gen_helper_0_1(helper_fmov_FT0_STN, tcg_const_i32(opreg));
-                tcg_gen_helper_0_0(helper_fucom_ST0_FT0);
+                gen_helper_fmov_FT0_STN(tcg_const_i32(opreg));
+                gen_helper_fucom_ST0_FT0();
                 break;
             case 0x2d: /* fucomp st(i) */
-                tcg_gen_helper_0_1(helper_fmov_FT0_STN, tcg_const_i32(opreg));
-                tcg_gen_helper_0_0(helper_fucom_ST0_FT0);
-                tcg_gen_helper_0_0(helper_fpop);
+                gen_helper_fmov_FT0_STN(tcg_const_i32(opreg));
+                gen_helper_fucom_ST0_FT0();
+                gen_helper_fpop();
                 break;
             case 0x33: /* de/3 */
                 switch(rm) {
                 case 1: /* fcompp */
-                    tcg_gen_helper_0_1(helper_fmov_FT0_STN, tcg_const_i32(1));
-                    tcg_gen_helper_0_0(helper_fcom_ST0_FT0);
-                    tcg_gen_helper_0_0(helper_fpop);
-                    tcg_gen_helper_0_0(helper_fpop);
+                    gen_helper_fmov_FT0_STN(tcg_const_i32(1));
+                    gen_helper_fcom_ST0_FT0();
+                    gen_helper_fpop();
+                    gen_helper_fpop();
                     break;
                 default:
@@ -6169 +6166 @@
                 break;
             case 0x38: /* ffreep sti, undocumented op */
-                tcg_gen_helper_0_1(helper_ffree_STN, tcg_const_i32(opreg));
-                tcg_gen_helper_0_0(helper_fpop);
+                gen_helper_ffree_STN(tcg_const_i32(opreg));
+                gen_helper_fpop();
                 break;
             case 0x3c: /* df/4 */
                 switch(rm) {
                 case 0:
-                    tcg_gen_helper_1_0(helper_fnstsw, cpu_tmp2_i32);
+                    gen_helper_fnstsw(cpu_tmp2_i32);
                     tcg_gen_extu_i32_tl(cpu_T[0], cpu_tmp2_i32);
                     gen_op_mov_reg_T0(OT_WORD, R_EAX);
@@ -6186 +6183 @@
                 if (s->cc_op != CC_OP_DYNAMIC)
                     gen_op_set_cc_op(s->cc_op);
-                tcg_gen_helper_0_1(helper_fmov_FT0_STN, tcg_const_i32(opreg));
-                tcg_gen_helper_0_0(helper_fucomi_ST0_FT0);
-                tcg_gen_helper_0_0(helper_fpop);
+                gen_helper_fmov_FT0_STN(tcg_const_i32(opreg));
+                gen_helper_fucomi_ST0_FT0();
+                gen_helper_fpop();
                 s->cc_op = CC_OP_EFLAGS;
                 break;
@@ -6194 +6191 @@
                 if (s->cc_op != CC_OP_DYNAMIC)
                     gen_op_set_cc_op(s->cc_op);
-                tcg_gen_helper_0_1(helper_fmov_FT0_STN, tcg_const_i32(opreg));
-                tcg_gen_helper_0_0(helper_fcomi_ST0_FT0);
-                tcg_gen_helper_0_0(helper_fpop);
+                gen_helper_fmov_FT0_STN(tcg_const_i32(opreg));
+                gen_helper_fcomi_ST0_FT0();
+                gen_helper_fpop();
                 s->cc_op = CC_OP_EFLAGS;
                 break;
@@ -6212 +6209 @@
                     l1 = gen_new_label();
                     gen_jcc1(s, s->cc_op, op1, l1);
-                    tcg_gen_helper_0_1(helper_fmov_ST0_STN, tcg_const_i32(opreg));
+                    gen_helper_fmov_ST0_STN(tcg_const_i32(opreg));
                     gen_set_label(l1);
                 }
@@ -6349 +6346 @@
             gen_io_start();
         tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
-        tcg_gen_helper_1_1(helper_in_func[ot], cpu_T[1], cpu_tmp2_i32);
+        gen_helper_in_func(ot, cpu_T[1], cpu_tmp2_i32);
         gen_op_mov_reg_T1(ot, R_EAX);
         if (use_icount) {
@@ -6366 +6363 @@
         gen_check_io(s, ot, pc_start - s->cs_base,
                      svm_is_rep(prefixes));
-#ifdef VBOX /* bird: linux is writing to this port for delaying I/O. */ /** @todo this breaks AIX, remove. */
+#ifdef VBOX /* bird: linux is writing to this port for delaying I/O. */ /** @todo YYY: this breaks AIX, remove. */
         if (val == 0x80)
             break;
@@ -6377 +6374 @@
         tcg_gen_andi_i32(cpu_tmp2_i32, cpu_tmp2_i32, 0xffff);
         tcg_gen_trunc_tl_i32(cpu_tmp3_i32, cpu_T[1]);
-        tcg_gen_helper_0_2(helper_out_func[ot], cpu_tmp2_i32, cpu_tmp3_i32);
+        gen_helper_out_func(ot, cpu_tmp2_i32, cpu_tmp3_i32);
         if (use_icount) {
             gen_io_end();
@@ -6396 +6393 @@
             gen_io_start();
         tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
-        tcg_gen_helper_1_1(helper_in_func[ot], cpu_T[1], cpu_tmp2_i32);
+        gen_helper_in_func(ot, cpu_T[1], cpu_tmp2_i32);
         gen_op_mov_reg_T1(ot, R_EAX);
         if (use_icount) {
@@ -6420 +6417 @@
         tcg_gen_andi_i32(cpu_tmp2_i32, cpu_tmp2_i32, 0xffff);
         tcg_gen_trunc_tl_i32(cpu_tmp3_i32, cpu_T[1]);
-        tcg_gen_helper_0_2(helper_out_func[ot], cpu_tmp2_i32, cpu_tmp3_i32);
+        gen_helper_out_func(ot, cpu_tmp2_i32, cpu_tmp3_i32);
         if (use_icount) {
             gen_io_end();
@@ -6457 +6454 @@
                 gen_op_set_cc_op(s->cc_op);
             gen_jmp_im(pc_start - s->cs_base);
-            tcg_gen_helper_0_2(helper_lret_protected,
-                               tcg_const_i32(s->dflag),
-                               tcg_const_i32(val));
+            gen_helper_lret_protected(tcg_const_i32(s->dflag),
+                                      tcg_const_i32(val));
         } else {
             gen_stack_A0(s);
@@ -6485 +6481 @@
         if (!s->pe) {
             /* real mode */
-            tcg_gen_helper_0_1(helper_iret_real, tcg_const_i32(s->dflag));
+            gen_helper_iret_real(tcg_const_i32(s->dflag));
             s->cc_op = CC_OP_EFLAGS;
         } else if (s->vm86) {
@@ -6495 +6491 @@
                 gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
             } else {
-                tcg_gen_helper_0_1(helper_iret_real, tcg_const_i32(s->dflag));
+                gen_helper_iret_real(tcg_const_i32(s->dflag));
                 s->cc_op = CC_OP_EFLAGS;
             }
@@ -6502 +6498 @@
                 gen_op_set_cc_op(s->cc_op);
             gen_jmp_im(pc_start - s->cs_base);
-            tcg_gen_helper_0_2(helper_iret_protected,
-                               tcg_const_i32(s->dflag),
-                               tcg_const_i32(s->pc - s->cs_base));
+            gen_helper_iret_protected(tcg_const_i32(s->dflag),
+                                      tcg_const_i32(s->pc - s->cs_base));
             s->cc_op = CC_OP_EFLAGS;
         }
@@ -6519 +6514 @@
             if (s->dflag == 0)
                 tval &= 0xffff;
+#ifdef VBOX /* upstream fix */
             else if (!CODE64(s))
                 tval &= 0xffffffff;
+#endif
             gen_movtl_T0_im(next_eip);
             gen_push_T0(s);
@@ -6604 +6601 @@
             reg = ((modrm >> 3) & 7) | rex_r;
             mod = (modrm >> 6) & 3;
-            t0 = tcg_temp_local_new(TCG_TYPE_TL);
+            t0 = tcg_temp_local_new();
             if (mod != 3) {
                 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
@@ -6648 +6645 @@
 #ifdef VBOX
             if (s->vm86 && s->vme && s->iopl != 3)
-                tcg_gen_helper_1_0(helper_read_eflags_vme, cpu_T[0]);
+                gen_helper_read_eflags_vme(cpu_T[0]);
             else
 #endif
-                tcg_gen_helper_1_0(helper_read_eflags, cpu_T[0]);
+            gen_helper_read_eflags(cpu_T[0]);
             gen_push_T0(s);
         }
@@ -6667 +6664 @@
             if (s->cpl == 0) {
                 if (s->dflag) {
-                    tcg_gen_helper_0_2(helper_write_eflags, cpu_T[0],
+                    gen_helper_write_eflags(cpu_T[0],
                                        tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK)));
                 } else {
-                    tcg_gen_helper_0_2(helper_write_eflags, cpu_T[0],
+                    gen_helper_write_eflags(cpu_T[0],
                                        tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff));
                 }
@@ -6676 +6673 @@
                 if (s->cpl <= s->iopl) {
                     if (s->dflag) {
-                        tcg_gen_helper_0_2(helper_write_eflags, cpu_T[0],
+                        gen_helper_write_eflags(cpu_T[0],
                                            tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK)));
                     } else {
-                        tcg_gen_helper_0_2(helper_write_eflags, cpu_T[0],
+                        gen_helper_write_eflags(cpu_T[0],
                                            tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff));
                     }
                 } else {
                     if (s->dflag) {
-                        tcg_gen_helper_0_2(helper_write_eflags, cpu_T[0],
+                        gen_helper_write_eflags(cpu_T[0],
                                            tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK)));
                     } else {
 #ifdef VBOX
                         if (s->vm86 && s->vme)
-                            tcg_gen_helper_0_1(helper_write_eflags_vme, cpu_T[0]);
+                            gen_helper_write_eflags_vme(cpu_T[0]);
                         else
 #endif
-                            tcg_gen_helper_0_2(helper_write_eflags, cpu_T[0],
+                            gen_helper_write_eflags(cpu_T[0],
                                                tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff));
                     }
@@ -6858 +6855 @@
             label1 = gen_new_label();
             tcg_gen_movi_tl(cpu_cc_dst, 0);
-            t0 = tcg_temp_local_new(TCG_TYPE_TL);
+            t0 = tcg_temp_local_new();
             tcg_gen_mov_tl(t0, cpu_T[0]);
             tcg_gen_brcondi_tl(TCG_COND_EQ, t0, 0, label1);
             if (b & 1) {
-                tcg_gen_helper_1_1(helper_bsr, cpu_T[0], t0);
+                gen_helper_bsr(cpu_T[0], t0);
             } else {
-                tcg_gen_helper_1_1(helper_bsf, cpu_T[0], t0);
+                gen_helper_bsf(cpu_T[0], t0);
             }
             gen_op_mov_reg_T0(ot, reg);
@@ -6881 +6878 @@
         if (s->cc_op != CC_OP_DYNAMIC)
             gen_op_set_cc_op(s->cc_op);
-        tcg_gen_helper_0_0(helper_daa);
+        gen_helper_daa();
         s->cc_op = CC_OP_EFLAGS;
         break;
@@ -6889 +6886 @@
         if (s->cc_op != CC_OP_DYNAMIC)
             gen_op_set_cc_op(s->cc_op);
-        tcg_gen_helper_0_0(helper_das);
+        gen_helper_das();
         s->cc_op = CC_OP_EFLAGS;
         break;
@@ -6897 +6894 @@
         if (s->cc_op != CC_OP_DYNAMIC)
             gen_op_set_cc_op(s->cc_op);
-        tcg_gen_helper_0_0(helper_aaa);
+        gen_helper_aaa();
         s->cc_op = CC_OP_EFLAGS;
         break;
@@ -6905 +6902 @@
         if (s->cc_op != CC_OP_DYNAMIC)
             gen_op_set_cc_op(s->cc_op);
-        tcg_gen_helper_0_0(helper_aas);
+        gen_helper_aas();
         s->cc_op = CC_OP_EFLAGS;
         break;
@@ -6915 +6912 @@
             gen_exception(s, EXCP00_DIVZ, pc_start - s->cs_base);
         } else {
-            tcg_gen_helper_0_1(helper_aam, tcg_const_i32(val));
+            gen_helper_aam(tcg_const_i32(val));
             s->cc_op = CC_OP_LOGICB;
         }
@@ -6923 +6920 @@
             goto illegal_op;
         val = ldub_code(s->pc++);
-        tcg_gen_helper_0_1(helper_aad, tcg_const_i32(val));
+        gen_helper_aad(tcg_const_i32(val));
         s->cc_op = CC_OP_LOGICB;
         break;
@@ -6945 +6942 @@
                 gen_op_set_cc_op(s->cc_op);
             gen_jmp_im(pc_start - s->cs_base);
-            tcg_gen_helper_0_0(helper_fwait);
+            gen_helper_fwait();
         }
         break;
@@ -6974 +6971 @@
             gen_op_set_cc_op(s->cc_op);
         gen_jmp_im(pc_start - s->cs_base);
-        tcg_gen_helper_0_1(helper_into, tcg_const_i32(s->pc - pc_start));
-        break;
+        gen_helper_into(tcg_const_i32(s->pc - pc_start));
+        break;
+#ifdef WANT_ICEBP
     case 0xf1: /* icebp (undocumented, exits to external debugger) */
         gen_svm_check_intercept(s, pc_start, SVM_EXIT_ICEBP);
@@ -6986 +6984 @@
 #endif
         break;
+#endif
     case 0xfa: /* cli */
         if (!s->vm86) {
             if (s->cpl <= s->iopl) {
-                tcg_gen_helper_0_0(helper_cli);
+                gen_helper_cli();
             } else {
                 gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
@@ -6995 +6994 @@
         } else {
             if (s->iopl == 3) {
-                tcg_gen_helper_0_0(helper_cli);
+                gen_helper_cli();
 #ifdef VBOX
             } else if (s->iopl != 3 && s->vme) {
-                tcg_gen_helper_0_0(helper_cli_vme);
+                gen_helper_cli_vme();
 #endif
             } else {
@@ -7009 +7008 @@
             if (s->cpl <= s->iopl) {
             gen_sti:
-                tcg_gen_helper_0_0(helper_sti);
+                gen_helper_sti();
                 /* interruptions are enabled only the first insn after sti */
                 /* If several instructions disable interrupts, only the
                    _first_ does it */
                 if (!(s->tb->flags & HF_INHIBIT_IRQ_MASK))
-                    tcg_gen_helper_0_0(helper_set_inhibit_irq);
+                    gen_helper_set_inhibit_irq();
                 /* give a chance to handle pending irqs */
                 gen_jmp_im(s->pc - s->cs_base);
@@ -7026 +7025 @@
 #ifdef VBOX
             } else if (s->iopl != 3 && s->vme) {
-                tcg_gen_helper_0_0(helper_sti_vme);
+                gen_helper_sti_vme();
                 /* give a chance to handle pending irqs */
                 gen_jmp_im(s->pc - s->cs_base);
@@ -7050 +7049 @@
         tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
         if (ot == OT_WORD)
-            tcg_gen_helper_0_2(helper_boundw, cpu_A0, cpu_tmp2_i32);
+            gen_helper_boundw(cpu_A0, cpu_tmp2_i32);
         else
-            tcg_gen_helper_0_2(helper_boundl, cpu_A0, cpu_tmp2_i32);
+            gen_helper_boundl(cpu_A0, cpu_tmp2_i32);
         break;
     case 0x1c8 ... 0x1cf: /* bswap reg */
@@ -7063 +7062 @@
         } else
         {
-            TCGv tmp0;
+            TCGv_i32 tmp0;
             gen_op_mov_TN_reg(OT_LONG, 0, reg);
 
-            tmp0 = tcg_temp_new(TCG_TYPE_I32);
+            tmp0 = tcg_temp_new_i32();
             tcg_gen_trunc_i64_i32(tmp0, cpu_T[0]);
             tcg_gen_bswap_i32(tmp0, tmp0);
@@ -7150 +7149 @@
             gen_jmp_im(pc_start - s->cs_base);
             if (b & 2) {
-                tcg_gen_helper_0_0(helper_rdmsr);
+                gen_helper_rdmsr();
             } else {
-                tcg_gen_helper_0_0(helper_wrmsr);
+                gen_helper_wrmsr();
             }
         }
@@ -7162 +7161 @@
         if (use_icount)
             gen_io_start();
-        tcg_gen_helper_0_0(helper_rdtsc);
+        gen_helper_rdtsc();
         if (use_icount) {
             gen_io_end();
@@ -7172 +7171 @@
             gen_op_set_cc_op(s->cc_op);
         gen_jmp_im(pc_start - s->cs_base);
-        tcg_gen_helper_0_0(helper_rdpmc);
+        gen_helper_rdpmc();
         break;
     case 0x134: /* sysenter */
@@ -7191 +7190 @@
             }
             gen_jmp_im(pc_start - s->cs_base);
-            tcg_gen_helper_0_0(helper_sysenter);
+            gen_helper_sysenter();
             gen_eob(s);
         }
@@ -7212 +7211 @@
             }
             gen_jmp_im(pc_start - s->cs_base);
-            tcg_gen_helper_0_1(helper_sysexit, tcg_const_i32(dflag));
+            gen_helper_sysexit(tcg_const_i32(dflag));
             gen_eob(s);
         }
@@ -7224 +7223 @@
         }
         gen_jmp_im(pc_start - s->cs_base);
-        tcg_gen_helper_0_1(helper_syscall, tcg_const_i32(s->pc - pc_start));
+        gen_helper_syscall(tcg_const_i32(s->pc - pc_start));
         gen_eob(s);
         break;
@@ -7236 +7235 @@
             }
             gen_jmp_im(pc_start - s->cs_base);
-            tcg_gen_helper_0_1(helper_sysret, tcg_const_i32(s->dflag));
+            gen_helper_sysret(tcg_const_i32(s->dflag));
             /* condition codes are modified only in long mode */
             if (s->lma)
@@ -7248 +7247 @@
             gen_op_set_cc_op(s->cc_op);
         gen_jmp_im(pc_start - s->cs_base);
-        tcg_gen_helper_0_0(helper_cpuid);
+        gen_helper_cpuid();
         break;
     case 0xf4: /* hlt */
@@ -7257 +7256 @@
                 gen_op_set_cc_op(s->cc_op);
             gen_jmp_im(pc_start - s->cs_base);
-            tcg_gen_helper_0_1(helper_hlt, tcg_const_i32(s->pc - pc_start));
+            gen_helper_hlt(tcg_const_i32(s->pc - pc_start));
             s->is_jmp = 3;
         }
@@ -7286 +7285 @@
                 gen_jmp_im(pc_start - s->cs_base);
                 tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
-                tcg_gen_helper_0_1(helper_lldt, cpu_tmp2_i32);
+                gen_helper_lldt(cpu_tmp2_i32);
             }
             break;
@@ -7309 +7308 @@
                 gen_jmp_im(pc_start - s->cs_base);
                 tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]);
-                tcg_gen_helper_0_1(helper_ltr, cpu_tmp2_i32);
+                gen_helper_ltr(cpu_tmp2_i32);
             }
             break;
@@ -7320 +7319 @@
                 gen_op_set_cc_op(s->cc_op);
             if (op == 4)
-                tcg_gen_helper_0_1(helper_verr, cpu_T[0]);
+                gen_helper_verr(cpu_T[0]);
             else
-                tcg_gen_helper_0_1(helper_verw, cpu_T[0]);
+                gen_helper_verw(cpu_T[0]);
             s->cc_op = CC_OP_EFLAGS;
             break;
@@ -7341 +7340 @@
                 goto illegal_op;
             gen_jmp_im(pc_start - s->cs_base);
-            tcg_gen_helper_0_0(helper_rdtscp);
+            gen_helper_rdtscp();
             break;
         }
@@ -7380 +7379 @@
                     }
                     gen_add_A0_ds_seg(s);
-                    tcg_gen_helper_0_1(helper_monitor, cpu_A0);
+                    gen_helper_monitor(cpu_A0);
                     break;
                 case 1: /* mwait */
@@ -7391 +7390 @@
                     }
                     gen_jmp_im(pc_start - s->cs_base);
-                    tcg_gen_helper_0_1(helper_mwait, tcg_const_i32(s->pc - pc_start));
+                    gen_helper_mwait(tcg_const_i32(s->pc - pc_start));
                     gen_eob(s);
                     break;
@@ -7423 +7422 @@
                         break;
                     } else {
-                        tcg_gen_helper_0_2(helper_vmrun,
-                                           tcg_const_i32(s->aflag),
-                                           tcg_const_i32(s->pc - pc_start));
+                        gen_helper_vmrun(tcg_const_i32(s->aflag),
+                                         tcg_const_i32(s->pc - pc_start));
                         tcg_gen_exit_tb(0);
                         s->is_jmp = 3;
@@ -7433 +7431 @@
                     if (!(s->flags & HF_SVME_MASK))
                         goto illegal_op;
-                    tcg_gen_helper_0_0(helper_vmmcall);
+                    gen_helper_vmmcall();
                     break;
                 case 2: /* VMLOAD */
@@ -7442 +7440 @@
                         break;
                     } else {
-                        tcg_gen_helper_0_1(helper_vmload,
-                                           tcg_const_i32(s->aflag));
+                        gen_helper_vmload(tcg_const_i32(s->aflag));
                     }
                     break;
@@ -7453 +7450 @@
                         break;
                     } else {
-                        tcg_gen_helper_0_1(helper_vmsave,
-                                           tcg_const_i32(s->aflag));
+                        gen_helper_vmsave(tcg_const_i32(s->aflag));
                     }
                     break;
@@ -7466 +7462 @@
                         break;
                     } else {
-                        tcg_gen_helper_0_0(helper_stgi);
+                        gen_helper_stgi();
                     }
                     break;
@@ -7476 +7472 @@
                         break;
                     } else {
-                        tcg_gen_helper_0_0(helper_clgi);
+                        gen_helper_clgi();
                     }
                     break;
@@ -7484 +7480 @@
                         !s->pe)
                         goto illegal_op;
-                    tcg_gen_helper_0_0(helper_skinit);
+                    gen_helper_skinit();
                     break;
                 case 7: /* INVLPGA */
@@ -7493 +7489 @@
                         break;
                     } else {
-                        tcg_gen_helper_0_1(helper_invlpga,
-                                           tcg_const_i32(s->aflag));
+                        gen_helper_invlpga(tcg_const_i32(s->aflag));
                     }
                     break;
@@ -7522 +7517 @@
         case 4: /* smsw */
             gen_svm_check_intercept(s, pc_start, SVM_EXIT_READ_CR0);
+#if defined TARGET_X86_64 && defined WORDS_BIGENDIAN
+            tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,cr[0]) + 4);
+#else
             tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,cr[0]));
+#endif
             gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 1);
             break;
@@ -7531 +7530 @@
                 gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0);
                 gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0);
-                tcg_gen_helper_0_1(helper_lmsw, cpu_T[0]);
+                gen_helper_lmsw(cpu_T[0]);
                 gen_jmp_im(s->pc - s->cs_base);
                 gen_eob(s);
@@ -7558 +7557 @@
                     gen_jmp_im(pc_start - s->cs_base);
                     gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
-                    tcg_gen_helper_0_1(helper_invlpg, cpu_A0);
+                    gen_helper_invlpg(cpu_A0);
                     gen_jmp_im(s->pc - s->cs_base);
                     gen_eob(s);
@@ -7615 +7614 @@
             if (!s->pe || s->vm86)
                 goto illegal_op;
-            t0 = tcg_temp_local_new(TCG_TYPE_TL);
-            t1 = tcg_temp_local_new(TCG_TYPE_TL);
-            t2 = tcg_temp_local_new(TCG_TYPE_TL);
+            t0 = tcg_temp_local_new();
+            t1 = tcg_temp_local_new();
+            t2 = tcg_temp_local_new();
 #ifdef VBOX
-            a0 = tcg_temp_local_new(TCG_TYPE_TL);
+            a0 = tcg_temp_local_new();
 #endif
             ot = OT_WORD;
@@ -7680 +7679 @@
             reg = ((modrm >> 3) & 7) | rex_r;
             gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 0);
-            t0 = tcg_temp_local_new(TCG_TYPE_TL);
+            t0 = tcg_temp_local_new();
             if (s->cc_op != CC_OP_DYNAMIC)
                 gen_op_set_cc_op(s->cc_op);
             if (b == 0x102)
-                tcg_gen_helper_1_1(helper_lar, t0, cpu_T[0]);
+                gen_helper_lar(t0, cpu_T[0]);
             else
-                tcg_gen_helper_1_1(helper_lsl, t0, cpu_T[0]);
+                gen_helper_lsl(t0, cpu_T[0]);
             tcg_gen_andi_tl(cpu_tmp0, cpu_cc_src, CC_Z);
             label1 = gen_new_label();
@@ -7746 +7745 @@
                 if (b & 2) {
                     gen_op_mov_TN_reg(ot, 0, rm);
-                    tcg_gen_helper_0_2(helper_write_crN,
-                                       tcg_const_i32(reg), cpu_T[0]);
+                    gen_helper_write_crN(tcg_const_i32(reg), cpu_T[0]);
                     gen_jmp_im(s->pc - s->cs_base);
                     gen_eob(s);
                 } else {
-                    tcg_gen_helper_1_1(helper_read_crN,
-                                       cpu_T[0], tcg_const_i32(reg));
+                    gen_helper_read_crN(cpu_T[0], tcg_const_i32(reg));
                     gen_op_mov_reg_T0(ot, rm);
                 }
@@ -7783 +7780 @@
                 gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_DR0 + reg);
                 gen_op_mov_TN_reg(ot, 0, rm);
-                tcg_gen_helper_0_2(helper_movl_drN_T0,
-                                   tcg_const_i32(reg), cpu_T[0]);
+                gen_helper_movl_drN_T0(tcg_const_i32(reg), cpu_T[0]);
                 gen_jmp_im(s->pc - s->cs_base);
                 gen_eob(s);
@@ -7799 +7795 @@
         } else {
             gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0);
-            tcg_gen_helper_0_0(helper_clts);
+            gen_helper_clts();
             /* abort block because static cpu state changed */
             gen_jmp_im(s->pc - s->cs_base);
@@ -7835 +7831 @@
                 gen_op_set_cc_op(s->cc_op);
             gen_jmp_im(pc_start - s->cs_base);
-            tcg_gen_helper_0_2(helper_fxsave,
-                               cpu_A0, tcg_const_i32((s->dflag == 2)));
+            gen_helper_fxsave(cpu_A0, tcg_const_i32((s->dflag == 2)));
             break;
         case 1: /* fxrstor */
@@ -7850 +7845 @@
                 gen_op_set_cc_op(s->cc_op);
             gen_jmp_im(pc_start - s->cs_base);
-            tcg_gen_helper_0_2(helper_fxrstor,
-                               cpu_A0, tcg_const_i32((s->dflag == 2)));
+            gen_helper_fxrstor(cpu_A0, tcg_const_i32((s->dflag == 2)));
             break;
         case 2: /* ldmxcsr */
@@ -7910 +7904 @@
         }
         gen_jmp_im(s->pc - s->cs_base);
-        tcg_gen_helper_0_0(helper_rsm);
+        gen_helper_rsm();
         gen_eob(s);
         break;
@@ -7931 +7925 @@
 
         gen_ldst_modrm(s, modrm, ot, OR_TMP0, 0);
-        tcg_gen_helper_1_2(helper_popcnt,
-                cpu_T[0], cpu_T[0], tcg_const_i32(ot));
+        gen_helper_popcnt(cpu_T[0], cpu_T[0], tcg_const_i32(ot));
         gen_op_mov_reg_T0(ot, reg);
 
@@ -7955 +7948 @@
     /* lock generation */
     if (s->prefix & PREFIX_LOCK)
-        tcg_gen_helper_0_0(helper_unlock);
+        gen_helper_unlock();
     return s->pc;
  illegal_op:
     if (s->prefix & PREFIX_LOCK)
-        tcg_gen_helper_0_0(helper_unlock);
+        gen_helper_unlock();
     /* XXX: ensure that no lock was generated */
     gen_exception(s, EXCP06_ILLOP, pc_start - s->cs_base);
@@ -7972 +7965 @@
     assert(sizeof(CCTable) == (1 << 4));
 #endif
-    cpu_env = tcg_global_reg_new(TCG_TYPE_PTR, TCG_AREG0, "env");
-    cpu_cc_op = tcg_global_mem_new(TCG_TYPE_I32,
-                                   TCG_AREG0, offsetof(CPUState, cc_op), "cc_op");
-    cpu_cc_src = tcg_global_mem_new(TCG_TYPE_TL,
-                                    TCG_AREG0, offsetof(CPUState, cc_src), "cc_src");
-    cpu_cc_dst = tcg_global_mem_new(TCG_TYPE_TL,
-                                    TCG_AREG0, offsetof(CPUState, cc_dst), "cc_dst");
-    cpu_cc_tmp = tcg_global_mem_new(TCG_TYPE_TL,
-                                    TCG_AREG0, offsetof(CPUState, cc_tmp), "cc_tmp");
+    cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    cpu_cc_op = tcg_global_mem_new_i32(TCG_AREG0,
+                                       offsetof(CPUState, cc_op), "cc_op");
+    cpu_cc_src = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, cc_src),
+                                    "cc_src");
+    cpu_cc_dst = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, cc_dst),
+                                    "cc_dst");
+    cpu_cc_tmp = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, cc_tmp),
+                                    "cc_tmp");
 
     /* register helpers */
-
-#define DEF_HELPER(ret, name, params) tcg_register_helper(name, #name);
+#define GEN_HELPER 2
 #include "helper.h"
 }
@@ -7998 +7990 @@
     target_ulong pc_ptr;
     uint16_t *gen_opc_end;
+    CPUBreakpoint *bp;
     int j, lj, cflags;
     uint64_t flags;
@@ -8029 +8022 @@
         dc->record_call = 0;
 # endif
-#endif
+#endif /* VBOX */
     dc->cpl = (flags >> HF_CPL_SHIFT) & 3;
     dc->iopl = (flags >> IOPL_SHIFT) & 3;
@@ -8067 +8060 @@
 #endif
 
-    cpu_T[0] = tcg_temp_new(TCG_TYPE_TL);
-    cpu_T[1] = tcg_temp_new(TCG_TYPE_TL);
-    cpu_A0 = tcg_temp_new(TCG_TYPE_TL);
-    cpu_T3 = tcg_temp_new(TCG_TYPE_TL);
-
-    cpu_tmp0 = tcg_temp_new(TCG_TYPE_TL);
-    cpu_tmp1_i64 = tcg_temp_new(TCG_TYPE_I64);
-    cpu_tmp2_i32 = tcg_temp_new(TCG_TYPE_I32);
-    cpu_tmp3_i32 = tcg_temp_new(TCG_TYPE_I32);
-    cpu_tmp4 = tcg_temp_new(TCG_TYPE_TL);
-    cpu_tmp5 = tcg_temp_new(TCG_TYPE_TL);
-    cpu_tmp6 = tcg_temp_new(TCG_TYPE_TL);
-    cpu_ptr0 = tcg_temp_new(TCG_TYPE_PTR);
-    cpu_ptr1 = tcg_temp_new(TCG_TYPE_PTR);
+    cpu_T[0] = tcg_temp_new();
+    cpu_T[1] = tcg_temp_new();
+    cpu_A0 = tcg_temp_new();
+    cpu_T3 = tcg_temp_new();
+
+    cpu_tmp0 = tcg_temp_new();
+    cpu_tmp1_i64 = tcg_temp_new_i64();
+    cpu_tmp2_i32 = tcg_temp_new_i32();
+    cpu_tmp3_i32 = tcg_temp_new_i32();
+    cpu_tmp4 = tcg_temp_new();
+    cpu_tmp5 = tcg_temp_new();
+    cpu_tmp6 = tcg_temp_new();
+    cpu_ptr0 = tcg_temp_new_ptr();
+    cpu_ptr1 = tcg_temp_new_ptr();
 
     gen_opc_end = gen_opc_buf + OPC_MAX_SIZE;
@@ -8094 +8087 @@
     gen_icount_start();
     for(;;) {
-        if (env->nb_breakpoints > 0) {
-            for(j = 0; j < env->nb_breakpoints; j++) {
-                if (env->breakpoints[j] == pc_ptr) {
+        if (unlikely(!TAILQ_EMPTY(&env->breakpoints))) {
+            TAILQ_FOREACH(bp, &env->breakpoints, entry) {
+                if (bp->pc == pc_ptr) {
                     gen_debug(dc, pc_ptr - dc->cs_base);
                     break;
@@ -8174 +8167 @@
 
 #ifdef DEBUG_DISAS
-    if (loglevel & CPU_LOG_TB_CPU) {
-        cpu_dump_state(env, logfile, fprintf, X86_DUMP_CCOP);
-    }
-    if (loglevel & CPU_LOG_TB_IN_ASM) {
+    log_cpu_state_mask(CPU_LOG_TB_CPU, env, X86_DUMP_CCOP);
+    if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
         int disas_flags;
-        fprintf(logfile, "----------------\n");
-        fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
+        qemu_log("----------------\n");
+        qemu_log("IN: %s\n", lookup_symbol(pc_start));
 #ifdef TARGET_X86_64
         if (dc->code64)
@@ -8187 +8178 @@
 #endif
             disas_flags = !dc->code32;
-        target_disas(logfile, pc_start, pc_ptr - pc_start, disas_flags);
-        fprintf(logfile, "\n");
+        log_target_disas(pc_start, pc_ptr - pc_start, disas_flags);
+        qemu_log("\n");
     }
 #endif
@@ -8213 +8204 @@
     int cc_op;
 #ifdef DEBUG_DISAS
-    if (loglevel & CPU_LOG_TB_OP) {
+    if (qemu_loglevel_mask(CPU_LOG_TB_OP)) {
         int i;
-        fprintf(logfile, "RESTORE:\n");
+        qemu_log("RESTORE:\n");
         for(i = 0;i <= pc_pos; i++) {
             if (gen_opc_instr_start[i]) {
-                fprintf(logfile, "0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]);
-            }
-        }
-        fprintf(logfile, "spc=0x%08lx pc_pos=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n",
+                qemu_log("0x%04x: " TARGET_FMT_lx "\n", i, gen_opc_pc[i]);
+            }
+        }
+        qemu_log("spc=0x%08lx pc_pos=0x%x eip=" TARGET_FMT_lx " cs_base=%x\n",
                 searched_pc, pc_pos, gen_opc_pc[pc_pos] - tb->cs_base,
                 (uint32_t)tb->cs_base);