Changeset 36254 in vbox for trunk/src/VBox/VMM

Timestamp:

Mar 10, 2011 5:22:08 PM (14 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

70492

Message:

GIP,++: Lots of CPUs (disabled).

File:

• trunk/src/VBox/VMM/VMMR3/TM.cpp (modified) (5 diffs)

trunk/src/VBox/VMM/VMMR3/TM.cpp

@@ -122 +122 @@
 #define LOG_GROUP LOG_GROUP_TM
 #include <VBox/vmm/tm.h>
+#include <iprt/asm-amd64-x86.h> /* for SUPGetCpuHzFromGIP from sup.h  */
 #include <VBox/vmm/vmm.h>
 #include <VBox/vmm/mm.h>
@@ -139 +140 @@
 #include <iprt/asm.h>
 #include <iprt/asm-math.h>
-#include <iprt/asm-amd64-x86.h>
 #include <iprt/assert.h>
 #include <iprt/thread.h>
@@ -222 +222 @@
     pVM->tm.s.pvGIPR3 = (void *)g_pSUPGlobalInfoPage;
     AssertMsgReturn(pVM->tm.s.pvGIPR3, ("GIP support is now required!\n"), VERR_INTERNAL_ERROR);
+    AssertMsgReturn((g_pSUPGlobalInfoPage->u32Version >> 16) == (SUPGLOBALINFOPAGE_VERSION >> 16),
+                    ("Unsupported GIP version!\n"), VERR_INTERNAL_ERROR);
+
     RTHCPHYS HCPhysGIP;
     rc = SUPR3GipGetPhys(&HCPhysGIP);
@@ -227 +230 @@
 
     RTGCPTR GCPtr;
+#ifdef SUP_WITH_LOTS_OF_CPUS
+    rc = MMR3HyperMapHCPhys(pVM, pVM->tm.s.pvGIPR3, NIL_RTR0PTR, HCPhysGIP, (size_t)g_pSUPGlobalInfoPage->cPages * PAGE_SIZE,
+                            "GIP", &GCPtr);
+#else
     rc = MMR3HyperMapHCPhys(pVM, pVM->tm.s.pvGIPR3, NIL_RTR0PTR, HCPhysGIP, PAGE_SIZE, "GIP", &GCPtr);
+#endif
     if (RT_FAILURE(rc))
     {
@@ -795 +803 @@
      * Use GIP when available present.
      */
-    uint64_t    u64Hz;
-    PSUPGLOBALINFOPAGE pGip = g_pSUPGlobalInfoPage;
-    if (    pGip
-        &&  pGip->u32Magic == SUPGLOBALINFOPAGE_MAGIC)
-    {
-        unsigned iCpu = pGip->u32Mode != SUPGIPMODE_ASYNC_TSC ? 0 : ASMGetApicId();
-        if (iCpu >= RT_ELEMENTS(pGip->aCPUs))
-            AssertReleaseMsgFailed(("iCpu=%d - the ApicId is too high. send VBox.log and hardware specs!\n", iCpu));
+    uint64_t u64Hz = SUPGetCpuHzFromGIP(g_pSUPGlobalInfoPage);
+    if (u64Hz != UINT64_MAX)
+    {
+        if (tmR3HasFixedTSC(pVM))
+            /* Sleep a bit to get a more reliable CpuHz value. */
+            RTThreadSleep(32);
         else
         {
-            if (tmR3HasFixedTSC(pVM))
-                /* Sleep a bit to get a more reliable CpuHz value. */
-                RTThreadSleep(32);
-            else
-            {
-                /* Spin for 40ms to try push up the CPU frequency and get a more reliable CpuHz value. */
-                const uint64_t u64 = RTTimeMilliTS();
-                while ((RTTimeMilliTS() - u64) < 40 /*ms*/)
-                    /* nothing */;
-            }
-
-            pGip = g_pSUPGlobalInfoPage;
-            if (    pGip
-                &&  pGip->u32Magic == SUPGLOBALINFOPAGE_MAGIC
-                &&  (u64Hz = pGip->aCPUs[iCpu].u64CpuHz)
-                &&  u64Hz != ~(uint64_t)0)
-                return u64Hz;
+            /* Spin for 40ms to try push up the CPU frequency and get a more reliable CpuHz value. */
+            const uint64_t u64 = RTTimeMilliTS();
+            while ((RTTimeMilliTS() - u64) < 40 /*ms*/)
+                /* nothing */;
         }
+
+        u64Hz = SUPGetCpuHzFromGIP(g_pSUPGlobalInfoPage);
+        if (u64Hz != UINT64_MAX)
+            return u64Hz;
     }