Changeset 37003 in vbox

Timestamp:

May 8, 2011 5:36:08 PM (14 years ago)

Author:

vboxsync

Message:

IEM: More cleanup and checks.

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/IEMAll.cpp (modified) (23 diffs)
• VMMAll/IEMAllInstructions.cpp.h (modified) (207 diffs)
• testcase/tstIEMCheckMc.cpp (modified) (5 diffs)

trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

@@ -903 +903 @@
  * Fetches the next opcode byte, returns automatically on failure.
  *
- * @param   pIemCpu             The IEM state.
  * @param   a_pu8               Where to return the opcode byte.
- */
-#define IEM_OPCODE_GET_NEXT_BYTE(a_pIemCpu, a_pu8) \
+ * @remark Implicitly references pIemCpu.
+ */
+#define IEM_OPCODE_GET_NEXT_U8(a_pu8) \
     do \
     { \
-        VBOXSTRICTRC rcStrict2 = iemOpcodeGetNextU8((a_pIemCpu), (a_pu8)); \
+        VBOXSTRICTRC rcStrict2 = iemOpcodeGetNextU8(pIemCpu, (a_pu8)); \
         if (rcStrict2 != VINF_SUCCESS) \
             return rcStrict2; \
@@ -931 +931 @@
  * on failure.
  *
- * @param   pIemCpu             The IEM state.
  * @param   pi8                 Where to return the signed byte.
- */
-#define IEM_OPCODE_GET_NEXT_S8(a_pIemCpu, a_pi8) \
+ * @remark Implicitly references pIemCpu.
+ */
+#define IEM_OPCODE_GET_NEXT_S8(a_pi8) \
     do \
     { \
-        VBOXSTRICTRC rcStrict2 = iemOpcodeGetNextS8((a_pIemCpu), (a_pi8)); \
+        VBOXSTRICTRC rcStrict2 = iemOpcodeGetNextS8(pIemCpu, (a_pi8)); \
         if (rcStrict2 != VINF_SUCCESS) \
             return rcStrict2; \
@@ -967 +967 @@
  * a word, returning automatically on failure.
  *
- * @param   pIemCpu             The IEM state.
  * @param   pu16                Where to return the word.
- */
-#define IEM_OPCODE_GET_NEXT_S8_SX_U16(a_pIemCpu, a_pu16) \
+ * @remark Implicitly references pIemCpu.
+ */
+#define IEM_OPCODE_GET_NEXT_S8_SX_U16(a_pu16) \
     do \
     { \
-        VBOXSTRICTRC rcStrict2 = iemOpcodeGetNextS8SxU16((a_pIemCpu), (a_pu16)); \
+        VBOXSTRICTRC rcStrict2 = iemOpcodeGetNextS8SxU16(pIemCpu, (a_pu16)); \
         if (rcStrict2 != VINF_SUCCESS) \
             return rcStrict2; \
@@ -1000 +1000 @@
  * Fetches the next opcode word, returns automatically on failure.
  *
- * @param   pIemCpu             The IEM state.
  * @param   a_pu16              Where to return the opcode word.
- */
-#define IEM_OPCODE_GET_NEXT_U16(a_pIemCpu, a_pu16) \
+ * @remark Implicitly references pIemCpu.
+ */
+#define IEM_OPCODE_GET_NEXT_U16(a_pu16) \
     do \
     { \
-        VBOXSTRICTRC rcStrict2 = iemOpcodeGetNextU16((a_pIemCpu), (a_pu16)); \
+        VBOXSTRICTRC rcStrict2 = iemOpcodeGetNextU16(pIemCpu, (a_pu16)); \
         if (rcStrict2 != VINF_SUCCESS) \
             return rcStrict2; \
@@ -1064 +1064 @@
  * Fetches the next opcode dword, returns automatically on failure.
  *
- * @param   pIemCpu             The IEM state.
  * @param   a_u32               Where to return the opcode dword.
- */
-#define IEM_OPCODE_GET_NEXT_U32(a_pIemCpu, a_pu32) \
+ * @remark Implicitly references pIemCpu.
+ */
+#define IEM_OPCODE_GET_NEXT_U32(a_pu32) \
     do \
     { \
-        VBOXSTRICTRC rcStrict2 = iemOpcodeGetNextU32((a_pIemCpu), (a_pu32)); \
+        VBOXSTRICTRC rcStrict2 = iemOpcodeGetNextU32(pIemCpu, (a_pu32)); \
         if (rcStrict2 != VINF_SUCCESS) \
             return rcStrict2; \
@@ -1130 +1130 @@
  * returns automatically on failure.
  *
- * @param   pIemCpu             The IEM state.
  * @param   a_pu64              Where to return the opcode quad word.
- */
-#define IEM_OPCODE_GET_NEXT_S32_SX_U64(a_pIemCpu, a_pu64) \
+ * @remark Implicitly references pIemCpu.
+ */
+#define IEM_OPCODE_GET_NEXT_S32_SX_U64(a_pu64) \
     do \
     { \
-        VBOXSTRICTRC rcStrict2 = iemOpcodeGetNextS32SxU64((a_pIemCpu), (a_pu64)); \
+        VBOXSTRICTRC rcStrict2 = iemOpcodeGetNextS32SxU64(pIemCpu, (a_pu64)); \
         if (rcStrict2 != VINF_SUCCESS) \
             return rcStrict2; \
@@ -1168 +1168 @@
 
 /**
- * Fetches the next opcode word, returns automatically on failure.
- *
- * @param   pIemCpu             The IEM state.
- * @param   a_pu64              Where to return the opcode qword.
- */
-#define IEM_OPCODE_GET_NEXT_U64(a_pIemCpu, a_pu64) \
+ * Fetches the next opcode quad word, returns automatically on failure.
+ *
+ * @param   a_pu64              Where to return the opcode quad word.
+ * @remark Implicitly references pIemCpu.
+ */
+#define IEM_OPCODE_GET_NEXT_U64(a_pu64) \
     do \
     { \
-        VBOXSTRICTRC rcStrict2 = iemOpcodeGetNextU64((a_pIemCpu), (a_pu64)); \
+        VBOXSTRICTRC rcStrict2 = iemOpcodeGetNextU64(pIemCpu, (a_pu64)); \
         if (rcStrict2 != VINF_SUCCESS) \
             return rcStrict2; \
@@ -3722 +3722 @@
 
 #define IEM_MC_ASSIGN(a_VarOrArg, a_CVariableOrConst)   (a_VarOrArg) = (a_CVariableOrConst)
+#define IEM_MC_ASSIGN_TO_SMALLER                        IEM_MC_ASSIGN
 
 #define IEM_MC_FETCH_GREG_U8(a_u8Dst, a_iGReg)          (a_u8Dst)  = iemGRegFetchU8(pIemCpu, (a_iGReg))
@@ -3752 +3753 @@
 #define IEM_MC_STORE_GREG_U32(a_iGReg, a_u32Value)      *(uint64_t *)iemGRegRef(pIemCpu, (a_iGReg)) = (uint32_t)(a_u32Value) /* clear high bits. */
 #define IEM_MC_STORE_GREG_U64(a_iGReg, a_u64Value)      *(uint64_t *)iemGRegRef(pIemCpu, (a_iGReg)) = (a_u64Value)
+#define IEM_MC_STORE_GREG_U8_CONST                      IEM_MC_STORE_GREG_U8
+#define IEM_MC_STORE_GREG_U16_CONST                     IEM_MC_STORE_GREG_U16
+#define IEM_MC_STORE_GREG_U32_CONST                     IEM_MC_STORE_GREG_U32
+#define IEM_MC_STORE_GREG_U64_CONST                     IEM_MC_STORE_GREG_U64
 #define IEM_MC_CLEAR_HIGH_GREG_U64(a_iGReg)             *(uint64_t *)iemGRegRef(pIemCpu, (a_iGReg)) &= UINT32_MAX
 
@@ -4175 +4180 @@
             /* Handle the disp16 form with no registers first. */
             if ((bRm & (X86_MODRM_MOD_MASK | X86_MODRM_RM_MASK)) == 6)
-                IEM_OPCODE_GET_NEXT_U16(pIemCpu, &u16EffAddr);
+                IEM_OPCODE_GET_NEXT_U16(&u16EffAddr);
             else
             {
@@ -4181 +4186 @@
                 switch ((bRm >> X86_MODRM_MOD_SHIFT) & X86_MODRM_MOD_SMASK)
                 {
-                    case 0:  u16EffAddr = 0;                                       break;
-                    case 1:  IEM_OPCODE_GET_NEXT_S8_SX_U16(pIemCpu, &u16EffAddr);  break;
-                    case 2:  IEM_OPCODE_GET_NEXT_U16(pIemCpu, &u16EffAddr);        break;
+                    case 0:  u16EffAddr = 0;                             break;
+                    case 1:  IEM_OPCODE_GET_NEXT_S8_SX_U16(&u16EffAddr); break;
+                    case 2:  IEM_OPCODE_GET_NEXT_U16(&u16EffAddr);       break;
                     default: AssertFailedReturn(VERR_INTERNAL_ERROR_2); /* (caller checked for these) */
                 }
@@ -4212 +4217 @@
             /* Handle the disp32 form with no registers first. */
             if ((bRm & (X86_MODRM_MOD_MASK | X86_MODRM_RM_MASK)) == 5)
-                IEM_OPCODE_GET_NEXT_U32(pIemCpu, &u32EffAddr);
+                IEM_OPCODE_GET_NEXT_U32(&u32EffAddr);
             else
             {
@@ -4224 +4229 @@
                     case 4: /* SIB */
                     {
-                        uint8_t bSib; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bSib);
+                        uint8_t bSib; IEM_OPCODE_GET_NEXT_U8(&bSib);
 
                         /* Get the index and scale it. */
@@ -4258 +4263 @@
                                 {
                                     uint32_t u32Disp;
-                                    IEM_OPCODE_GET_NEXT_U32(pIemCpu, &u32Disp);
+                                    IEM_OPCODE_GET_NEXT_U32(&u32Disp);
                                     u32EffAddr += u32Disp;
                                 }
@@ -4281 +4286 @@
                     case 1:
                     {
-                        int8_t i8Disp;
-                        IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Disp);
+                        int8_t i8Disp; IEM_OPCODE_GET_NEXT_S8(&i8Disp);
                         u32EffAddr += i8Disp;
                         break;
@@ -4288 +4292 @@
                     case 2:
                     {
-                        uint32_t u32Disp;
-                        IEM_OPCODE_GET_NEXT_U32(pIemCpu, &u32Disp);
+                        uint32_t u32Disp; IEM_OPCODE_GET_NEXT_U32(&u32Disp);
                         u32EffAddr += u32Disp;
                         break;
@@ -4316 +4319 @@
             if ((bRm & (X86_MODRM_MOD_MASK | X86_MODRM_RM_MASK)) == 5)
             {
-                IEM_OPCODE_GET_NEXT_S32_SX_U64(pIemCpu, &u64EffAddr);
+                IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64EffAddr);
                 u64EffAddr += pCtx->rip + pIemCpu->offOpcode;
             }
@@ -4342 +4345 @@
                     case 12:
                     {
-                        uint8_t bSib; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bSib);
+                        uint8_t bSib; IEM_OPCODE_GET_NEXT_U8(&bSib);
 
                         /* Get the index and scale it. */
@@ -4399 +4402 @@
                                 {
                                     uint32_t u32Disp;
-                                    IEM_OPCODE_GET_NEXT_U32(pIemCpu, &u32Disp);
+                                    IEM_OPCODE_GET_NEXT_U32(&u32Disp);
                                     u64EffAddr += (int32_t)u32Disp;
                                 }
@@ -4417 +4420 @@
                     {
                         int8_t i8Disp;
-                        IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Disp);
+                        IEM_OPCODE_GET_NEXT_S8(&i8Disp);
                         u64EffAddr += i8Disp;
                         break;
@@ -4424 +4427 @@
                     {
                         uint32_t u32Disp;
-                        IEM_OPCODE_GET_NEXT_U32(pIemCpu, &u32Disp);
+                        IEM_OPCODE_GET_NEXT_U32(&u32Disp);
                         u64EffAddr += (int32_t)u32Disp;
                         break;
@@ -5239 +5242 @@
         return rcStrict;
 
-    uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+    uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
     rcStrict = FNIEMOP_CALL(g_apfnOneByteMap[b]);
     if (rcStrict == VINF_SUCCESS)
@@ -5256 +5259 @@
         if (rcStrict == VINF_SUCCESS)
         {
-            b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+            b; IEM_OPCODE_GET_NEXT_U8(&b);
             rcStrict = FNIEMOP_CALL(g_apfnOneByteMap[b]);
             if (rcStrict == VINF_SUCCESS)

trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h

@@ -31 +31 @@
 FNIEMOP_DEF_1(iemOpHlpBinaryOperator_rm_r8, PCIEMOPBINSIZES, pImpl)
 {
-    uint8_t bRm;
-    IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
 
     /*
@@ -94 +93 @@
 FNIEMOP_DEF_1(iemOpHlpBinaryOperator_rm_rv, PCIEMOPBINSIZES, pImpl)
 {
-    uint8_t bRm;
-    IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
 
     /*
@@ -241 +239 @@
 FNIEMOP_DEF_1(iemOpHlpBinaryOperator_r8_rm, PCIEMOPBINSIZES, pImpl)
 {
-    uint8_t bRm;
-    IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
 
@@ -295 +292 @@
 FNIEMOP_DEF_1(iemOpHlpBinaryOperator_rv_rm, PCIEMOPBINSIZES, pImpl)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
 
@@ -422 +419 @@
 FNIEMOP_DEF_1(iemOpHlpBinaryOperator_AL_Ib, PCIEMOPBINSIZES, pImpl)
 {
-    uint8_t u8Imm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Imm);
+    uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
 
@@ -452 +449 @@
         case IEMMODE_16BIT:
         {
-            uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(pIemCpu, &u16Imm);
+            uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
             IEMOP_HLP_NO_LOCK_PREFIX();
 
@@ -471 +468 @@
         case IEMMODE_32BIT:
         {
-            uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(pIemCpu, &u32Imm);
+            uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm);
             IEMOP_HLP_NO_LOCK_PREFIX();
 
@@ -490 +487 @@
         case IEMMODE_64BIT:
         {
-            uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(pIemCpu, &u64Imm);
+            uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
             IEMOP_HLP_NO_LOCK_PREFIX();
 
@@ -607 +604 @@
 FNIEMOP_DEF(iemOp_Grp6)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
     {
@@ -844 +841 @@
 FNIEMOP_DEF(iemOp_Grp7)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
     {
@@ -971 +968 @@
     /** @todo Verify that the the invalid lock sequence exception (\#UD) is raised
      *        before the privilege level violation (\#GP). */
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     uint8_t iCrReg = ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg;
     if (pIemCpu->fPrefixes & IEM_OP_PRF_LOCK)
@@ -996 +993 @@
 {
     IEMOP_MNEMONIC("mov Rd,Dd");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     if (pIemCpu->fPrefixes & IEM_OP_PRF_REX_R)
@@ -1018 +1015 @@
     /** @todo Verify that the the invalid lock sequence exception (\#UD) is raised
      *        before the privilege level violation (\#GP). */
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     uint8_t iCrReg = ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg;
     if (pIemCpu->fPrefixes & IEM_OP_PRF_LOCK)
@@ -1043 +1040 @@
 {
     IEMOP_MNEMONIC("mov Dd,Rd");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     if (pIemCpu->fPrefixes & IEM_OP_PRF_REX_R)
@@ -1126 +1123 @@
  */
 #define CMOV_X(a_Cnd) \
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm); \
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); \
     if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) \
     { \
@@ -2007 +2004 @@
 {
     IEMOP_MNEMONIC("seto Eb");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
 
@@ -2018 +2015 @@
         IEM_MC_BEGIN(0, 0);
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_OF) {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
         } IEM_MC_ELSE() {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
         } IEM_MC_ENDIF();
         IEM_MC_ADVANCE_RIP();
@@ -2047 +2044 @@
 {
     IEMOP_MNEMONIC("setno Eb");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
 
@@ -2058 +2055 @@
         IEM_MC_BEGIN(0, 0);
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_OF) {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
         } IEM_MC_ELSE() {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
         } IEM_MC_ENDIF();
         IEM_MC_ADVANCE_RIP();
@@ -2087 +2084 @@
 {
     IEMOP_MNEMONIC("setc Eb");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
 
@@ -2098 +2095 @@
         IEM_MC_BEGIN(0, 0);
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_CF) {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
         } IEM_MC_ELSE() {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
         } IEM_MC_ENDIF();
         IEM_MC_ADVANCE_RIP();
@@ -2127 +2124 @@
 {
     IEMOP_MNEMONIC("setnc Eb");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
 
@@ -2138 +2135 @@
         IEM_MC_BEGIN(0, 0);
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_CF) {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
         } IEM_MC_ELSE() {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
         } IEM_MC_ENDIF();
         IEM_MC_ADVANCE_RIP();
@@ -2167 +2164 @@
 {
     IEMOP_MNEMONIC("sete Eb");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
 
@@ -2178 +2175 @@
         IEM_MC_BEGIN(0, 0);
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_ZF) {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
         } IEM_MC_ELSE() {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
         } IEM_MC_ENDIF();
         IEM_MC_ADVANCE_RIP();
@@ -2207 +2204 @@
 {
     IEMOP_MNEMONIC("setne Eb");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
 
@@ -2218 +2215 @@
         IEM_MC_BEGIN(0, 0);
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_ZF) {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
         } IEM_MC_ELSE() {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
         } IEM_MC_ENDIF();
         IEM_MC_ADVANCE_RIP();
@@ -2247 +2244 @@
 {
     IEMOP_MNEMONIC("setbe Eb");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
 
@@ -2258 +2255 @@
         IEM_MC_BEGIN(0, 0);
         IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
         } IEM_MC_ELSE() {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
         } IEM_MC_ENDIF();
         IEM_MC_ADVANCE_RIP();
@@ -2287 +2284 @@
 {
     IEMOP_MNEMONIC("setnbe Eb");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
 
@@ -2298 +2295 @@
         IEM_MC_BEGIN(0, 0);
         IEM_MC_IF_EFL_ANY_BITS_SET(X86_EFL_CF | X86_EFL_ZF) {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
         } IEM_MC_ELSE() {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
         } IEM_MC_ENDIF();
         IEM_MC_ADVANCE_RIP();
@@ -2327 +2324 @@
 {
     IEMOP_MNEMONIC("sets Eb");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
 
@@ -2338 +2335 @@
         IEM_MC_BEGIN(0, 0);
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_SF) {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
         } IEM_MC_ELSE() {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
         } IEM_MC_ENDIF();
         IEM_MC_ADVANCE_RIP();
@@ -2367 +2364 @@
 {
     IEMOP_MNEMONIC("setns Eb");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
 
@@ -2378 +2375 @@
         IEM_MC_BEGIN(0, 0);
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_SF) {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
         } IEM_MC_ELSE() {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
         } IEM_MC_ENDIF();
         IEM_MC_ADVANCE_RIP();
@@ -2407 +2404 @@
 {
     IEMOP_MNEMONIC("setnp Eb");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
 
@@ -2418 +2415 @@
         IEM_MC_BEGIN(0, 0);
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_PF) {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
         } IEM_MC_ELSE() {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
         } IEM_MC_ENDIF();
         IEM_MC_ADVANCE_RIP();
@@ -2447 +2444 @@
 {
     IEMOP_MNEMONIC("setnp Eb");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
 
@@ -2458 +2455 @@
         IEM_MC_BEGIN(0, 0);
         IEM_MC_IF_EFL_BIT_SET(X86_EFL_PF) {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
         } IEM_MC_ELSE() {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
         } IEM_MC_ENDIF();
         IEM_MC_ADVANCE_RIP();
@@ -2487 +2484 @@
 {
     IEMOP_MNEMONIC("setl Eb");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
 
@@ -2498 +2495 @@
         IEM_MC_BEGIN(0, 0);
         IEM_MC_IF_EFL_BITS_NE(X86_EFL_SF, X86_EFL_OF) {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
         } IEM_MC_ELSE() {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
         } IEM_MC_ENDIF();
         IEM_MC_ADVANCE_RIP();
@@ -2527 +2524 @@
 {
     IEMOP_MNEMONIC("setnl Eb");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
 
@@ -2538 +2535 @@
         IEM_MC_BEGIN(0, 0);
         IEM_MC_IF_EFL_BITS_NE(X86_EFL_SF, X86_EFL_OF) {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
         } IEM_MC_ELSE() {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
         } IEM_MC_ENDIF();
         IEM_MC_ADVANCE_RIP();
@@ -2567 +2564 @@
 {
     IEMOP_MNEMONIC("setle Eb");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
 
@@ -2578 +2575 @@
         IEM_MC_BEGIN(0, 0);
         IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
         } IEM_MC_ELSE() {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
         } IEM_MC_ENDIF();
         IEM_MC_ADVANCE_RIP();
@@ -2607 +2604 @@
 {
     IEMOP_MNEMONIC("setnle Eb");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo too early? */
 
@@ -2618 +2615 @@
         IEM_MC_BEGIN(0, 0);
         IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(X86_EFL_ZF, X86_EFL_SF, X86_EFL_OF) {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 0);
         } IEM_MC_ELSE() {
-            IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
+            IEM_MC_STORE_GREG_U8_CONST((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, 1);
         } IEM_MC_ENDIF();
         IEM_MC_ADVANCE_RIP();
@@ -2720 +2717 @@
 FNIEMOP_DEF_1(iemOpCommonBit_Ev_Gv, PCIEMOPBINSIZES, pImpl)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_OF | X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
@@ -2903 +2900 @@
 FNIEMOP_DEF_1(iemOpCommonShldShrd_Ib, PCIEMOPSHIFTDBLSIZES, pImpl)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF | X86_EFL_OF);
@@ -2909 +2906 @@
     if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
     {
-        uint8_t cShift; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &cShift);
+        uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift);
         IEMOP_HLP_NO_LOCK_PREFIX();
 
@@ -2980 +2977 @@
 
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint8_t cShift; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &cShift);
+                uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift);
                 IEM_MC_ASSIGN(cShiftArg, cShift);
                 IEM_MC_FETCH_GREG_U16(u16Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
@@ -3002 +2999 @@
 
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint8_t cShift; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &cShift);
+                uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift);
                 IEM_MC_ASSIGN(cShiftArg, cShift);
                 IEM_MC_FETCH_GREG_U32(u32Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
@@ -3024 +3021 @@
 
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint8_t cShift; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &cShift);
+                uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift);
                 IEM_MC_ASSIGN(cShiftArg, cShift);
                 IEM_MC_FETCH_GREG_U64(u64Src, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg);
@@ -3048 +3045 @@
 FNIEMOP_DEF_1(iemOpCommonShldShrd_CL, PCIEMOPSHIFTDBLSIZES, pImpl)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_AF | X86_EFL_OF);
@@ -3271 +3268 @@
 FNIEMOP_DEF_1(iemOpCommonLoadSRegAndGreg, uint8_t, iSegReg)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
 
@@ -3368 +3365 @@
     IEMOP_MNEMONIC("movzx Gv,Eb");
 
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
 
@@ -3459 +3456 @@
     IEMOP_MNEMONIC("movzx Gv,Ew");
 
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
 
@@ -3530 +3527 @@
 FNIEMOP_DEF(iemOp_Grp8)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     PCIEMOPBINSIZES pImpl;
     switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
@@ -3548 +3545 @@
     {
         /* register destination. */
-        uint8_t u8Bit; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Bit);
+        uint8_t u8Bit; IEM_OPCODE_GET_NEXT_U8(&u8Bit);
         IEMOP_HLP_NO_LOCK_PREFIX();
 
@@ -3622 +3619 @@
 
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint8_t u8Bit; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Bit);
+                uint8_t u8Bit; IEM_OPCODE_GET_NEXT_U8(&u8Bit);
                 IEM_MC_ASSIGN(u16Src, u8Bit & 0x0f);
                 IEM_MC_FETCH_EFLAGS(EFlags);
@@ -3645 +3642 @@
 
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint8_t u8Bit; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Bit);
+                uint8_t u8Bit; IEM_OPCODE_GET_NEXT_U8(&u8Bit);
                 IEM_MC_ASSIGN(u32Src, u8Bit & 0x1f);
                 IEM_MC_FETCH_EFLAGS(EFlags);
@@ -3668 +3665 @@
 
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint8_t u8Bit; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Bit);
+                uint8_t u8Bit; IEM_OPCODE_GET_NEXT_U8(&u8Bit);
                 IEM_MC_ASSIGN(u64Src, u8Bit & 0x3f);
                 IEM_MC_FETCH_EFLAGS(EFlags);
@@ -3721 +3718 @@
     IEMOP_MNEMONIC("movsx Gv,Eb");
 
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
 
@@ -3812 +3809 @@
     IEMOP_MNEMONIC("movsx Gv,Ew");
 
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
 
@@ -4296 +4293 @@
 FNIEMOP_DEF(iemOp_2byteEscape)
 {
-    uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+    uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
     return FNIEMOP_CALL(g_apfnTwoByteMap[b]);
 }
@@ -4492 +4489 @@
     pIemCpu->iEffSeg    = X86_SREG_ES;
 
-    uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+    uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
     return FNIEMOP_CALL(g_apfnOneByteMap[b]);
 }
@@ -4555 +4552 @@
     pIemCpu->iEffSeg    = X86_SREG_CS;
 
-    uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+    uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
     return FNIEMOP_CALL(g_apfnOneByteMap[b]);
 }
@@ -4624 +4621 @@
     pIemCpu->iEffSeg    = X86_SREG_SS;
 
-    uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+    uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
     return FNIEMOP_CALL(g_apfnOneByteMap[b]);
 }
@@ -4689 +4686 @@
     pIemCpu->iEffSeg    = X86_SREG_DS;
 
-    uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+    uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
     return FNIEMOP_CALL(g_apfnOneByteMap[b]);
 }
@@ -4752 +4749 @@
         pIemCpu->fPrefixes |= IEM_OP_PRF_REX;
 
-        uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+        uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
         return FNIEMOP_CALL(g_apfnOneByteMap[b]);
     }
@@ -4772 +4769 @@
         pIemCpu->uRexB     = 1 << 3;
 
-        uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+        uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
         return FNIEMOP_CALL(g_apfnOneByteMap[b]);
     }
@@ -4792 +4789 @@
         pIemCpu->uRexIndex = 1 << 3;
 
-        uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+        uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
         return FNIEMOP_CALL(g_apfnOneByteMap[b]);
     }
@@ -4814 +4811 @@
         pIemCpu->uRexIndex = 1 << 3;
 
-        uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+        uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
         return FNIEMOP_CALL(g_apfnOneByteMap[b]);
     }
@@ -4834 +4831 @@
         pIemCpu->uRexReg   = 1 << 3;
 
-        uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+        uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
         return FNIEMOP_CALL(g_apfnOneByteMap[b]);
     }
@@ -4855 +4852 @@
         pIemCpu->uRexB     = 1 << 3;
 
-        uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+        uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
         return FNIEMOP_CALL(g_apfnOneByteMap[b]);
     }
@@ -4876 +4873 @@
         pIemCpu->uRexIndex = 1 << 3;
 
-        uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+        uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
         return FNIEMOP_CALL(g_apfnOneByteMap[b]);
     }
@@ -4898 +4895 @@
         pIemCpu->uRexIndex = 1 << 3;
 
-        uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+        uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
         return FNIEMOP_CALL(g_apfnOneByteMap[b]);
     }
@@ -4918 +4915 @@
         iemRecalEffOpSize(pIemCpu);
 
-        uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+        uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
         return FNIEMOP_CALL(g_apfnOneByteMap[b]);
     }
@@ -4939 +4936 @@
         iemRecalEffOpSize(pIemCpu);
 
-        uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+        uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
         return FNIEMOP_CALL(g_apfnOneByteMap[b]);
     }
@@ -4960 +4957 @@
         iemRecalEffOpSize(pIemCpu);
 
-        uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+        uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
         return FNIEMOP_CALL(g_apfnOneByteMap[b]);
     }
@@ -4982 +4979 @@
         iemRecalEffOpSize(pIemCpu);
 
-        uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+        uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
         return FNIEMOP_CALL(g_apfnOneByteMap[b]);
     }
@@ -5003 +5000 @@
         iemRecalEffOpSize(pIemCpu);
 
-        uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+        uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
         return FNIEMOP_CALL(g_apfnOneByteMap[b]);
     }
@@ -5025 +5022 @@
         iemRecalEffOpSize(pIemCpu);
 
-        uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+        uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
         return FNIEMOP_CALL(g_apfnOneByteMap[b]);
     }
@@ -5047 +5044 @@
         iemRecalEffOpSize(pIemCpu);
 
-        uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+        uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
         return FNIEMOP_CALL(g_apfnOneByteMap[b]);
     }
@@ -5070 +5067 @@
         iemRecalEffOpSize(pIemCpu);
 
-        uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+        uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
         return FNIEMOP_CALL(g_apfnOneByteMap[b]);
     }
@@ -5341 +5338 @@
     pIemCpu->iEffSeg    = X86_SREG_FS;
 
-    uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+    uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
     return FNIEMOP_CALL(g_apfnOneByteMap[b]);
 }
@@ -5352 +5349 @@
     pIemCpu->iEffSeg    = X86_SREG_GS;
 
-    uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+    uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
     return FNIEMOP_CALL(g_apfnOneByteMap[b]);
 }
@@ -5363 +5360 @@
     iemRecalEffOpSize(pIemCpu);
 
-    uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+    uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
     return FNIEMOP_CALL(g_apfnOneByteMap[b]);
 }
@@ -5380 +5377 @@
     }
 
-    uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+    uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
     return FNIEMOP_CALL(g_apfnOneByteMap[b]);
 }
@@ -5394 +5391 @@
         case IEMMODE_16BIT:
         {
-            uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(pIemCpu, &u16Imm);
+            uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
             IEMOP_HLP_NO_LOCK_PREFIX();
             IEM_MC_BEGIN(0,0);
@@ -5405 +5402 @@
         case IEMMODE_32BIT:
         {
-            uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(pIemCpu, &u32Imm);
+            uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm);
             IEMOP_HLP_NO_LOCK_PREFIX();
             IEM_MC_BEGIN(0,0);
@@ -5416 +5413 @@
         case IEMMODE_64BIT:
         {
-            uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(pIemCpu, &u64Imm);
+            uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
             IEMOP_HLP_NO_LOCK_PREFIX();
             IEM_MC_BEGIN(0,0);
@@ -5434 +5431 @@
 {
     IEMOP_MNEMONIC("imul Gv,Ev,Iz"); /* Gv = Ev * Iz; */
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
 
@@ -5441 +5438 @@
         case IEMMODE_16BIT:
         {
-            uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(pIemCpu, &u16Imm);
+            uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
             IEMOP_HLP_NO_LOCK_PREFIX();
             if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
@@ -5486 +5483 @@
         case IEMMODE_32BIT:
         {
-            uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(pIemCpu, &u32Imm);
+            uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm);
             IEMOP_HLP_NO_LOCK_PREFIX();
             if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
@@ -5531 +5528 @@
         case IEMMODE_64BIT:
         {
-            uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(pIemCpu, &u64Imm);
+            uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
             IEMOP_HLP_NO_LOCK_PREFIX();
             if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
@@ -5582 +5579 @@
 {
     IEMOP_MNEMONIC("push Ib");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -5609 +5606 @@
 {
     IEMOP_MNEMONIC("imul Gv,Ev,Ib"); /* Gv = Ev * Iz; */
-    uint8_t bRm;   IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
-    uint8_t u8Imm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Imm);
+    uint8_t bRm;   IEM_OPCODE_GET_NEXT_U8(&bRm);
+    uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
@@ -5927 +5924 @@
 {
     IEMOP_MNEMONIC("jo  Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -5946 +5943 @@
 {
     IEMOP_MNEMONIC("jno Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -5964 +5961 @@
 {
     IEMOP_MNEMONIC("jc/jnae Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -5983 +5980 @@
 {
     IEMOP_MNEMONIC("jnc/jnb Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -6002 +5999 @@
 {
     IEMOP_MNEMONIC("je/jz   Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -6021 +6018 @@
 {
     IEMOP_MNEMONIC("jne/jnz Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -6040 +6037 @@
 {
     IEMOP_MNEMONIC("jbe/jna Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -6059 +6056 @@
 {
     IEMOP_MNEMONIC("jnbe/ja Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -6078 +6075 @@
 {
     IEMOP_MNEMONIC("js  Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -6097 +6094 @@
 {
     IEMOP_MNEMONIC("jns Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -6116 +6113 @@
 {
     IEMOP_MNEMONIC("jp  Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -6135 +6132 @@
 {
     IEMOP_MNEMONIC("jnp Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -6154 +6151 @@
 {
     IEMOP_MNEMONIC("jl/jnge Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -6173 +6170 @@
 {
     IEMOP_MNEMONIC("jnl/jge Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -6192 +6189 @@
 {
     IEMOP_MNEMONIC("jle/jng Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -6211 +6208 @@
 {
     IEMOP_MNEMONIC("jnle/jg Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -6229 +6226 @@
 FNIEMOP_DEF(iemOp_Grp1_Eb_Ib_80)
 {
-    uint8_t bRm;   IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm;   IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_MNEMONIC2("add\0or\0\0adc\0sbb\0and\0sub\0xor\0cmp" + ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)*4, "Eb,Ib");
     PCIEMOPBINSIZES pImpl = g_apIemImplGrp1[(bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK];
@@ -6236 +6233 @@
     {
         /* register target */
-        uint8_t u8Imm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Imm);
+        uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
         IEMOP_HLP_NO_LOCK_PREFIX();
         IEM_MC_BEGIN(3, 0);
@@ -6267 +6264 @@
 
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-        uint8_t u8Imm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Imm);
+        uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
         IEM_MC_ARG_CONST(uint8_t,   u8Src, /*=*/ u8Imm,     1);
 
@@ -6289 +6286 @@
 FNIEMOP_DEF(iemOp_Grp1_Ev_Iz)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_MNEMONIC2("add\0or\0\0adc\0sbb\0and\0sub\0xor\0cmp" + ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)*4, "Ev,Iz");
     PCIEMOPBINSIZES pImpl = g_apIemImplGrp1[(bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK];
@@ -6300 +6297 @@
             {
                 /* register target */
-                uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(pIemCpu, &u16Imm);
+                uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
                 IEMOP_HLP_NO_LOCK_PREFIX();
                 IEM_MC_BEGIN(3, 0);
@@ -6332 +6329 @@
 
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(pIemCpu, &u16Imm);
+                uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
                 IEM_MC_ASSIGN(u16Src, u16Imm);
                 IEM_MC_MEM_MAP(pu16Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
@@ -6354 +6351 @@
             {
                 /* register target */
-                uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(pIemCpu, &u32Imm);
+                uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm);
                 IEMOP_HLP_NO_LOCK_PREFIX();
                 IEM_MC_BEGIN(3, 0);
@@ -6386 +6383 @@
 
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(pIemCpu, &u32Imm);
+                uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm);
                 IEM_MC_ASSIGN(u32Src, u32Imm);
                 IEM_MC_MEM_MAP(pu32Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
@@ -6408 +6405 @@
             {
                 /* register target */
-                uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(pIemCpu, &u64Imm);
+                uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
                 IEMOP_HLP_NO_LOCK_PREFIX();
                 IEM_MC_BEGIN(3, 0);
@@ -6440 +6437 @@
 
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(pIemCpu, &u64Imm);
+                uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
                 IEM_MC_ASSIGN(u64Src, u64Imm);
                 IEM_MC_MEM_MAP(pu64Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
@@ -6472 +6469 @@
 FNIEMOP_DEF(iemOp_Grp1_Ev_Ib)
 {
-    uint8_t bRm;   IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm;   IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_MNEMONIC2("add\0or\0\0adc\0sbb\0and\0sub\0xor\0cmp" + ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)*4, "Ev,Ib");
     PCIEMOPBINSIZES pImpl = g_apIemImplGrp1[(bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK];
@@ -6482 +6479 @@
          */
         IEMOP_HLP_NO_LOCK_PREFIX();
-        uint8_t u8Imm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Imm);
+        uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
         switch (pIemCpu->enmEffOpSize)
         {
@@ -6559 +6556 @@
 
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint8_t u8Imm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Imm);
+                uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
                 IEM_MC_ASSIGN(u16Src, (int8_t)u8Imm);
                 IEM_MC_MEM_MAP(pu16Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
@@ -6584 +6581 @@
 
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint8_t u8Imm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Imm);
+                uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
                 IEM_MC_ASSIGN(u32Src, (int8_t)u8Imm);
                 IEM_MC_MEM_MAP(pu32Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
@@ -6609 +6606 @@
 
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint8_t u8Imm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Imm);
+                uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
                 IEM_MC_ASSIGN(u64Src, (int8_t)u8Imm);
                 IEM_MC_MEM_MAP(pu64Dst, fAccess, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
@@ -6653 +6650 @@
 FNIEMOP_DEF(iemOp_xchg_Eb_Gb)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_MNEMONIC("xchg Eb,Gb");
 
@@ -6702 +6699 @@
 {
     IEMOP_MNEMONIC("xchg Ev,Gv");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
 
     /*
@@ -6825 +6822 @@
 
     uint8_t bRm;
-    IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
 
@@ -6864 +6861 @@
     IEMOP_MNEMONIC("mov Ev,Gv");
 
-    uint8_t bRm;
-    IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
 
@@ -6953 +6949 @@
     IEMOP_MNEMONIC("mov Gb,Eb");
 
-    uint8_t bRm;
-    IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
 
@@ -6992 +6987 @@
     IEMOP_MNEMONIC("mov Gv,Ev");
 
-    uint8_t bRm;
-    IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
 
@@ -7081 +7075 @@
     IEMOP_MNEMONIC("mov Ev,Sw");
 
-    uint8_t bRm;
-    IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
 
@@ -7157 +7150 @@
 {
     IEMOP_MNEMONIC("lea Gv,M");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
     if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
@@ -7165 +7158 @@
     {
         case IEMMODE_16BIT:
-            IEM_MC_BEGIN(0, 1);
-            IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
+            IEM_MC_BEGIN(0, 2);
+            IEM_MC_LOCAL(RTGCPTR,  GCPtrEffSrc);
+            IEM_MC_LOCAL(uint16_t, u16Cast);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm);
-            IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, GCPtrEffSrc);
+            IEM_MC_ASSIGN_TO_SMALLER(u16Cast, GCPtrEffSrc);
+            IEM_MC_STORE_GREG_U16(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u16Cast);
             IEM_MC_ADVANCE_RIP();
             IEM_MC_END();
@@ -7174 +7169 @@
 
         case IEMMODE_32BIT:
-            IEM_MC_BEGIN(0, 1);
+            IEM_MC_BEGIN(0, 2);
             IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc);
+            IEM_MC_LOCAL(uint32_t, u32Cast);
             IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm);
-            IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, GCPtrEffSrc);
+            IEM_MC_ASSIGN_TO_SMALLER(u32Cast, GCPtrEffSrc);
+            IEM_MC_STORE_GREG_U32(((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pIemCpu->uRexReg, u32Cast);
             IEM_MC_ADVANCE_RIP();
             IEM_MC_END();
@@ -7200 +7197 @@
     IEMOP_MNEMONIC("mov Sw,Ev");
 
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
 
@@ -7264 +7261 @@
      *        now until tests show it's checked.. */
     IEMOP_MNEMONIC("pop Ev");
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
 
@@ -7496 +7493 @@
             IEM_MC_BEGIN(0, 1);
             IEM_MC_IF_GREG_BIT_SET(X86_GREG_xAX, 15) {
-                IEM_MC_STORE_GREG_U16(X86_GREG_xDX, UINT16_C(0xffff));
+                IEM_MC_STORE_GREG_U16_CONST(X86_GREG_xDX, UINT16_C(0xffff));
             } IEM_MC_ELSE() {
-                IEM_MC_STORE_GREG_U16(X86_GREG_xDX, 0);
+                IEM_MC_STORE_GREG_U16_CONST(X86_GREG_xDX, 0);
             } IEM_MC_ENDIF();
             IEM_MC_ADVANCE_RIP();
@@ -7508 +7505 @@
             IEM_MC_BEGIN(0, 1);
             IEM_MC_IF_GREG_BIT_SET(X86_GREG_xAX, 31) {
-                IEM_MC_STORE_GREG_U32(X86_GREG_xDX, UINT32_C(0xffffffff));
+                IEM_MC_STORE_GREG_U32_CONST(X86_GREG_xDX, UINT32_C(0xffffffff));
             } IEM_MC_ELSE() {
-                IEM_MC_STORE_GREG_U32(X86_GREG_xDX, 0);
+                IEM_MC_STORE_GREG_U32_CONST(X86_GREG_xDX, 0);
             } IEM_MC_ENDIF();
             IEM_MC_ADVANCE_RIP();
@@ -7520 +7517 @@
             IEM_MC_BEGIN(0, 1);
             IEM_MC_IF_GREG_BIT_SET(X86_GREG_xAX, 63) {
-                IEM_MC_STORE_GREG_U64(X86_GREG_xDX, UINT64_C(0xffffffffffffffff));
+                IEM_MC_STORE_GREG_U64_CONST(X86_GREG_xDX, UINT64_C(0xffffffffffffffff));
             } IEM_MC_ELSE() {
-                IEM_MC_STORE_GREG_U64(X86_GREG_xDX, 0);
+                IEM_MC_STORE_GREG_U64_CONST(X86_GREG_xDX, 0);
             } IEM_MC_ENDIF();
             IEM_MC_ADVANCE_RIP();
@@ -7588 +7585 @@
             case IEMMODE_16BIT: \
             { \
-                uint16_t u16Off; IEM_OPCODE_GET_NEXT_U16(pIemCpu, &u16Off); \
+                uint16_t u16Off; IEM_OPCODE_GET_NEXT_U16(&u16Off); \
                 (a_GCPtrMemOff) = u16Off; \
                 break; \
@@ -7594 +7591 @@
             case IEMMODE_32BIT: \
             { \
-                uint32_t u32Off; IEM_OPCODE_GET_NEXT_U32(pIemCpu, &u32Off); \
+                uint32_t u32Off; IEM_OPCODE_GET_NEXT_U32(&u32Off); \
                 (a_GCPtrMemOff) = u32Off; \
                 break; \
             } \
             case IEMMODE_64BIT: \
-                IEM_OPCODE_GET_NEXT_U64(pIemCpu, &(a_GCPtrMemOff)); \
+                IEM_OPCODE_GET_NEXT_U64(&(a_GCPtrMemOff)); \
                 break; \
             IEM_NOT_REACHED_DEFAULT_CASE_RET(); \
@@ -8557 +8554 @@
 FNIEMOP_DEF_1(iemOpCommonMov_r8_Ib, uint8_t, iReg)
 {
-    uint8_t u8Imm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Imm);
+    uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
 
@@ -8643 +8640 @@
         case IEMMODE_16BIT:
         {
-            uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(pIemCpu, &u16Imm);
+            uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
             IEMOP_HLP_NO_LOCK_PREFIX();
 
@@ -8656 +8653 @@
         case IEMMODE_32BIT:
         {
-            uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(pIemCpu, &u32Imm);
+            uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm);
             IEMOP_HLP_NO_LOCK_PREFIX();
 
@@ -8668 +8665 @@
         case IEMMODE_64BIT:
         {
-            uint64_t u64Imm; IEM_OPCODE_GET_NEXT_U64(pIemCpu, &u64Imm);
+            uint64_t u64Imm; IEM_OPCODE_GET_NEXT_U64(&u64Imm);
             IEMOP_HLP_NO_LOCK_PREFIX();
 
@@ -8751 +8748 @@
 FNIEMOP_DEF(iemOp_Grp2_Eb_Ib)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     PCIEMOPSHIFTSIZES pImpl;
     switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
@@ -8770 +8767 @@
     {
         /* register */
-        uint8_t cShift; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &cShift);
+        uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift);
         IEMOP_HLP_NO_LOCK_PREFIX();
         IEM_MC_BEGIN(3, 0);
@@ -8793 +8790 @@
 
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-        uint8_t cShift; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &cShift);
+        uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift);
         IEM_MC_ASSIGN(cShiftArg, cShift);
         IEM_MC_MEM_MAP(pu8Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
@@ -8811 +8808 @@
 FNIEMOP_DEF(iemOp_Grp2_Ev_Ib)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     PCIEMOPSHIFTSIZES pImpl;
     switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
@@ -8830 +8827 @@
     {
         /* register */
-        uint8_t cShift; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &cShift);
+        uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift);
         IEMOP_HLP_NO_LOCK_PREFIX();
         switch (pIemCpu->enmEffOpSize)
@@ -8887 +8884 @@
 
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint8_t cShift; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &cShift);
+                uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift);
                 IEM_MC_ASSIGN(cShiftArg, cShift);
                 IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
@@ -8907 +8904 @@
 
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint8_t cShift; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &cShift);
+                uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift);
                 IEM_MC_ASSIGN(cShiftArg, cShift);
                 IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
@@ -8927 +8924 @@
 
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint8_t cShift; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &cShift);
+                uint8_t cShift; IEM_OPCODE_GET_NEXT_U8(&cShift);
                 IEM_MC_ASSIGN(cShiftArg, cShift);
                 IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_RW, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
@@ -8949 +8946 @@
 {
     IEMOP_MNEMONIC("retn Iw");
-    uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(pIemCpu, &u16Imm);
+    uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -8985 +8982 @@
 FNIEMOP_DEF(iemOp_Grp11_Eb_Ib)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
     if ((bRm & X86_MODRM_REG_MASK) != (0 << X86_MODRM_REG_SHIFT)) /* only mov Eb,Ib in this group. */
@@ -8994 +8991 @@
     {
         /* register access */
-        uint8_t u8Imm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Imm);
+        uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
         IEM_MC_BEGIN(0, 0);
         IEM_MC_STORE_GREG_U8((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u8Imm);
@@ -9006 +9003 @@
         IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-        uint8_t u8Imm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Imm);
+        uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
         IEM_MC_STORE_MEM_U8(pIemCpu->iEffSeg, GCPtrEffDst, u8Imm);
         IEM_MC_ADVANCE_RIP();
@@ -9018 +9015 @@
 FNIEMOP_DEF(iemOp_Grp11_Ev_Iz)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     IEMOP_HLP_NO_LOCK_PREFIX(); /** @todo should probably not be raised until we've fetched all the opcode bytes? */
     if ((bRm & X86_MODRM_REG_MASK) != (0 << X86_MODRM_REG_SHIFT)) /* only mov Eb,Ib in this group. */
@@ -9031 +9028 @@
             case IEMMODE_16BIT:
                 IEM_MC_BEGIN(0, 0);
-                uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(pIemCpu, &u16Imm);
+                uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
                 IEM_MC_STORE_GREG_U16((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u16Imm);
                 IEM_MC_ADVANCE_RIP();
@@ -9039 +9036 @@
             case IEMMODE_32BIT:
                 IEM_MC_BEGIN(0, 0);
-                uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(pIemCpu, &u32Imm);
+                uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm);
                 IEM_MC_STORE_GREG_U32((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u32Imm);
                 IEM_MC_ADVANCE_RIP();
@@ -9047 +9044 @@
             case IEMMODE_64BIT:
                 IEM_MC_BEGIN(0, 0);
-                uint64_t u64Imm; IEM_OPCODE_GET_NEXT_U64(pIemCpu, &u64Imm);
+                uint64_t u64Imm; IEM_OPCODE_GET_NEXT_U64(&u64Imm);
                 IEM_MC_STORE_GREG_U64((bRm & X86_MODRM_RM_MASK) | pIemCpu->uRexB, u64Imm);
                 IEM_MC_ADVANCE_RIP();
@@ -9065 +9062 @@
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(pIemCpu, &u16Imm);
+                uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
                 IEM_MC_STORE_MEM_U16(pIemCpu->iEffSeg, GCPtrEffDst, u16Imm);
                 IEM_MC_ADVANCE_RIP();
@@ -9075 +9072 @@
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(pIemCpu, &u32Imm);
+                uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm);
                 IEM_MC_STORE_MEM_U32(pIemCpu->iEffSeg, GCPtrEffDst, u32Imm);
                 IEM_MC_ADVANCE_RIP();
@@ -9085 +9082 @@
                 IEM_MC_LOCAL(RTGCPTR, GCPtrEffDst);
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint64_t u64Imm; IEM_OPCODE_GET_NEXT_U64(pIemCpu, &u64Imm);
+                uint64_t u64Imm; IEM_OPCODE_GET_NEXT_U64(&u64Imm);
                 IEM_MC_STORE_MEM_U64(pIemCpu->iEffSeg, GCPtrEffDst, u64Imm);
                 IEM_MC_ADVANCE_RIP();
@@ -9117 +9114 @@
 {
     IEMOP_MNEMONIC("retf Iw");
-    uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(pIemCpu, &u16Imm);
+    uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -9144 +9141 @@
 FNIEMOP_DEF(iemOp_int_Ib)
 {
-    uint8_t u8Int; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Int);
+    uint8_t u8Int; IEM_OPCODE_GET_NEXT_U8(&u8Int);
     return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_int, u8Int, false /*fIsBpInstr*/);
 }
@@ -9173 +9170 @@
 FNIEMOP_DEF(iemOp_Grp2_Eb_1)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     PCIEMOPSHIFTSIZES pImpl;
     switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
@@ -9231 +9228 @@
 FNIEMOP_DEF(iemOp_Grp2_Ev_1)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     PCIEMOPSHIFTSIZES pImpl;
     switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
@@ -9361 +9358 @@
 FNIEMOP_DEF(iemOp_Grp2_Eb_CL)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     PCIEMOPSHIFTSIZES pImpl;
     switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
@@ -9420 +9417 @@
 FNIEMOP_DEF(iemOp_Grp2_Ev_CL)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     PCIEMOPSHIFTSIZES pImpl;
     switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
@@ -9687 +9684 @@
 FNIEMOP_DEF(iemOp_EscF3)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
     {
@@ -9743 +9740 @@
 FNIEMOP_DEF(iemOp_EscF6)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
     {
@@ -9805 +9802 @@
 FNIEMOP_DEF(iemOp_EscF7)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT))
     {
@@ -9837 +9834 @@
 {
     IEMOP_MNEMONIC("loopne Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -9885 +9882 @@
 {
     IEMOP_MNEMONIC("loope Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -9933 +9930 @@
 {
     IEMOP_MNEMONIC("loop Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -9984 +9981 @@
 {
     IEMOP_MNEMONIC("jecxz Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -10029 +10026 @@
 {
     IEMOP_MNEMONIC("in eAX,Ib");
-    uint8_t u8Imm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Imm);
+    uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_in, u8Imm, 1);
@@ -10039 +10036 @@
 {
     IEMOP_MNEMONIC("in eAX,Ib");
-    uint8_t u8Imm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Imm);
+    uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_in, u8Imm, pIemCpu->enmEffOpSize == IEMMODE_16BIT ? 2 : 4);
@@ -10049 +10046 @@
 {
     IEMOP_MNEMONIC("out Ib,AL");
-    uint8_t u8Imm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Imm);
+    uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_out, u8Imm, 1);
@@ -10059 +10056 @@
 {
     IEMOP_MNEMONIC("out Ib,eAX");
-    uint8_t u8Imm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Imm);
+    uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_2(iemCImpl_out, u8Imm, pIemCpu->enmEffOpSize == IEMMODE_16BIT ? 2 : 4);
@@ -10074 +10071 @@
         case IEMMODE_16BIT:
         {
-            uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(pIemCpu, &u16Imm);
+            uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
             return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_call_rel_16, (int32_t)u16Imm);
         }
@@ -10080 +10077 @@
         case IEMMODE_32BIT:
         {
-            uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(pIemCpu, &u32Imm);
+            uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm);
             return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_call_rel_32, (int32_t)u32Imm);
         }
@@ -10086 +10083 @@
         case IEMMODE_64BIT:
         {
-            uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(pIemCpu, &u64Imm);
+            uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
             return IEM_MC_DEFER_TO_CIMPL_1(iemCImpl_call_rel_64, u64Imm);
         }
@@ -10135 +10132 @@
     uint32_t offSeg;
     if (pIemCpu->enmEffOpSize != IEMMODE_16BIT)
-        IEM_OPCODE_GET_NEXT_U32(pIemCpu, &offSeg);
+        IEM_OPCODE_GET_NEXT_U32(&offSeg);
     else
     {
-        uint16_t offSeg16; IEM_OPCODE_GET_NEXT_U16(pIemCpu, &offSeg16);
+        uint16_t offSeg16; IEM_OPCODE_GET_NEXT_U16(&offSeg16);
         offSeg = offSeg16;
     }
-    uint16_t uSel;  IEM_OPCODE_GET_NEXT_U16(pIemCpu, &uSel);
+    uint16_t uSel;  IEM_OPCODE_GET_NEXT_U16(&uSel);
     IEMOP_HLP_NO_LOCK_PREFIX();
     return IEM_MC_DEFER_TO_CIMPL_3(iemCImpl_FarJmp, uSel, offSeg, pIemCpu->enmEffOpSize);
@@ -10151 +10148 @@
 {
     IEMOP_MNEMONIC("jmp Jb");
-    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(pIemCpu, &i8Imm);
+    int8_t i8Imm; IEM_OPCODE_GET_NEXT_S8(&i8Imm);
     IEMOP_HLP_NO_LOCK_PREFIX();
     IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
@@ -10203 +10200 @@
     pIemCpu->fPrefixes |= IEM_OP_PRF_LOCK;
 
-    uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+    uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
     return FNIEMOP_CALL(g_apfnOneByteMap[b]);
 }
@@ -10215 +10212 @@
     pIemCpu->fPrefixes |= IEM_OP_PRF_REPNZ;
 
-    uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+    uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
     return FNIEMOP_CALL(g_apfnOneByteMap[b]);
 }
@@ -10227 +10224 @@
     pIemCpu->fPrefixes |= IEM_OP_PRF_REPZ;
 
-    uint8_t b; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &b);
+    uint8_t b; IEM_OPCODE_GET_NEXT_U8(&b);
     return FNIEMOP_CALL(g_apfnOneByteMap[b]);
 }
@@ -10378 +10375 @@
     {
         /* register access */
-        uint8_t u8Imm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Imm);
+        uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
         IEMOP_HLP_NO_LOCK_PREFIX();
 
@@ -10403 +10400 @@
 
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-        uint8_t u8Imm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &u8Imm);
+        uint8_t u8Imm; IEM_OPCODE_GET_NEXT_U8(&u8Imm);
         IEM_MC_ASSIGN(u8Src, u8Imm);
         IEM_MC_MEM_MAP(pu8Dst, IEM_ACCESS_DATA_R, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
@@ -10432 +10429 @@
             case IEMMODE_16BIT:
             {
-                uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(pIemCpu, &u16Imm);
+                uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
                 IEM_MC_BEGIN(3, 0);
                 IEM_MC_ARG(uint16_t *,      pu16Dst,                0);
@@ -10447 +10444 @@
             case IEMMODE_32BIT:
             {
-                uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(pIemCpu, &u32Imm);
+                uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm);
                 IEM_MC_BEGIN(3, 0);
                 IEM_MC_ARG(uint32_t *,      pu32Dst,                0);
@@ -10462 +10459 @@
             case IEMMODE_64BIT:
             {
-                uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(pIemCpu, &u64Imm);
+                uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
                 IEM_MC_BEGIN(3, 0);
                 IEM_MC_ARG(uint64_t *,      pu64Dst,                0);
@@ -10492 +10489 @@
 
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(pIemCpu, &u16Imm);
+                uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
                 IEM_MC_ASSIGN(u16Src, u16Imm);
                 IEM_MC_MEM_MAP(pu16Dst, IEM_ACCESS_DATA_R, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
@@ -10514 +10511 @@
 
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(pIemCpu, &u32Imm);
+                uint32_t u32Imm; IEM_OPCODE_GET_NEXT_U32(&u32Imm);
                 IEM_MC_ASSIGN(u32Src, u32Imm);
                 IEM_MC_MEM_MAP(pu32Dst, IEM_ACCESS_DATA_R, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
@@ -10536 +10533 @@
 
                 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffDst, bRm);
-                uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(pIemCpu, &u64Imm);
+                uint64_t u64Imm; IEM_OPCODE_GET_NEXT_S32_SX_U64(&u64Imm);
                 IEM_MC_ASSIGN(u64Src, u64Imm);
                 IEM_MC_MEM_MAP(pu64Dst, IEM_ACCESS_DATA_R, pIemCpu->iEffSeg, GCPtrEffDst, 0 /*arg*/);
@@ -10782 +10779 @@
 FNIEMOP_DEF(iemOp_Grp3_Eb)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
     {
@@ -10798 +10795 @@
             IEMOP_MNEMONIC("mul Eb");
             IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
-            return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, &iemAImpl_mul_u8);
+            return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, iemAImpl_mul_u8);
         case 5:
             IEMOP_MNEMONIC("imul Eb");
             IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF);
-            return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, &iemAImpl_imul_u8);
+            return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, iemAImpl_imul_u8);
         case 6:
             IEMOP_MNEMONIC("div Eb");
             IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_OF | X86_EFL_CF);
-            return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, &iemAImpl_div_u8);
+            return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, iemAImpl_div_u8);
         case 7:
             IEMOP_MNEMONIC("idiv Eb");
             IEMOP_VERIFICATION_UNDEFINED_EFLAGS(X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_OF | X86_EFL_CF);
-            return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, &iemAImpl_idiv_u8);
+            return FNIEMOP_CALL_2(iemOpCommonGrp3MulDivEb, bRm, iemAImpl_idiv_u8);
         IEM_NOT_REACHED_DEFAULT_CASE_RET();
     }
@@ -10819 +10816 @@
 FNIEMOP_DEF(iemOp_Grp3_Ev)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
     {
@@ -10925 +10922 @@
 FNIEMOP_DEF(iemOp_Grp4)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
     {
@@ -11294 +11291 @@
 FNIEMOP_DEF(iemOp_Grp5)
 {
-    uint8_t bRm; IEM_OPCODE_GET_NEXT_BYTE(pIemCpu, &bRm);
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     switch ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK)
     {

trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp

@@ -39 +39 @@
 
 #define CHK_TYPE(a_ExpectedType, a_Param) \
-    do { a_ExpectedType *pCheckType = &(a_Param); } while (0)
+    do { a_ExpectedType const * pCheckType = &(a_Param); } while (0)
 #define CHK_PTYPE(a_ExpectedType, a_Param) \
     do { a_ExpectedType pCheckType = (a_Param); } while (0)
@@ -57 +57 @@
 #define IEM_NOT_REACHED_DEFAULT_CASE_RET()                  default: return VERR_INTERNAL_ERROR_4
 
-#define IEM_OPCODE_GET_NEXT_BYTE(a_pIemCpu, a_pu8)          do { *(a_pu8)  = g_bRandom; CHK_PTYPE(uint8_t  *, a_pu8);  } while (0)
-#define IEM_OPCODE_GET_NEXT_U16(a_pIemCpu, a_pu16)          do { *(a_pu16) = g_bRandom; CHK_PTYPE(uint16_t *, a_pu16); } while (0)
-#define IEM_OPCODE_GET_NEXT_U32(a_pIemCpu, a_pu32)          do { *(a_pu32) = g_bRandom; CHK_PTYPE(uint32_t *, a_pu32); } while (0)
-#define IEM_OPCODE_GET_NEXT_S32_SX_U64(a_pIemCpu, a_pu64)   do { *(a_pu64) = g_bRandom; CHK_PTYPE(uint64_t *, a_pu64); } while (0)
-#define IEM_OPCODE_GET_NEXT_U64(a_pIemCpu, a_pu64)          do { *(a_pu64) = g_bRandom; CHK_PTYPE(uint64_t *, a_pu64); } while (0)
-#define IEM_OPCODE_GET_NEXT_S8(a_pIemCpu,  a_pi8)           do { *(a_pi8)  = g_bRandom; CHK_PTYPE(int8_t   *, a_pi8);  } while (0)
+#define IEM_OPCODE_GET_NEXT_U8(a_pu8)                       do { *(a_pu8)  = g_bRandom; CHK_PTYPE(uint8_t  *, a_pu8);  } while (0)
+#define IEM_OPCODE_GET_NEXT_U16(a_pu16)                     do { *(a_pu16) = g_bRandom; CHK_PTYPE(uint16_t *, a_pu16); } while (0)
+#define IEM_OPCODE_GET_NEXT_U32(a_pu32)                     do { *(a_pu32) = g_bRandom; CHK_PTYPE(uint32_t *, a_pu32); } while (0)
+#define IEM_OPCODE_GET_NEXT_S32_SX_U64(a_pu64)              do { *(a_pu64) = g_bRandom; CHK_PTYPE(uint64_t *, a_pu64); } while (0)
+#define IEM_OPCODE_GET_NEXT_U64(a_pu64)                     do { *(a_pu64) = g_bRandom; CHK_PTYPE(uint64_t *, a_pu64); } while (0)
+#define IEM_OPCODE_GET_NEXT_S8(a_pi8)                       do { *(a_pi8)  = g_bRandom; CHK_PTYPE(int8_t   *, a_pi8);  } while (0)
 #define IEM_OPCODE_GET_NEXT_S16(a_pi16)                     do { *(a_pi16) = g_bRandom; CHK_PTYPE(int16_t  *, a_pi16); } while (0)
 #define IEM_OPCODE_GET_NEXT_S32(a_pi32)                     do { *(a_pi32) = g_bRandom; CHK_PTYPE(int32_t  *, a_pi32); } while (0)
@@ -128 +128 @@
 IEMOPSHIFTDBLSIZES g_iemAImpl_shrd;
 
+
+#define iemAImpl_idiv_u8    ((PFNIEMAIMPLMULDIVU8)0)
+#define iemAImpl_div_u8     ((PFNIEMAIMPLMULDIVU8)0)
+#define iemAImpl_imul_u8    ((PFNIEMAIMPLMULDIVU8)0)
+#define iemAImpl_mul_u8     ((PFNIEMAIMPLMULDIVU8)0)
+
 /** @}  */
 
@@ -138 +144 @@
 #define IEM_MC_PAUSE()                                  do {} while (0)
 #define IEM_MC_CONTINUE()                               do {} while (0)
-#define IEM_MC_RETURN_ON_FAILURE(a_Expr)                do {} while (0)
 #define IEM_MC_ADVANCE_RIP()                            do {} while (0)
 #define IEM_MC_REL_JMP_S8(a_i8)                         CHK_TYPE(int8_t, a_i8)
 #define IEM_MC_REL_JMP_S16(a_i16)                       CHK_TYPE(int16_t, a_i16)
 #define IEM_MC_REL_JMP_S32(a_i32)                       CHK_TYPE(int32_t, a_i32)
-#define IEM_MC_SET_RIP_U16(a_u16NewIP)                  do {} while (0)
-#define IEM_MC_SET_RIP_U32(a_u32NewIP)                  do {} while (0)
-#define IEM_MC_SET_RIP_U64(a_u64NewIP)                  do {} while (0)
+#define IEM_MC_SET_RIP_U16(a_u16NewIP)                  CHK_TYPE(uint16_t, a_u16NewIP)
+#define IEM_MC_SET_RIP_U32(a_u32NewIP)                  CHK_TYPE(uint32_t, a_u32NewIP)
+#define IEM_MC_SET_RIP_U64(a_u64NewIP)                  CHK_TYPE(uint64_t, a_u64NewIP)
 #define IEM_MC_RAISE_DIVIDE_ERROR()                     return VERR_TRPM_ACTIVE_TRAP
 #define IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE()       do {} while (0)
@@ -159 +164 @@
     uint32_t a_Name; \
     uint32_t *a_pName = &a_Name
-#define IEM_MC_COMMIT_EFLAGS(a_EFlags)                  do {} while (0)
+#define IEM_MC_COMMIT_EFLAGS(a_EFlags)                  CHK_TYPE(uint32_t, a_EFlags)
 #define IEM_MC_ASSIGN(a_VarOrArg, a_CVariableOrConst)   (a_VarOrArg) = (0)
-#define IEM_MC_FETCH_GREG_U8(a_u8Dst, a_iGReg)          (a_u8Dst)  = 0
-#define IEM_MC_FETCH_GREG_U8_ZX_U16(a_u16Dst, a_iGReg)  (a_u16Dst) = 0
-#define IEM_MC_FETCH_GREG_U8_ZX_U32(a_u32Dst, a_iGReg)  (a_u32Dst) = 0
-#define IEM_MC_FETCH_GREG_U8_ZX_U64(a_u64Dst, a_iGReg)  (a_u64Dst) = 0
-#define IEM_MC_FETCH_GREG_U8_SX_U16(a_u16Dst, a_iGReg)  (a_u16Dst) = 0
-#define IEM_MC_FETCH_GREG_U8_SX_U32(a_u32Dst, a_iGReg)  (a_u32Dst) = 0
-#define IEM_MC_FETCH_GREG_U8_SX_U64(a_u64Dst, a_iGReg)  (a_u64Dst) = 0
-#define IEM_MC_FETCH_GREG_U16(a_u16Dst, a_iGReg)        (a_u16Dst) = 0
-#define IEM_MC_FETCH_GREG_U16_ZX_U32(a_u32Dst, a_iGReg) (a_u32Dst) = 0
-#define IEM_MC_FETCH_GREG_U16_ZX_U64(a_u64Dst, a_iGReg) (a_u64Dst) = 0
-#define IEM_MC_FETCH_GREG_U16_SX_U32(a_u32Dst, a_iGReg) (a_u32Dst) = 0
-#define IEM_MC_FETCH_GREG_U16_SX_U64(a_u64Dst, a_iGReg) (a_u64Dst) = 0
-#define IEM_MC_FETCH_GREG_U32(a_u32Dst, a_iGReg)        (a_u32Dst) = 0
-#define IEM_MC_FETCH_GREG_U32_ZX_U64(a_u64Dst, a_iGReg) (a_u64Dst) = 0
-#define IEM_MC_FETCH_GREG_U32_SX_U64(a_u64Dst, a_iGReg) (a_u64Dst) = 0
-#define IEM_MC_FETCH_GREG_U64(a_u64Dst, a_iGReg)        (a_u64Dst) = 0
-#define IEM_MC_FETCH_SREG_U16(a_u16Dst, a_iSReg)        (a_u16Dst) = 0
-#define IEM_MC_FETCH_SREG_ZX_U32(a_u32Dst, a_iSReg)     (a_u32Dst) = 0
-#define IEM_MC_FETCH_SREG_ZX_U64(a_u64Dst, a_iSReg)     (a_u64Dst) = 0
-#define IEM_MC_FETCH_CR0_U16(a_u16Dst)                  (a_u16Dst) = 0
-#define IEM_MC_FETCH_CR0_U32(a_u32Dst)                  (a_u32Dst) = 0
-#define IEM_MC_FETCH_CR0_U64(a_u64Dst)                  (a_u64Dst) = 0
-#define IEM_MC_FETCH_EFLAGS(a_EFlags)                   (a_EFlags) = 0
-#define IEM_MC_FETCH_FSW(a_u16Fsw)                      (a_u16Fsw) = 0
-#define IEM_MC_STORE_GREG_U8(a_iGReg, a_u8Value)        do {} while (0)
-#define IEM_MC_STORE_GREG_U16(a_iGReg, a_u16Value)      do {} while (0)
-#define IEM_MC_STORE_GREG_U32(a_iGReg, a_u32Value)      do {} while (0)
-#define IEM_MC_STORE_GREG_U64(a_iGReg, a_u64Value)      do {} while (0)
-#define IEM_MC_CLEAR_HIGH_GREG_U64(a_iGReg)             do {} while (0)
-#define IEM_MC_REF_GREG_U8(a_pu8Dst, a_iGReg)           (a_pu8Dst)  = (uint8_t  *)((uintptr_t)0)
-#define IEM_MC_REF_GREG_U16(a_pu16Dst, a_iGReg)         (a_pu16Dst) = (uint16_t *)((uintptr_t)0)
-#define IEM_MC_REF_GREG_U32(a_pu32Dst, a_iGReg)         (a_pu32Dst) = (uint32_t *)((uintptr_t)0)
-#define IEM_MC_REF_GREG_U64(a_pu64Dst, a_iGReg)         (a_pu64Dst) = (uint64_t *)((uintptr_t)0)
-#define IEM_MC_REF_EFLAGS(a_pEFlags)                    (a_pEFlags) = (uint32_t *)((uintptr_t)0)
+#define IEM_MC_ASSIGN_TO_SMALLER                        IEM_MC_ASSIGN
+
+#define IEM_MC_FETCH_GREG_U8(a_u8Dst, a_iGReg)          do { (a_u8Dst)  = 0; CHK_TYPE(uint8_t,  a_u8Dst);  } while (0)
+#define IEM_MC_FETCH_GREG_U8_ZX_U16(a_u16Dst, a_iGReg)  do { (a_u16Dst) = 0; CHK_TYPE(uint16_t, a_u16Dst); } while (0)
+#define IEM_MC_FETCH_GREG_U8_ZX_U32(a_u32Dst, a_iGReg)  do { (a_u32Dst) = 0; CHK_TYPE(uint32_t, a_u32Dst); } while (0)
+#define IEM_MC_FETCH_GREG_U8_ZX_U64(a_u64Dst, a_iGReg)  do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0)
+#define IEM_MC_FETCH_GREG_U8_SX_U16(a_u16Dst, a_iGReg)  do { (a_u16Dst) = 0; CHK_TYPE(uint16_t, a_u16Dst); } while (0)
+#define IEM_MC_FETCH_GREG_U8_SX_U32(a_u32Dst, a_iGReg)  do { (a_u32Dst) = 0; CHK_TYPE(uint32_t, a_u32Dst); } while (0)
+#define IEM_MC_FETCH_GREG_U8_SX_U64(a_u64Dst, a_iGReg)  do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0)
+#define IEM_MC_FETCH_GREG_U16(a_u16Dst, a_iGReg)        do { (a_u16Dst) = 0; CHK_TYPE(uint16_t, a_u16Dst); } while (0)
+#define IEM_MC_FETCH_GREG_U16_ZX_U32(a_u32Dst, a_iGReg) do { (a_u32Dst) = 0; CHK_TYPE(uint32_t, a_u32Dst); } while (0)
+#define IEM_MC_FETCH_GREG_U16_ZX_U64(a_u64Dst, a_iGReg) do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0)
+#define IEM_MC_FETCH_GREG_U16_SX_U32(a_u32Dst, a_iGReg) do { (a_u32Dst) = 0; CHK_TYPE(uint32_t, a_u32Dst); } while (0)
+#define IEM_MC_FETCH_GREG_U16_SX_U64(a_u64Dst, a_iGReg) do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0)
+#define IEM_MC_FETCH_GREG_U32(a_u32Dst, a_iGReg)        do { (a_u32Dst) = 0; CHK_TYPE(uint32_t, a_u32Dst); } while (0)
+#define IEM_MC_FETCH_GREG_U32_ZX_U64(a_u64Dst, a_iGReg) do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0)
+#define IEM_MC_FETCH_GREG_U32_SX_U64(a_u64Dst, a_iGReg) do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0)
+#define IEM_MC_FETCH_GREG_U64(a_u64Dst, a_iGReg)        do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0)
+#define IEM_MC_FETCH_SREG_U16(a_u16Dst, a_iSReg)        do { (a_u16Dst) = 0; CHK_TYPE(uint16_t, a_u16Dst); } while (0)
+#define IEM_MC_FETCH_SREG_ZX_U32(a_u32Dst, a_iSReg)     do { (a_u32Dst) = 0; CHK_TYPE(uint32_t, a_u32Dst); } while (0)
+#define IEM_MC_FETCH_SREG_ZX_U64(a_u64Dst, a_iSReg)     do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0)
+#define IEM_MC_FETCH_CR0_U16(a_u16Dst)                  do { (a_u16Dst) = 0; CHK_TYPE(uint16_t, a_u16Dst); } while (0)
+#define IEM_MC_FETCH_CR0_U32(a_u32Dst)                  do { (a_u32Dst) = 0; CHK_TYPE(uint32_t, a_u32Dst); } while (0)
+#define IEM_MC_FETCH_CR0_U64(a_u64Dst)                  do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0)
+#define IEM_MC_FETCH_EFLAGS(a_EFlags)                   do { (a_EFlags) = 0; CHK_TYPE(uint32_t, a_EFlags); } while (0)
+#define IEM_MC_FETCH_FSW(a_u16Fsw)                      do { (a_u16Fsw) = 0; CHK_TYPE(uint16_t, a_u16Fsw); } while (0)
+#define IEM_MC_STORE_GREG_U8(a_iGReg, a_u8Value)        do { CHK_TYPE(uint8_t, a_u8Value); } while (0)
+#define IEM_MC_STORE_GREG_U16(a_iGReg, a_u16Value)      do { CHK_TYPE(uint16_t, a_u16Value); } while (0)
+#define IEM_MC_STORE_GREG_U32(a_iGReg, a_u32Value)      do {  } while (0)
+#define IEM_MC_STORE_GREG_U64(a_iGReg, a_u64Value)      do {  } while (0)
+#define IEM_MC_STORE_GREG_U8_CONST(a_iGReg, a_u8C)      do { AssertCompile((uint8_t )(a_u8C)  == (a_u8C) ); } while (0)
+#define IEM_MC_STORE_GREG_U16_CONST(a_iGReg, a_u16C)    do { AssertCompile((uint16_t)(a_u16C) == (a_u16C)); } while (0)
+#define IEM_MC_STORE_GREG_U32_CONST(a_iGReg, a_u32C)    do { AssertCompile((uint32_t)(a_u32C) == (a_u32C)); } while (0)
+#define IEM_MC_STORE_GREG_U64_CONST(a_iGReg, a_u64C)    do { AssertCompile((uint64_t)(a_u64C) == (a_u64C)); } while (0)
+#define IEM_MC_CLEAR_HIGH_GREG_U64(a_iGReg)             do {  } while (0)
+#define IEM_MC_REF_GREG_U8(a_pu8Dst, a_iGReg)           do { (a_pu8Dst)  = (uint8_t  *)((uintptr_t)0); CHK_PTYPE(uint8_t  *, a_pu8Dst);  } while (0)
+#define IEM_MC_REF_GREG_U16(a_pu16Dst, a_iGReg)         do { (a_pu16Dst) = (uint16_t *)((uintptr_t)0); CHK_PTYPE(uint16_t *, a_pu16Dst); } while (0)
+#define IEM_MC_REF_GREG_U32(a_pu32Dst, a_iGReg)         do { (a_pu32Dst) = (uint32_t *)((uintptr_t)0); CHK_PTYPE(uint32_t *, a_pu32Dst); } while (0)
+#define IEM_MC_REF_GREG_U64(a_pu64Dst, a_iGReg)         do { (a_pu64Dst) = (uint64_t *)((uintptr_t)0); CHK_PTYPE(uint64_t *, a_pu64Dst); } while (0)
+#define IEM_MC_REF_EFLAGS(a_pEFlags)                    do { (a_pEFlags) = (uint32_t *)((uintptr_t)0); CHK_PTYPE(uint32_t *, a_pEFlags); } while (0)
 #define IEM_MC_ADD_GREG_U8(a_iGReg, a_u16Value)         do {} while (0)
 #define IEM_MC_ADD_GREG_U16(a_iGReg, a_u16Value)        do {} while (0)