Changeset 37004 in vbox for trunk/src/VBox
- Timestamp:
- May 8, 2011 6:22:11 PM (14 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
-
VMMAll/IEMAll.cpp (modified) (3 diffs)
-
VMMAll/IEMAllInstructions.cpp.h (modified) (5 diffs)
-
testcase/tstIEMCheckMc.cpp (modified) (5 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r37003 r37004 3740 3740 #define IEM_MC_FETCH_GREG_U32_SX_U64(a_u64Dst, a_iGReg) (a_u64Dst) = (int32_t)iemGRegFetchU32(pIemCpu, (a_iGReg)) 3741 3741 #define IEM_MC_FETCH_GREG_U64(a_u64Dst, a_iGReg) (a_u64Dst) = iemGRegFetchU64(pIemCpu, (a_iGReg)) 3742 #define IEM_MC_FETCH_GREG_U64_ZX_U64 IEM_MC_FETCH_GREG_U64 3742 3743 #define IEM_MC_FETCH_SREG_U16(a_u16Dst, a_iSReg) (a_u16Dst) = iemSRegFetchU16(pIemCpu, (a_iSReg)) 3743 3744 #define IEM_MC_FETCH_SREG_ZX_U32(a_u32Dst, a_iSReg) (a_u32Dst) = iemSRegFetchU16(pIemCpu, (a_iSReg)) … … 3767 3768 #define IEM_MC_REF_EFLAGS(a_pEFlags) (a_pEFlags) = &(pIemCpu)->CTX_SUFF(pCtx)->eflags.u 3768 3769 3769 #define IEM_MC_ADD_GREG_U8(a_iGReg, a_u 16Value) *(uint8_t*)iemGRegRef(pIemCpu, (a_iGReg)) += (a_u8Value)3770 #define IEM_MC_ADD_GREG_U8(a_iGReg, a_u8Value) *(uint8_t *)iemGRegRef(pIemCpu, (a_iGReg)) += (a_u8Value) 3770 3771 #define IEM_MC_ADD_GREG_U16(a_iGReg, a_u16Value) *(uint16_t *)iemGRegRef(pIemCpu, (a_iGReg)) += (a_u16Value) 3771 3772 #define IEM_MC_ADD_GREG_U32(a_iGReg, a_u32Value) \ … … 3787 3788 #define IEM_MC_SUB_GREG_U64(a_iGReg, a_u64Value) *(uint64_t *)iemGRegRef(pIemCpu, (a_iGReg)) -= (a_u64Value) 3788 3789 3789 #define IEM_MC_ADD_GREG_U8_TO_LOCAL(a_u 16Value, a_iGReg) (a_u8Value) += iemGRegFetchU8( pIemCpu, (a_iGReg))3790 #define IEM_MC_ADD_GREG_U16_TO_LOCAL(a_u16Value, a_iGReg) (a_u16Value) += iemGRegFetchU16(pIemCpu, (a_iGReg))3791 #define IEM_MC_ADD_GREG_U32_TO_LOCAL(a_u32Value, a_iGReg) (a_u32Value) += iemGRegFetchU32(pIemCpu, (a_iGReg))3792 #define IEM_MC_ADD_GREG_U64_TO_LOCAL(a_u64Value, a_iGReg) (a_u64Value) += iemGRegFetchU64(pIemCpu, (a_iGReg))3790 #define IEM_MC_ADD_GREG_U8_TO_LOCAL(a_u8Value, a_iGReg) do { (a_u8Value) += iemGRegFetchU8( pIemCpu, (a_iGReg)); } while (0) 3791 #define IEM_MC_ADD_GREG_U16_TO_LOCAL(a_u16Value, a_iGReg) do { (a_u16Value) += iemGRegFetchU16(pIemCpu, (a_iGReg)); } while (0) 3792 #define IEM_MC_ADD_GREG_U32_TO_LOCAL(a_u32Value, a_iGReg) do { (a_u32Value) += iemGRegFetchU32(pIemCpu, (a_iGReg)); } while (0) 3793 #define IEM_MC_ADD_GREG_U64_TO_LOCAL(a_u64Value, a_iGReg) do { (a_u64Value) += iemGRegFetchU64(pIemCpu, (a_iGReg)); } while (0) 3793 3794 #define IEM_MC_ADD_LOCAL_S16_TO_EFF_ADDR(a_EffAddr, a_i16) do { (a_EffAddr) += (a_i16); } while (0) 3794 3795 #define IEM_MC_ADD_LOCAL_S32_TO_EFF_ADDR(a_EffAddr, a_i32) do { (a_EffAddr) += (a_i32); } while (0) -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h
r37003 r37004 7743 7743 IEM_MC_BEGIN(0, 2); \ 7744 7744 IEM_MC_LOCAL(uint##ValBits##_t, uValue); \ 7745 IEM_MC_LOCAL( uint##AddrBits##_t,uAddr); \7746 IEM_MC_FETCH_GREG_U##AddrBits (uAddr, X86_GREG_xSI); \7745 IEM_MC_LOCAL(RTGCPTR, uAddr); \ 7746 IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xSI); \ 7747 7747 IEM_MC_FETCH_MEM_U##ValBits(uValue, pIemCpu->iEffSeg, uAddr); \ 7748 IEM_MC_FETCH_GREG_U##AddrBits (uAddr, X86_GREG_xDI); \7748 IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xDI); \ 7749 7749 IEM_MC_STORE_MEM_U##ValBits(X86_SREG_ES, uAddr, uValue); \ 7750 7750 IEM_MC_IF_EFL_BIT_SET(X86_EFL_DF) { \ … … 7885 7885 IEM_MC_ARG(uint32_t *, pEFlags, 2); \ 7886 7886 IEM_MC_LOCAL(uint##ValBits##_t, uValue1); \ 7887 IEM_MC_LOCAL( uint##AddrBits##_t,uAddr); \7887 IEM_MC_LOCAL(RTGCPTR, uAddr); \ 7888 7888 \ 7889 IEM_MC_FETCH_GREG_U##AddrBits (uAddr, X86_GREG_xSI); \7889 IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xSI); \ 7890 7890 IEM_MC_FETCH_MEM_U##ValBits(uValue1, pIemCpu->iEffSeg, uAddr); \ 7891 IEM_MC_FETCH_GREG_U##AddrBits (uAddr, X86_GREG_xDI); \7891 IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xDI); \ 7892 7892 IEM_MC_FETCH_MEM_U##ValBits(uValue2, X86_SREG_ES, uAddr); \ 7893 7893 IEM_MC_REF_LOCAL(puValue1, uValue1); \ … … 8095 8095 IEM_MC_BEGIN(0, 2); \ 8096 8096 IEM_MC_LOCAL(uint##ValBits##_t, uValue); \ 8097 IEM_MC_LOCAL( uint##AddrBits##_t, uAddr); \8097 IEM_MC_LOCAL(RTGCPTR, uAddr); \ 8098 8098 IEM_MC_FETCH_GREG_U##ValBits(uValue, X86_GREG_xAX); \ 8099 IEM_MC_FETCH_GREG_U##AddrBits (uAddr, X86_GREG_xDI); \8099 IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xDI); \ 8100 8100 IEM_MC_STORE_MEM_U##ValBits(X86_SREG_ES, uAddr, uValue); \ 8101 8101 IEM_MC_IF_EFL_BIT_SET(X86_EFL_DF) { \ … … 8231 8231 IEM_MC_BEGIN(0, 2); \ 8232 8232 IEM_MC_LOCAL(uint##ValBits##_t, uValue); \ 8233 IEM_MC_LOCAL( uint##AddrBits##_t, uAddr); \8234 IEM_MC_FETCH_GREG_U##AddrBits (uAddr, X86_GREG_xSI); \8233 IEM_MC_LOCAL(RTGCPTR, uAddr); \ 8234 IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xSI); \ 8235 8235 IEM_MC_FETCH_MEM_U##ValBits(uValue, pIemCpu->iEffSeg, uAddr); \ 8236 8236 IEM_MC_STORE_GREG_U##ValBits(X86_GREG_xAX, uValue); \ … … 8369 8369 IEM_MC_ARG(uint##ValBits##_t, uValue, 1); \ 8370 8370 IEM_MC_ARG(uint32_t *, pEFlags, 2); \ 8371 IEM_MC_LOCAL( uint##AddrBits##_t,uAddr); \8371 IEM_MC_LOCAL(RTGCPTR, uAddr); \ 8372 8372 \ 8373 IEM_MC_FETCH_GREG_U##AddrBits (uAddr, X86_GREG_xDI); \8373 IEM_MC_FETCH_GREG_U##AddrBits##_ZX_U64(uAddr, X86_GREG_xDI); \ 8374 8374 IEM_MC_FETCH_MEM_U##ValBits(uValue, X86_SREG_ES, uAddr); \ 8375 8375 IEM_MC_REF_GREG_U##ValBits(puRax, X86_GREG_xAX); \ -
trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp
r37003 r37004 42 42 #define CHK_PTYPE(a_ExpectedType, a_Param) \ 43 43 do { a_ExpectedType pCheckType = (a_Param); } while (0) 44 45 #define CHK_CONST(a_ExpectedType, a_Const) \ 46 do { \ 47 AssertCompile((a_Const) / 2 == (a_Const) / 2); \ 48 AssertCompile((a_ExpectedType)(a_Const) == (a_Const)); \ 49 } while (0) 50 51 #define CHK_SINGLE_BIT(a_ExpectedType, a_fBitMask) \ 52 do { \ 53 CHK_CONST(a_ExpectedType, a_fBitMask); \ 54 AssertCompile(RT_IS_POWER_OF_TWO(a_fBitMask)); \ 55 } while (0) 56 57 #define CHK_GCPTR(a_EffAddr) \ 58 CHK_TYPE(RTGCPTR, a_EffAddr) 59 44 60 45 61 … … 89 105 #define IEM_IS_AMD_CPUID_FEATURE_PRESENT_ECX(a_fEcx) (g_fRandom) 90 106 #define IEM_IS_INTEL_CPUID_FEATURE_PRESENT_EDX(a_fEdx) (g_fRandom) 91 //#define IEM_IS_CANONICAL(a_u64Addr) (g_fRandom)92 107 93 108 #define iemRecalEffOpSize(a_pIemCpu) do { } while (0) … … 184 199 #define IEM_MC_FETCH_GREG_U32_SX_U64(a_u64Dst, a_iGReg) do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0) 185 200 #define IEM_MC_FETCH_GREG_U64(a_u64Dst, a_iGReg) do { (a_u64Dst) = 0; CHK_TYPE(uint64_t, a_u64Dst); } while (0) 201 #define IEM_MC_FETCH_GREG_U64_ZX_U64 IEM_MC_FETCH_GREG_U64 186 202 #define IEM_MC_FETCH_SREG_U16(a_u16Dst, a_iSReg) do { (a_u16Dst) = 0; CHK_TYPE(uint16_t, a_u16Dst); } while (0) 187 203 #define IEM_MC_FETCH_SREG_ZX_U32(a_u32Dst, a_iSReg) do { (a_u32Dst) = 0; CHK_TYPE(uint32_t, a_u32Dst); } while (0) … … 206 222 #define IEM_MC_REF_GREG_U64(a_pu64Dst, a_iGReg) do { (a_pu64Dst) = (uint64_t *)((uintptr_t)0); CHK_PTYPE(uint64_t *, a_pu64Dst); } while (0) 207 223 #define IEM_MC_REF_EFLAGS(a_pEFlags) do { (a_pEFlags) = (uint32_t *)((uintptr_t)0); CHK_PTYPE(uint32_t *, a_pEFlags); } while (0) 208 #define IEM_MC_ADD_GREG_U8(a_iGReg, a_u16Value) do {} while (0) 209 #define IEM_MC_ADD_GREG_U16(a_iGReg, a_u16Value) do {} while (0) 210 #define IEM_MC_ADD_GREG_U32(a_iGReg, a_u32Value) do {} while (0) 211 #define IEM_MC_ADD_GREG_U64(a_iGReg, a_u64Value) do {} while (0) 212 #define IEM_MC_SUB_GREG_U8(a_iGReg, a_u8Value) do {} while (0) 213 #define IEM_MC_SUB_GREG_U16(a_iGReg, a_u16Value) do {} while (0) 214 #define IEM_MC_SUB_GREG_U32(a_iGReg, a_u32Value) do {} while (0) 215 #define IEM_MC_SUB_GREG_U64(a_iGReg, a_u64Value) do {} while (0) 216 217 #define IEM_MC_ADD_GREG_U8_TO_LOCAL(a_u16Value, a_iGReg) (a_u8Value) += 1 218 #define IEM_MC_ADD_GREG_U16_TO_LOCAL(a_u16Value, a_iGReg) (a_u16Value) += 1 219 #define IEM_MC_ADD_GREG_U32_TO_LOCAL(a_u32Value, a_iGReg) (a_u32Value) += 1 220 #define IEM_MC_ADD_GREG_U64_TO_LOCAL(a_u64Value, a_iGReg) (a_u64Value) += 1 221 #define IEM_MC_ADD_LOCAL_S16_TO_EFF_ADDR(a_EffAddr, a_i16) do { (a_EffAddr) += (a_i16); } while (0) 222 #define IEM_MC_ADD_LOCAL_S32_TO_EFF_ADDR(a_EffAddr, a_i32) do { (a_EffAddr) += (a_i32); } while (0) 223 #define IEM_MC_ADD_LOCAL_S64_TO_EFF_ADDR(a_EffAddr, a_i64) do { (a_EffAddr) += (a_i64); } while (0) 224 #define IEM_MC_AND_LOCAL_U16(a_u16Local, a_u16Mask) do { (a_u16Local) &= (a_u16Mask); } while (0) 225 #define IEM_MC_AND_LOCAL_U32(a_u32Local, a_u32Mask) do { (a_u32Local) &= (a_u32Mask); } while (0) 226 #define IEM_MC_AND_LOCAL_U64(a_u64Local, a_u64Mask) do { (a_u64Local) &= (a_u64Mask); } while (0) 227 #define IEM_MC_AND_ARG_U16(a_u16Arg, a_u16Mask) do { (a_u16Arg) &= (a_u16Mask); } while (0) 228 #define IEM_MC_AND_ARG_U32(a_u32Arg, a_u32Mask) do { (a_u32Arg) &= (a_u32Mask); } while (0) 229 #define IEM_MC_AND_ARG_U64(a_u64Arg, a_u64Mask) do { (a_u64Arg) &= (a_u64Mask); } while (0) 230 #define IEM_MC_SAR_LOCAL_S16(a_i16Local, a_cShift) do { (a_i16Local) >>= (a_cShift); } while (0) 231 #define IEM_MC_SAR_LOCAL_S32(a_i32Local, a_cShift) do { (a_i32Local) >>= (a_cShift); } while (0) 232 #define IEM_MC_SAR_LOCAL_S64(a_i64Local, a_cShift) do { (a_i64Local) >>= (a_cShift); } while (0) 233 #define IEM_MC_SHL_LOCAL_S16(a_i16Local, a_cShift) do { (a_i16Local) <<= (a_cShift); } while (0) 234 #define IEM_MC_SHL_LOCAL_S32(a_i32Local, a_cShift) do { (a_i32Local) <<= (a_cShift); } while (0) 235 #define IEM_MC_SHL_LOCAL_S64(a_i64Local, a_cShift) do { (a_i64Local) <<= (a_cShift); } while (0) 236 #define IEM_MC_SET_EFL_BIT(a_fBit) do { (pIemCpu)->CTX_SUFF(pCtx)->eflags.u |= (a_fBit); } while (0) 237 #define IEM_MC_CLEAR_EFL_BIT(a_fBit) do { (pIemCpu)->CTX_SUFF(pCtx)->eflags.u &= ~(a_fBit); } while (0) 238 239 #define IEM_MC_FETCH_MEM_U8(a_u8Dst, a_iSeg, a_GCPtrMem) do {} while (0) 240 #define IEM_MC_FETCH_MEM_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do {} while (0) 241 #define IEM_MC_FETCH_MEM_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do {} while (0) 242 #define IEM_MC_FETCH_MEM_S32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do {} while (0) 243 #define IEM_MC_FETCH_MEM_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do {} while (0) 244 #define IEM_MC_FETCH_MEM_U8_ZX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do {} while (0) 245 #define IEM_MC_FETCH_MEM_U8_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do {} while (0) 246 #define IEM_MC_FETCH_MEM_U8_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do {} while (0) 247 #define IEM_MC_FETCH_MEM_U16_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do {} while (0) 248 #define IEM_MC_FETCH_MEM_U16_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do {} while (0) 249 #define IEM_MC_FETCH_MEM_U32_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do {} while (0) 250 #define IEM_MC_FETCH_MEM_U8_SX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do {} while (0) 251 #define IEM_MC_FETCH_MEM_U8_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do {} while (0) 252 #define IEM_MC_FETCH_MEM_U8_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do {} while (0) 253 #define IEM_MC_FETCH_MEM_U16_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do {} while (0) 254 #define IEM_MC_FETCH_MEM_U16_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do {} while (0) 255 #define IEM_MC_FETCH_MEM_U32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do {} while (0) 256 #define IEM_MC_STORE_MEM_U8(a_iSeg, a_GCPtrMem, a_u8Value) do {} while (0) 257 #define IEM_MC_STORE_MEM_U16(a_iSeg, a_GCPtrMem, a_u16Value) do {} while (0) 258 #define IEM_MC_STORE_MEM_U32(a_iSeg, a_GCPtrMem, a_u32Value) do {} while (0) 259 #define IEM_MC_STORE_MEM_U64(a_iSeg, a_GCPtrMem, a_u64Value) do {} while (0) 224 225 #define IEM_MC_ADD_GREG_U8(a_iGReg, a_u8Value) do { CHK_CONST(uint8_t, a_u8Value); } while (0) 226 #define IEM_MC_ADD_GREG_U16(a_iGReg, a_u16Value) do { CHK_CONST(uint16_t, a_u16Value); } while (0) 227 #define IEM_MC_ADD_GREG_U32(a_iGReg, a_u32Value) do { CHK_CONST(uint32_t, a_u32Value); } while (0) 228 #define IEM_MC_ADD_GREG_U64(a_iGReg, a_u64Value) do { CHK_CONST(uint64_t, a_u64Value); } while (0) 229 #define IEM_MC_SUB_GREG_U8(a_iGReg, a_u8Value) do { CHK_CONST(uint8_t, a_u8Value); } while (0) 230 #define IEM_MC_SUB_GREG_U16(a_iGReg, a_u16Value) do { CHK_CONST(uint16_t, a_u16Value); } while (0) 231 #define IEM_MC_SUB_GREG_U32(a_iGReg, a_u32Value) do { CHK_CONST(uint32_t, a_u32Value); } while (0) 232 #define IEM_MC_SUB_GREG_U64(a_iGReg, a_u64Value) do { CHK_CONST(uint64_t, a_u64Value); } while (0) 233 234 #define IEM_MC_ADD_GREG_U8_TO_LOCAL(a_u16Value, a_iGReg) do { (a_u8Value) += 1; CHK_CONST(uint8_t, a_u8Value); } while (0) 235 #define IEM_MC_ADD_GREG_U16_TO_LOCAL(a_u16Value, a_iGReg) do { (a_u16Value) += 1; CHK_CONST(uint16_t, a_u16Value); } while (0) 236 #define IEM_MC_ADD_GREG_U32_TO_LOCAL(a_u32Value, a_iGReg) do { (a_u32Value) += 1; CHK_CONST(uint32_t, a_u32Value); } while (0) 237 #define IEM_MC_ADD_GREG_U64_TO_LOCAL(a_u64Value, a_iGReg) do { (a_u64Value) += 1; CHK_CONST(uint64_t, a_u64Value); } while (0) 238 #define IEM_MC_ADD_LOCAL_S16_TO_EFF_ADDR(a_EffAddr, a_i16) do { (a_EffAddr) += (a_i16); CHK_GCPTR(a_EffAddr); } while (0) 239 #define IEM_MC_ADD_LOCAL_S32_TO_EFF_ADDR(a_EffAddr, a_i32) do { (a_EffAddr) += (a_i32); CHK_GCPTR(a_EffAddr); } while (0) 240 #define IEM_MC_ADD_LOCAL_S64_TO_EFF_ADDR(a_EffAddr, a_i64) do { (a_EffAddr) += (a_i64); CHK_GCPTR(a_EffAddr); } while (0) 241 #define IEM_MC_AND_LOCAL_U16(a_u16Local, a_u16Mask) do { (a_u16Local) &= (a_u16Mask); CHK_TYPE(uint16_t, a_u16Local); CHK_CONST(uint16_t, a_u16Mask); } while (0) 242 #define IEM_MC_AND_LOCAL_U32(a_u32Local, a_u32Mask) do { (a_u32Local) &= (a_u32Mask); CHK_TYPE(uint32_t, a_u32Local); CHK_CONST(uint32_t, a_u32Mask); } while (0) 243 #define IEM_MC_AND_LOCAL_U64(a_u64Local, a_u64Mask) do { (a_u64Local) &= (a_u64Mask); CHK_TYPE(uint64_t, a_u64Local); CHK_CONST(uint64_t, a_u64Mask); } while (0) 244 #define IEM_MC_AND_ARG_U16(a_u16Arg, a_u16Mask) do { (a_u16Arg) &= (a_u16Mask); CHK_TYPE(uint16_t, a_u16Arg); CHK_CONST(uint16_t, a_u16Mask); } while (0) 245 #define IEM_MC_AND_ARG_U32(a_u32Arg, a_u32Mask) do { (a_u32Arg) &= (a_u32Mask); CHK_TYPE(uint32_t, a_u32Arg); CHK_CONST(uint32_t, a_u32Mask); } while (0) 246 #define IEM_MC_AND_ARG_U64(a_u64Arg, a_u64Mask) do { (a_u64Arg) &= (a_u64Mask); CHK_TYPE(uint64_t, a_u64Arg); CHK_CONST(uint64_t, a_u64Mask); } while (0) 247 #define IEM_MC_SAR_LOCAL_S16(a_i16Local, a_cShift) do { (a_i16Local) >>= (a_cShift); CHK_TYPE(int16_t, a_i16Local); CHK_CONST(uint8_t, a_cShift); } while (0) 248 #define IEM_MC_SAR_LOCAL_S32(a_i32Local, a_cShift) do { (a_i32Local) >>= (a_cShift); CHK_TYPE(int32_t, a_i32Local); CHK_CONST(uint8_t, a_cShift); } while (0) 249 #define IEM_MC_SAR_LOCAL_S64(a_i64Local, a_cShift) do { (a_i64Local) >>= (a_cShift); CHK_TYPE(int64_t, a_i64Local); CHK_CONST(uint8_t, a_cShift); } while (0) 250 #define IEM_MC_SHL_LOCAL_S16(a_i16Local, a_cShift) do { (a_i16Local) <<= (a_cShift); CHK_TYPE(int16_t, a_i16Local); CHK_CONST(uint8_t, a_cShift); } while (0) 251 #define IEM_MC_SHL_LOCAL_S32(a_i32Local, a_cShift) do { (a_i32Local) <<= (a_cShift); CHK_TYPE(int32_t, a_i32Local); CHK_CONST(uint8_t, a_cShift); } while (0) 252 #define IEM_MC_SHL_LOCAL_S64(a_i64Local, a_cShift) do { (a_i64Local) <<= (a_cShift); CHK_TYPE(int64_t, a_i64Local); CHK_CONST(uint8_t, a_cShift); } while (0) 253 #define IEM_MC_SET_EFL_BIT(a_fBit) do { CHK_SINGLE_BIT(uint32_t, a_fBit); } while (0) 254 #define IEM_MC_CLEAR_EFL_BIT(a_fBit) do { CHK_SINGLE_BIT(uint32_t, a_fBit); } while (0) 255 256 #define IEM_MC_FETCH_MEM_U8(a_u8Dst, a_iSeg, a_GCPtrMem) do { /*CHK_GCPTR(a_GCPtrMem);*/ } while (0) 257 #define IEM_MC_FETCH_MEM_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do { /*CHK_GCPTR(a_GCPtrMem);*/ } while (0) 258 #define IEM_MC_FETCH_MEM_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { /*CHK_GCPTR(a_GCPtrMem);*/ } while (0) 259 #define IEM_MC_FETCH_MEM_S32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { /*CHK_GCPTR(a_GCPtrMem);*/ } while (0) 260 #define IEM_MC_FETCH_MEM_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0) 261 #define IEM_MC_FETCH_MEM_U8_ZX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0) 262 #define IEM_MC_FETCH_MEM_U8_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0) 263 #define IEM_MC_FETCH_MEM_U8_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0) 264 #define IEM_MC_FETCH_MEM_U16_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0) 265 #define IEM_MC_FETCH_MEM_U16_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0) 266 #define IEM_MC_FETCH_MEM_U32_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0) 267 #define IEM_MC_FETCH_MEM_U8_SX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0) 268 #define IEM_MC_FETCH_MEM_U8_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0) 269 #define IEM_MC_FETCH_MEM_U8_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0) 270 #define IEM_MC_FETCH_MEM_U16_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0) 271 #define IEM_MC_FETCH_MEM_U16_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0) 272 #define IEM_MC_FETCH_MEM_U32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) do { CHK_GCPTR(a_GCPtrMem); } while (0) 273 #define IEM_MC_STORE_MEM_U8(a_iSeg, a_GCPtrMem, a_u8Value) do { /*CHK_GCPTR(a_GCPtrMem);*/ } while (0) 274 #define IEM_MC_STORE_MEM_U16(a_iSeg, a_GCPtrMem, a_u16Value) do { /*CHK_GCPTR(a_GCPtrMem);*/ } while (0) 275 #define IEM_MC_STORE_MEM_U32(a_iSeg, a_GCPtrMem, a_u32Value) do { /*CHK_GCPTR(a_GCPtrMem);*/ } while (0) 276 #define IEM_MC_STORE_MEM_U64(a_iSeg, a_GCPtrMem, a_u64Value) do { /*CHK_GCPTR(a_GCPtrMem);*/ } while (0) 260 277 261 278 #define IEM_MC_PUSH_U16(a_u16Value) do {} while (0) … … 268 285 #define IEM_MC_MEM_MAP_EX(a_pvMem, a_fAccess, a_cbMem, a_iSeg, a_GCPtrMem, a_iArg) do {} while (0) 269 286 #define IEM_MC_MEM_COMMIT_AND_UNMAP(a_pvMem, a_fAccess) do {} while (0) 270 #define IEM_MC_CALC_RM_EFF_ADDR(a_GCPtrEff, bRm) do { (a_GCPtrEff) = 0; } while (0)287 #define IEM_MC_CALC_RM_EFF_ADDR(a_GCPtrEff, bRm) do { (a_GCPtrEff) = 0; CHK_GCPTR(a_GCPtrEff); } while (0) 271 288 #define IEM_MC_CALL_VOID_AIMPL_2(a_pfn, a0, a1) do {} while (0) 272 289 #define IEM_MC_CALL_VOID_AIMPL_3(a_pfn, a0, a1, a2) do {} while (0)
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