Changeset 37013 in vbox for trunk/src/VBox
- Timestamp:
- May 9, 2011 12:23:37 PM (14 years ago)
- Location:
- trunk/src/VBox/VMM/VMMAll
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r37011 r37013 4528 4528 if ( pOrgCtx->eflags.Bits.u1IF 4529 4529 && TRPMHasTrap(pVCpu) 4530 //&& TRPMIsSoftwareInterrupt(pVCpu)4531 4530 && EMGetInhibitInterruptsPC(pVCpu) != pOrgCtx->rip) 4532 4531 { 4533 Log(("Injecting trap %#x\n", TRPMGetTrapNo(pVCpu))); 4534 iemCImpl_int(pIemCpu, 0, TRPMGetTrapNo(pVCpu), false); 4532 uint8_t u8TrapNo; 4533 TRPMEVENT enmType; 4534 RTGCUINT uErrCode; 4535 RTGCPTR uCr2; 4536 int rc2 = TRPMQueryTrapAll(pVCpu, &u8TrapNo, &enmType, &uErrCode, &uCr2); AssertRC(rc2); 4537 Log(("Injecting trap %#x\n", u8TrapNo)); 4538 4539 uint32_t fFlags; 4540 switch (enmType) 4541 { 4542 case TRPM_HARDWARE_INT: 4543 fFlags = IEM_XCPT_FLAGS_T_EXT_INT; 4544 uErrCode = uCr2 = 0; 4545 break; 4546 case TRPM_SOFTWARE_INT: 4547 fFlags = IEM_XCPT_FLAGS_T_SOFT_INT; 4548 uErrCode = uCr2 = 0; 4549 break; 4550 case TRPM_TRAP: 4551 fFlags = IEM_XCPT_FLAGS_T_CPU_XCPT; 4552 if (u8TrapNo == X86_XCPT_PF) 4553 fFlags |= IEM_XCPT_FLAGS_CR2; 4554 switch (u8TrapNo) 4555 { 4556 case X86_XCPT_DF: 4557 case X86_XCPT_TS: 4558 case X86_XCPT_NP: 4559 case X86_XCPT_SS: 4560 case X86_XCPT_PF: 4561 case X86_XCPT_AC: 4562 fFlags |= IEM_XCPT_FLAGS_ERR; 4563 break; 4564 } 4565 TRPMHasTrap(pVCpu) 4566 break; 4567 IEM_NOT_REACHED_DEFAULT_CASE_RET(); 4568 } 4569 iemCImpl_RaiseXcptOrInt(pIemCpu, 0, u8TrapNo, fFlags, (uint16_t)uErrCode, uCr2); 4535 4570 if (!IEM_VERIFICATION_ENABLED(pIemCpu)) 4536 4571 TRPMResetTrap(pVCpu); -
trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h
r36860 r37013 1115 1115 1116 1116 1117 /** 1118 * Implements int3 and int XX. 1119 * 1120 * @param u8Int The interrupt vector number. 1121 * @param fIsBpInstr Is it the breakpoint instruction. 1122 */ 1123 IEM_CIMPL_DEF_2(iemCImpl_int, uint8_t, u8Int, bool, fIsBpInstr) 1117 /** @name IEM_XCPT_FLAGS_XXX - flags for iemCImpl_RaiseXcptOrInt. 1118 * @{ */ 1119 /** CPU exception. */ 1120 #define IEM_XCPT_FLAGS_T_CPU_XCPT RT_BIT_32(0) 1121 /** External interrupt (from PIC, APIC, whatever). */ 1122 #define IEM_XCPT_FLAGS_T_EXT_INT RT_BIT_32(1) 1123 /** Software interrupt (int, into or bound). */ 1124 #define IEM_XCPT_FLAGS_T_SOFT_INT RT_BIT_32(2) 1125 /** Takes an error code. */ 1126 #define IEM_XCPT_FLAGS_ERR RT_BIT_32(3) 1127 /** Takes a CR2. */ 1128 #define IEM_XCPT_FLAGS_CR2 RT_BIT_32(4) 1129 /** Generated by the breakpoint instruction. */ 1130 #define IEM_XCPT_FLAGS_BP_INSTR RT_BIT_32(5) 1131 /** Mask out the nesting level. */ 1132 #define IEM_XCPT_FLAGS_NESTING_MASK UINT32_C(0xff000000) 1133 /** Shift count for the nesting level. */ 1134 #define IEM_XCPT_FLAGS_NESTING_SHIFT 24 1135 /** Mask out the nesting level after shifting. */ 1136 #define IEM_XCPT_FLAGS_NESTING_SMASK UINT32_C(0x000000ff) 1137 /** @} */ 1138 1139 1140 static VBOXSTRICTRC 1141 iemCImpl_RaiseXcptOrIntAgain(PIEMCPU pIemCpu, 1142 uint8_t u8Vector, 1143 uint32_t fFlags, 1144 uint16_t uErr, 1145 uint64_t uCr2, 1146 uint8_t u8PrevVector); 1147 1148 /** 1149 * Implements exceptions and interrupts. 1150 * 1151 * @returns VBox strict status code. 1152 * @param pIemCpu The IEM per CPU instance data. 1153 * @param cbInstr The number of bytes to offset rIP by in the return 1154 * address. 1155 * @param u8Vector The interrupt / exception vector number. 1156 * @param fFlags The flags. 1157 * @param uErr The error value if IEM_XCPT_FLAGS_ERR is set. 1158 * @param uCr2 The CR2 value if IEM_XCPT_FLAGS_CR2 is set. 1159 */ 1160 static VBOXSTRICTRC 1161 iemCImpl_RaiseXcptOrInt(PIEMCPU pIemCpu, 1162 uint8_t cbInstr, 1163 uint8_t u8Vector, 1164 uint32_t fFlags, 1165 uint16_t uErr, 1166 uint64_t uCr2) 1124 1167 { 1125 1168 /** @todo we should call TRPM to do this job. */ … … 1134 1177 { 1135 1178 /* read the IDT entry. */ 1136 if (pCtx->idtr.cbIdt < UINT32_C(4) * u8Int + 3) 1137 return iemRaiseGeneralProtectionFault(pIemCpu, X86_TRAP_ERR_IDT | ((uint16_t)u8Int << X86_TRAP_ERR_SEL_SHIFT)); 1179 if (pCtx->idtr.cbIdt < UINT32_C(4) * u8Vector + 3) 1180 return iemCImpl_RaiseXcptOrIntAgain(pIemCpu, 1181 X86_XCPT_GP, 1182 IEM_XCPT_FLAGS_T_CPU_XCPT | IEM_XCPT_FLAGS_ERR 1183 | (fFlags & IEM_XCPT_FLAGS_NESTING_MASK), 1184 X86_TRAP_ERR_IDT | ((uint16_t)u8Vector << X86_TRAP_ERR_SEL_SHIFT), 1185 0, 1186 u8Vector); 1138 1187 RTFAR16 Idte; 1139 rcStrict = iemMemFetchDataU32(pIemCpu, (uint32_t *)&Idte, UINT8_MAX, pCtx->idtr.pIdt + UINT32_C(4) * u8 Int);1188 rcStrict = iemMemFetchDataU32(pIemCpu, (uint32_t *)&Idte, UINT8_MAX, pCtx->idtr.pIdt + UINT32_C(4) * u8Vector); 1140 1189 if (RT_UNLIKELY(rcStrict != VINF_SUCCESS)) 1141 1190 return rcStrict; … … 1164 1213 } 1165 1214 1215 /* 1216 * continue here... 1217 */ 1166 1218 AssertFailed(); 1167 1219 return VERR_NOT_IMPLEMENTED; 1220 } 1221 1222 1223 /** 1224 * Deals with exceptions occuring while dispatching an exception or interrupt. 1225 * 1226 * @returns VBox strict status code. 1227 * @param pIemCpu The IEM per CPU instance data. 1228 * @param u8Vector The exception vector number. 1229 * @param fFlags The flags. 1230 * @param uErr The error value if IEM_XCPT_FLAGS_ERR is set. 1231 * @param uCr2 The CR2 value if IEM_XCPT_FLAGS_CR2 is set. 1232 * @param u8PrevVector The exception we tried raising. 1233 */ 1234 static VBOXSTRICTRC 1235 iemCImpl_RaiseXcptOrIntAgain(PIEMCPU pIemCpu, 1236 uint8_t u8Vector, 1237 uint32_t fFlags, 1238 uint16_t uErr, 1239 uint64_t uCr2, 1240 uint8_t u8PrevVector) 1241 { 1242 return iemCImpl_RaiseXcptOrInt(pIemCpu, 0, u8Vector, fFlags, uErr, uCr2); 1243 } 1244 1245 1246 1247 /** 1248 * Implements int3 and int XX. 1249 * 1250 * @param u8Int The interrupt vector number. 1251 * @param fIsBpInstr Is it the breakpoint instruction. 1252 */ 1253 IEM_CIMPL_DEF_2(iemCImpl_int, uint8_t, u8Int, bool, fIsBpInstr) 1254 { 1255 return iemCImpl_RaiseXcptOrInt(pIemCpu, 1256 cbInstr, 1257 u8Int, 1258 (fIsBpInstr ? IEM_XCPT_FLAGS_BP_INSTR : 0) | IEM_XCPT_FLAGS_T_SOFT_INT, 1259 0, 1260 0); 1168 1261 } 1169 1262
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