Changeset 37090 in vbox for trunk/src/VBox/VMM
- Timestamp:
- May 14, 2011 1:45:15 AM (14 years ago)
- svn:sync-xref-src-repo-rev:
- 71742
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r37084 r37090 605 605 static VBOXSTRICTRC iemMemStackPushBeginSpecial(PIEMCPU pIemCpu, size_t cbMem, void **ppvMem, uint64_t *puNewRsp); 606 606 static VBOXSTRICTRC iemMemMarkSelDescAccessed(PIEMCPU pIemCpu, uint16_t uSel); 607 static uint16_t iemSRegFetchU16(PIEMCPU pIemCpu, uint8_t iSegReg); 607 608 608 609 #ifdef IEM_VERIFICATION_MODE … … 1353 1354 /** Generated by the breakpoint instruction. */ 1354 1355 #define IEM_XCPT_FLAGS_BP_INSTR RT_BIT_32(5) 1355 /** Mask out the nesting level. */1356 #define IEM_XCPT_FLAGS_NESTING_MASK UINT32_C(0xff000000)1357 /** Shift count for the nesting level. */1358 #define IEM_XCPT_FLAGS_NESTING_SHIFT 241359 /** Mask out the nesting level after shifting. */1360 #define IEM_XCPT_FLAGS_NESTING_SMASK UINT32_C(0x000000ff)1361 1356 /** @} */ 1362 1357 … … 1810 1805 } 1811 1806 1812 /* ... register commit ing continues. */1807 /* ... register committing continues. */ 1813 1808 pCtx->cs = (NewCS & ~X86_SEL_RPL) | uNewCpl; 1814 1809 pCtx->csHid.u32Limit = cbLimitCS; … … 1818 1813 pCtx->rip = uNewEip; 1819 1814 pCtx->rflags.u &= ~fEflToClear; 1815 1816 if (fFlags & IEM_XCPT_FLAGS_T_CPU_XCPT) 1817 iemRaiseXcptAdjustState(pCtx, u8Vector); 1820 1818 1821 1819 return fFlags & IEM_XCPT_FLAGS_T_CPU_XCPT ? VINF_IEM_RAISED_XCPT : VINF_SUCCESS; … … 1891 1889 * @param uCr2 The CR2 value if IEM_XCPT_FLAGS_CR2 is set. 1892 1890 */ 1893 static VBOXSTRICTRC 1891 DECL_NO_INLINE(static, VBOXSTRICTRC) 1894 1892 iemRaiseXcptOrInt(PIEMCPU pIemCpu, 1895 1893 uint8_t cbInstr, … … 1904 1902 * Do recursion accounting. 1905 1903 */ 1906 uint8_t const uPrevXcpt = pIemCpu->uCurXcpt; 1904 uint8_t const uPrevXcpt = pIemCpu->uCurXcpt; 1905 uint32_t const fPrevXcpt = pIemCpu->fCurXcpt; 1907 1906 if (pIemCpu->cXcptRecursions == 0) 1908 1907 Log(("iemRaiseXcptOrInt: %#x at %04x:%RGv cbInstr=%#x fFlags=%#x uErr=%#x uCr2=%llx\n", … … 1910 1909 else 1911 1910 { 1912 Log(("iemRaiseXcptOrInt: %#x at %04x:%RGv cbInstr=%#x fFlags=%#x uErr=%#x uCr2=%llx; prev=%#x depth=%d \n",1913 u8Vector, pCtx->cs, pCtx->rip, cbInstr, fFlags, uErr, uCr2, pIemCpu->uCurXcpt, pIemCpu->cXcptRecursions + 1 ));1911 Log(("iemRaiseXcptOrInt: %#x at %04x:%RGv cbInstr=%#x fFlags=%#x uErr=%#x uCr2=%llx; prev=%#x depth=%d flags=%#x\n", 1912 u8Vector, pCtx->cs, pCtx->rip, cbInstr, fFlags, uErr, uCr2, pIemCpu->uCurXcpt, pIemCpu->cXcptRecursions + 1, fPrevXcpt)); 1914 1913 1915 1914 /** @todo double and tripple faults. */ 1916 1915 AssertReturn(pIemCpu->cXcptRecursions < 3, VERR_NOT_IMPLEMENTED); 1916 1917 /** @todo set X86_TRAP_ERR_EXTERNAL when appropriate. 1918 if (fPrevXcpt & IEM_XCPT_FLAGS_T_EXT_INT) 1919 { 1920 .... 1921 } */ 1917 1922 } 1918 1923 pIemCpu->cXcptRecursions++; 1919 1924 pIemCpu->uCurXcpt = u8Vector; 1925 pIemCpu->fCurXcpt = fFlags; 1926 1927 /* 1928 * Extensive logging. 1929 */ 1930 #ifdef LOG_ENABLED 1931 if (LogIs3Enabled()) 1932 { 1933 PVM pVM = IEMCPU_TO_VM(pIemCpu); 1934 PVMCPU pVCpu = IEMCPU_TO_VMCPU(pIemCpu); 1935 char szRegs[4096]; 1936 DBGFR3RegPrintf(pVM, pVCpu->idCpu, &szRegs[0], sizeof(szRegs), 1937 "rax=%016VR{rax} rbx=%016VR{rbx} rcx=%016VR{rcx} rdx=%016VR{rdx}\n" 1938 "rsi=%016VR{rsi} rdi=%016VR{rdi} r8 =%016VR{r8} r9 =%016VR{r9}\n" 1939 "r10=%016VR{r10} r11=%016VR{r11} r12=%016VR{r12} r13=%016VR{r13}\n" 1940 "r14=%016VR{r14} r15=%016VR{r15} %VRF{rflags}\n" 1941 "rip=%016VR{rip} rsp=%016VR{rsp} rbp=%016VR{rbp}\n" 1942 "cs={%04VR{cs} base=%016VR{cs_base} limit=%08VR{cs_lim} flags=%04VR{cs_attr}} cr0=%016VR{cr0}\n" 1943 "ds={%04VR{ds} base=%016VR{ds_base} limit=%08VR{ds_lim} flags=%04VR{ds_attr}} cr2=%016VR{cr2}\n" 1944 "es={%04VR{es} base=%016VR{es_base} limit=%08VR{es_lim} flags=%04VR{es_attr}} cr3=%016VR{cr3}\n" 1945 "fs={%04VR{fs} base=%016VR{fs_base} limit=%08VR{fs_lim} flags=%04VR{fs_attr}} cr4=%016VR{cr4}\n" 1946 "gs={%04VR{gs} base=%016VR{gs_base} limit=%08VR{gs_lim} flags=%04VR{gs_attr}} cr8=%016VR{cr8}\n" 1947 "ss={%04VR{ss} base=%016VR{ss_base} limit=%08VR{ss_lim} flags=%04VR{ss_attr}}\n" 1948 "dr0=%016VR{dr0} dr1=%016VR{dr1} dr2=%016VR{dr2} dr3=%016VR{dr3}\n" 1949 "dr6=%016VR{dr6} dr7=%016VR{dr7}\n" 1950 "gdtr=%016VR{gdtr_base}:%04VR{gdtr_lim} idtr=%016VR{idtr_base}:%04VR{idtr_lim} rflags=%08VR{rflags}\n" 1951 "ldtr={%04VR{ldtr} base=%016VR{ldtr_base} limit=%08VR{ldtr_lim} flags=%08VR{ldtr_attr}}\n" 1952 "tr ={%04VR{tr} base=%016VR{tr_base} limit=%08VR{tr_lim} flags=%08VR{tr_attr}}\n" 1953 " sysenter={cs=%04VR{sysenter_cs} eip=%08VR{sysenter_eip} esp=%08VR{sysenter_esp}}\n" 1954 " efer=%016VR{efer}\n" 1955 " pat=%016VR{pat}\n" 1956 " sf_mask=%016VR{sf_mask}\n" 1957 "krnl_gs_base=%016VR{krnl_gs_base}\n" 1958 " lstar=%016VR{lstar}\n" 1959 " star=%016VR{star} cstar=%016VR{cstar}\n" 1960 "fcw=%04VR{fcw} fsw=%04VR{fsw} ftw=%04VR{ftw} mxcsr=%04VR{mxcsr} mxcsr_mask=%04VR{mxcsr_mask}\n" 1961 ); 1962 1963 char szInstr[256]; 1964 DBGFR3DisasInstrEx(pVM, pVCpu->idCpu, 0, 0, 1965 DBGF_DISAS_FLAGS_CURRENT_GUEST | DBGF_DISAS_FLAGS_DEFAULT_MODE, 1966 szInstr, sizeof(szInstr), NULL); 1967 Log3(("%s%s\n", szRegs, szInstr)); 1968 } 1969 #endif /* LOG_ENABLED */ 1920 1970 1921 1971 /* … … 1937 1987 pIemCpu->cXcptRecursions--; 1938 1988 pIemCpu->uCurXcpt = uPrevXcpt; 1989 pIemCpu->fCurXcpt = fPrevXcpt; 1939 1990 Log(("iemRaiseXcptOrInt: returns %Rrc (vec=%#x); cs:rip=%04x:%RGv ss:rsp=%04x:%RGv\n", 1940 1991 VBOXSTRICTRC_VAL(rcStrict), u8Vector, pCtx->cs, pCtx->rip, pCtx->ss, pCtx->esp)); … … 1944 1995 1945 1996 /** \#DE - 00. */ 1946 static VBOXSTRICTRC iemRaiseDivideError(PIEMCPU pIemCpu) 1947 { 1948 AssertFailed(/** @todo implement this */); 1949 return VERR_NOT_IMPLEMENTED; 1997 DECL_NO_INLINE(static, VBOXSTRICTRC) iemRaiseDivideError(PIEMCPU pIemCpu) 1998 { 1999 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_DE, IEM_XCPT_FLAGS_T_CPU_XCPT, 0, 0); 1950 2000 } 1951 2001 1952 2002 1953 2003 /** \#DB - 01. */ 1954 static VBOXSTRICTRCiemRaiseDebugException(PIEMCPU pIemCpu)1955 { 1956 AssertFailed(/** @todo implement this */);1957 return VERR_NOT_IMPLEMENTED;2004 DECL_NO_INLINE(static, VBOXSTRICTRC) iemRaiseDebugException(PIEMCPU pIemCpu) 2005 { 2006 /** @todo set/clear RF. */ 2007 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_DB, IEM_XCPT_FLAGS_T_CPU_XCPT, 0, 0); 1958 2008 } 1959 2009 1960 2010 1961 2011 /** \#UD - 06. */ 1962 static VBOXSTRICTRC iemRaiseUndefinedOpcode(PIEMCPU pIemCpu) 1963 { 1964 AssertFailed(/** @todo implement X86_XCPT_UD */); 1965 return VERR_NOT_IMPLEMENTED; 2012 DECL_NO_INLINE(static, VBOXSTRICTRC) iemRaiseUndefinedOpcode(PIEMCPU pIemCpu) 2013 { 2014 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_UD, IEM_XCPT_FLAGS_T_CPU_XCPT, 0, 0); 1966 2015 } 1967 2016 1968 2017 1969 2018 /** \#NM - 07. */ 1970 static VBOXSTRICTRC iemRaiseDeviceNotAvailable(PIEMCPU pIemCpu) 1971 { 1972 AssertFailed(/** @todo implement this */); 1973 return VERR_NOT_IMPLEMENTED; 2019 DECL_NO_INLINE(static, VBOXSTRICTRC) iemRaiseDeviceNotAvailable(PIEMCPU pIemCpu) 2020 { 2021 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_NM, IEM_XCPT_FLAGS_T_CPU_XCPT, 0, 0); 1974 2022 } 1975 2023 1976 2024 1977 2025 /** \#TS(err) - 0a. */ 1978 static VBOXSTRICTRC iemRaiseTaskSwitchFaultWithErr(PIEMCPU pIemCpu, uint16_t uErr) 1979 { 1980 AssertFailed(/** @todo implement this */); 1981 return VERR_NOT_IMPLEMENTED; 2026 DECL_NO_INLINE(static, VBOXSTRICTRC) iemRaiseTaskSwitchFaultWithErr(PIEMCPU pIemCpu, uint16_t uErr) 2027 { 2028 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_TS, IEM_XCPT_FLAGS_T_CPU_XCPT | IEM_XCPT_FLAGS_ERR, uErr, 0); 1982 2029 } 1983 2030 1984 2031 1985 2032 /** \#TS(tr) - 0a. */ 1986 static VBOXSTRICTRC iemRaiseTaskSwitchFaultCurrentTSS(PIEMCPU pIemCpu) 1987 { 1988 return iemRaiseTaskSwitchFaultWithErr(pIemCpu, pIemCpu->CTX_SUFF(pCtx)->tr); 2033 DECL_NO_INLINE(static, VBOXSTRICTRC) iemRaiseTaskSwitchFaultCurrentTSS(PIEMCPU pIemCpu) 2034 { 2035 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_TS, IEM_XCPT_FLAGS_T_CPU_XCPT | IEM_XCPT_FLAGS_ERR, 2036 pIemCpu->CTX_SUFF(pCtx)->tr, 0); 1989 2037 } 1990 2038 1991 2039 1992 2040 /** \#NP(err) - 0b. */ 1993 static VBOXSTRICTRC iemRaiseSelectorNotPresentWithErr(PIEMCPU pIemCpu, uint16_t uErr) 1994 { 1995 AssertFailed(/** @todo implement this */); 1996 return VERR_NOT_IMPLEMENTED; 2041 DECL_NO_INLINE(static, VBOXSTRICTRC) iemRaiseSelectorNotPresentWithErr(PIEMCPU pIemCpu, uint16_t uErr) 2042 { 2043 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_NP, IEM_XCPT_FLAGS_T_CPU_XCPT | IEM_XCPT_FLAGS_ERR, uErr, 0); 1997 2044 } 1998 2045 1999 2046 2000 2047 /** \#NP(seg) - 0b. */ 2001 static VBOXSTRICTRCiemRaiseSelectorNotPresentBySegReg(PIEMCPU pIemCpu, uint32_t iSegReg)2002 { 2003 AssertFailed(/** @todo implement this */);2004 return VERR_NOT_IMPLEMENTED;2048 DECL_NO_INLINE(static, VBOXSTRICTRC) iemRaiseSelectorNotPresentBySegReg(PIEMCPU pIemCpu, uint32_t iSegReg) 2049 { 2050 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_NP, IEM_XCPT_FLAGS_T_CPU_XCPT | IEM_XCPT_FLAGS_ERR, 2051 iemSRegFetchU16(pIemCpu, iSegReg) & ~X86_SEL_RPL, 0); 2005 2052 } 2006 2053 2007 2054 2008 2055 /** \#NP(sel) - 0b. */ 2009 static VBOXSTRICTRCiemRaiseSelectorNotPresentBySelector(PIEMCPU pIemCpu, uint16_t uSel)2010 { 2011 AssertFailed(/** @todo implement this */);2012 return VERR_NOT_IMPLEMENTED;2056 DECL_NO_INLINE(static, VBOXSTRICTRC) iemRaiseSelectorNotPresentBySelector(PIEMCPU pIemCpu, uint16_t uSel) 2057 { 2058 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_NP, IEM_XCPT_FLAGS_T_CPU_XCPT | IEM_XCPT_FLAGS_ERR, 2059 uSel & ~X86_SEL_RPL, 0); 2013 2060 } 2014 2061 2015 2062 2016 2063 /** \#GP(n) - 0d. */ 2017 static VBOXSTRICTRC iemRaiseGeneralProtectionFault(PIEMCPU pIemCpu, uint16_t uErr) 2018 { 2019 AssertFailed(/** @todo implement this */); 2020 return VERR_NOT_IMPLEMENTED; 2064 DECL_NO_INLINE(static, VBOXSTRICTRC) iemRaiseGeneralProtectionFault(PIEMCPU pIemCpu, uint16_t uErr) 2065 { 2066 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_GP, IEM_XCPT_FLAGS_T_CPU_XCPT | IEM_XCPT_FLAGS_ERR, uErr, 0); 2021 2067 } 2022 2068 2023 2069 2024 2070 /** \#GP(0) - 0d. */ 2025 static VBOXSTRICTRCiemRaiseGeneralProtectionFault0(PIEMCPU pIemCpu)2026 { 2027 return iemRaise GeneralProtectionFault(pIemCpu, 0);2071 DECL_NO_INLINE(static, VBOXSTRICTRC) iemRaiseGeneralProtectionFault0(PIEMCPU pIemCpu) 2072 { 2073 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_GP, IEM_XCPT_FLAGS_T_CPU_XCPT | IEM_XCPT_FLAGS_ERR, 0, 0); 2028 2074 } 2029 2075 2030 2076 2031 2077 /** \#GP(sel) - 0d. */ 2032 static VBOXSTRICTRC iemRaiseGeneralProtectionFaultBySelector(PIEMCPU pIemCpu, RTSEL Sel) 2033 { 2034 return iemRaiseGeneralProtectionFault(pIemCpu, Sel & (X86_SEL_MASK | X86_SEL_LDT)); 2078 DECL_NO_INLINE(static, VBOXSTRICTRC) iemRaiseGeneralProtectionFaultBySelector(PIEMCPU pIemCpu, RTSEL Sel) 2079 { 2080 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_GP, IEM_XCPT_FLAGS_T_CPU_XCPT | IEM_XCPT_FLAGS_ERR, 2081 Sel & ~X86_SEL_RPL, 0); 2035 2082 } 2036 2083 2037 2084 2038 2085 /** \#GP(0) - 0d. */ 2039 static VBOXSTRICTRC iemRaiseNotCanonical(PIEMCPU pIemCpu) 2040 { 2041 AssertFailed(/** @todo implement this */); 2042 return VERR_NOT_IMPLEMENTED; 2086 DECL_NO_INLINE(static, VBOXSTRICTRC) iemRaiseNotCanonical(PIEMCPU pIemCpu) 2087 { 2088 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_GP, IEM_XCPT_FLAGS_T_CPU_XCPT | IEM_XCPT_FLAGS_ERR, 0, 0); 2043 2089 } 2044 2090 2045 2091 2046 2092 /** \#GP(sel) - 0d. */ 2047 static VBOXSTRICTRCiemRaiseSelectorBounds(PIEMCPU pIemCpu, uint32_t iSegReg, uint32_t fAccess)2048 { 2049 AssertFailed(/** @todo implement this */);2050 return VERR_NOT_IMPLEMENTED;2093 DECL_NO_INLINE(static, VBOXSTRICTRC) iemRaiseSelectorBounds(PIEMCPU pIemCpu, uint32_t iSegReg, uint32_t fAccess) 2094 { 2095 NOREF(iSegReg); NOREF(fAccess); 2096 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_GP, IEM_XCPT_FLAGS_T_CPU_XCPT | IEM_XCPT_FLAGS_ERR, 0, 0); 2051 2097 } 2052 2098 2053 2099 2054 2100 /** \#GP(sel) - 0d. */ 2055 static VBOXSTRICTRCiemRaiseSelectorBoundsBySelector(PIEMCPU pIemCpu, RTSEL Sel)2056 { 2057 AssertFailed(/** @todo implement this */);2058 return VERR_NOT_IMPLEMENTED;2101 DECL_NO_INLINE(static, VBOXSTRICTRC) iemRaiseSelectorBoundsBySelector(PIEMCPU pIemCpu, RTSEL Sel) 2102 { 2103 NOREF(Sel); 2104 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_GP, IEM_XCPT_FLAGS_T_CPU_XCPT | IEM_XCPT_FLAGS_ERR, 0, 0); 2059 2105 } 2060 2106 2061 2107 2062 2108 /** \#GP(sel) - 0d. */ 2063 static VBOXSTRICTRCiemRaiseSelectorInvalidAccess(PIEMCPU pIemCpu, uint32_t iSegReg, uint32_t fAccess)2064 { 2065 AssertFailed(/** @todo implement this */);2066 return VERR_NOT_IMPLEMENTED;2109 DECL_NO_INLINE(static, VBOXSTRICTRC) iemRaiseSelectorInvalidAccess(PIEMCPU pIemCpu, uint32_t iSegReg, uint32_t fAccess) 2110 { 2111 NOREF(iSegReg); NOREF(fAccess); 2112 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_GP, IEM_XCPT_FLAGS_T_CPU_XCPT | IEM_XCPT_FLAGS_ERR, 0, 0); 2067 2113 } 2068 2114 2069 2115 2070 2116 /** \#PF(n) - 0e. */ 2071 static VBOXSTRICTRC iemRaisePageFault(PIEMCPU pIemCpu, RTGCPTR GCPtrWhere, uint32_t fAccess, int rc) 2072 { 2073 /** @todo implement this */ 2074 AssertMsgFailed(("GCPtrWhere=%RGp fAccess=%#x rc=%Rrc\n", GCPtrWhere, fAccess, rc)); 2075 return VERR_NOT_IMPLEMENTED; 2117 DECL_NO_INLINE(static, VBOXSTRICTRC) iemRaisePageFault(PIEMCPU pIemCpu, RTGCPTR GCPtrWhere, uint32_t fAccess, int rc) 2118 { 2119 uint16_t uErr; 2120 switch (rc) 2121 { 2122 case VERR_PAGE_NOT_PRESENT: 2123 case VERR_PAGE_TABLE_NOT_PRESENT: 2124 case VERR_PAGE_DIRECTORY_PTR_NOT_PRESENT: 2125 case VERR_PAGE_MAP_LEVEL4_NOT_PRESENT: 2126 uErr = 0; 2127 break; 2128 2129 default: 2130 AssertMsgFailed(("%Rrc\n", rc)); 2131 case VERR_ACCESS_DENIED: 2132 uErr = X86_TRAP_PF_P; 2133 break; 2134 2135 /** @todo reserved */ 2136 } 2137 2138 if (pIemCpu->uCpl == 3) 2139 uErr |= X86_TRAP_PF_US; 2140 2141 if ( (fAccess & IEM_ACCESS_WHAT_MASK) == IEM_ACCESS_WHAT_CODE 2142 && ( (pIemCpu->CTX_SUFF(pCtx)->cr4 & X86_CR4_PAE) 2143 && (pIemCpu->CTX_SUFF(pCtx)->msrEFER & MSR_K6_EFER_NXE) ) ) 2144 uErr |= X86_TRAP_PF_ID; 2145 2146 if (fAccess & IEM_ACCESS_TYPE_WRITE) 2147 uErr |= X86_TRAP_PF_RW; 2148 2149 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_PF, IEM_XCPT_FLAGS_T_CPU_XCPT | IEM_XCPT_FLAGS_ERR | IEM_XCPT_FLAGS_CR2, 2150 uErr, GCPtrWhere); 2076 2151 } 2077 2152 2078 2153 2079 2154 /** \#MF(n) - 10. */ 2080 static VBOXSTRICTRC iemRaiseMathFault(PIEMCPU pIemCpu) 2081 { 2082 AssertFailed(/** @todo implement this */); 2083 return VERR_NOT_IMPLEMENTED; 2084 } 2085 2155 DECL_NO_INLINE(static, VBOXSTRICTRC) iemRaiseMathFault(PIEMCPU pIemCpu) 2156 { 2157 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_MF, IEM_XCPT_FLAGS_T_CPU_XCPT, 0, 0); 2158 } 2086 2159 2087 2160 … … 2097 2170 IEM_CIMPL_DEF_0(iemCImplRaiseInvalidLockPrefix) 2098 2171 { 2099 AssertFailed(); 2100 return VERR_NOT_IMPLEMENTED; 2172 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_UD, IEM_XCPT_FLAGS_T_CPU_XCPT, 0, 0); 2101 2173 } 2102 2174 … … 2113 2185 IEM_CIMPL_DEF_0(iemCImplRaiseInvalidOpcode) 2114 2186 { 2115 AssertFailed(); 2116 return VERR_NOT_IMPLEMENTED; 2187 return iemRaiseXcptOrInt(pIemCpu, 0, X86_XCPT_UD, IEM_XCPT_FLAGS_T_CPU_XCPT, 0, 0); 2117 2188 } 2118 2189 … … 5297 5368 PVMCPU pVCpu = IEMCPU_TO_VMCPU(pIemCpu); 5298 5369 PCPUMCTX pOrgCtx = pIemCpu->CTX_SUFF(pCtx); 5299 pIemCpu->fNoRem = !LogIsEnabled(); /* logging triggers the no-rem/rem verification stuff */ 5300 5370 5371 /* 5372 * Enable verification and/or logging. 5373 */ 5374 pIemCpu->fNoRem = !LogIs6Enabled(); /* logging triggers the no-rem/rem verification stuff */ 5375 if ( pIemCpu->fNoRem 5376 #if 0 /* auto enable on first paged protected mode interrupt */ 5377 && pOrgCtx->eflags.Bits.u1IF 5378 && (pOrgCtx->cr0 & (X86_CR0_PE | X86_CR0_PG)) == (X86_CR0_PE | X86_CR0_PG) 5379 && TRPMHasTrap(pVCpu) 5380 && EMGetInhibitInterruptsPC(pVCpu) != pOrgCtx->rip) 5381 #endif 5301 5382 #if 0 5302 // Auto enable; DSL. 5303 if ( pIemCpu->fNoRem 5383 && pOrgCtx->cs == 0x10 5384 && ( pOrgCtx->rip == 0x90119e3e 5385 || pOrgCtx->rip == 0x901d9810 5386 ) 5387 #endif 5388 #if 0 /* Auto enable; DSL. */ 5304 5389 && pOrgCtx->cs == 0x10 5305 5390 && ( pOrgCtx->rip == 0x00100fc7 … … 5307 5392 || pOrgCtx->rip == 0x00100ffe 5308 5393 ) 5394 #endif 5395 #if 0 5396 && 0 5397 #endif 5309 5398 ) 5310 5399 { 5400 RTLogGroupSettings(NULL, "iem.eo.l6.l2"); 5311 5401 RTLogFlags(NULL, "enabled"); 5312 5402 pIemCpu->fNoRem = false; 5313 5403 } 5314 #endif5315 #if 0 /* auto enable on first paged protected mode interrupt */5316 if ( pIemCpu->fNoRem5317 && pOrgCtx->eflags.Bits.u1IF5318 && (pOrgCtx->cr0 & (X86_CR0_PE | X86_CR0_PG)) == (X86_CR0_PE | X86_CR0_PG)5319 && TRPMHasTrap(pVCpu)5320 && EMGetInhibitInterruptsPC(pVCpu) != pOrgCtx->rip)5321 {5322 RTLogFlags(NULL, "enabled");5323 pIemCpu->fNoRem = false;5324 }5325 #endif5326 5404 5327 5405 /* … … 6014 6092 pIemCpu->CTX_SUFF(pCtx) = pOrgCtx; 6015 6093 6094 #if 0 6016 6095 /* 6017 6096 * HACK ALERT! You don't normally want to verify a whole boot sequence. … … 6019 6098 if (pIemCpu->cInstructions == 1) 6020 6099 RTLogFlags(NULL, "disabled"); 6100 #endif 6021 6101 } 6022 6102 -
trunk/src/VBox/VMM/include/IEMInternal.h
r37085 r37090 147 147 bool fByPassHandlers; 148 148 /** Explicit alignment padding. */ 149 bool afAlignment0[4]; 150 149 bool afAlignment0[2]; 150 151 /** The flags of the current exception / interrupt. */ 152 uint32_t fCurXcpt; 153 /** The current exception / interrupt. */ 154 uint8_t uCurXcpt; 151 155 /** Exception / interrupt recursion depth. */ 152 156 int8_t cXcptRecursions; 153 /** The current exception / interrupt. */154 uint8_t uCurXcpt;157 /** Explicit alignment padding. */ 158 bool afAlignment1[1]; 155 159 /** The CPL. */ 156 160 uint8_t uCpl; … … 175 179 * and RDTSCP are timing sensitive. */ 176 180 bool fIgnoreRaxRdx; 177 bool afAlignment 1[2];181 bool afAlignment2[2]; 178 182 /** Mask of undefined eflags. 179 183 * The verifier will any difference in these flags. */
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