Changeset 37230 in vbox for trunk/src/VBox/HostDrivers
- Timestamp:
- May 27, 2011 11:20:19 AM (14 years ago)
- svn:sync-xref-src-repo-rev:
- 71952
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/HostDrivers/Support/SUPDrv.c
r37228 r37230 4993 4993 4994 4994 /** 4995 * Helper for finding the CPU index from the CPU Id. 4996 * 4997 * @param pGip The GIP. 4998 * @param idCpu The CPU ID. 4995 * Finds our (@a idCpu) entry, or allocates a new one if not found. 4999 4996 * 5000 4997 * @returns Index of the CPU in the cache set. 5001 */ 5002 DECLINLINE(uint32_t) supdrvGipCpuIndexFromCpuId(PSUPGLOBALINFOPAGE pGip, RTCPUID idCpu) 5003 { 5004 uint32_t i = 0; 5005 5006 /* 5007 * Find our entry, or allocate one if not found. 4998 * @param pGip The GIP. 4999 * @param idCpu The CPU ID. 5000 */ 5001 static uint32_t supdrvGipCpuIndexFromCpuId(PSUPGLOBALINFOPAGE pGip, RTCPUID idCpu) 5002 { 5003 uint32_t i, cTries; 5004 5005 /* 5008 5006 * ASSUMES that CPU IDs are constant. 5009 5007 */ 5010 5008 for (i = 0; i < pGip->cCpus; i++) 5011 5009 if (pGip->aCPUs[i].idCpu == idCpu) 5012 break; 5013 5014 if (i >= pGip->cCpus) 5010 return i; 5011 5012 cTries = 0; 5013 do 5014 { 5015 5015 for (i = 0; i < pGip->cCpus; i++) 5016 5016 { … … 5018 5018 ASMAtomicCmpXchgSize(&pGip->aCPUs[i].idCpu, idCpu, NIL_RTCPUID, fRc); 5019 5019 if (fRc) 5020 break;5021 } 5022 5023 AssertRelease (i < pGip->cCpus);5024 return i ;5020 return i; 5021 } 5022 } while (cTries++ < 32); 5023 AssertReleaseFailed(); 5024 return i - 1; 5025 5025 } 5026 5026 … … 5056 5056 } 5057 5057 5058 /* 5059 * Update the entry. 5060 */ 5058 5061 i = supdrvGipCpuIndexFromCpuId(pGip, idCpu); 5059 5060 /*5061 * Update the entry.5062 */5063 5062 idApic = ASMGetApicId(); 5064 5063 ASMAtomicUoWriteU16(&pGip->aCPUs[i].idApic, idApic); … … 5072 5071 ASMAtomicWriteU16(&pGip->aiCpuFromCpuSetIdx[iCpuSet], i); 5073 5072 5073 /* commit it */ 5074 5074 ASMAtomicWriteSize(&pGip->aCPUs[i].enmState, SUPGIPCPUSTATE_ONLINE); 5075 5075 } … … 5098 5098 Assert(RTCpuSetIsMemberByIndex(&pGip->PossibleCpuSet, iCpuSet)); 5099 5099 RTCpuSetDelByIndex(&pGip->OnlineCpuSet, iCpuSet); 5100 5101 /* commit it */ 5100 5102 ASMAtomicWriteSize(&pGip->aCPUs[i].enmState, SUPGIPCPUSTATE_OFFLINE); 5101 5103 } … … 5640 5642 RTCPUID idCpu, uint8_t idApic, uint64_t iTick) 5641 5643 { 5642 /* 5643 * Avoid a potential race when a CPU online notification doesn't fire on the onlined CPU 5644 * but the tick creeps in before the event notification is run. 5645 */ 5646 unsigned iCpu = 0; 5647 if (iTick == 1) 5648 { 5649 uint32_t i = supdrvGipCpuIndexFromCpuId(pGip, idCpu); 5650 if (pGip->aCPUs[i].enmState == SUPGIPCPUSTATE_OFFLINE) 5644 uint32_t iCpu; 5645 5646 /* 5647 * Avoid a potential race when a CPU online notification doesn't fire on 5648 * the onlined CPU but the tick creeps in before the event notification is 5649 * run. 5650 */ 5651 if (RT_UNLIKELY(iTick == 1)) 5652 { 5653 iCpu = supdrvGipCpuIndexFromCpuId(pGip, idCpu); 5654 if (pGip->aCPUs[iCpu].enmState == SUPGIPCPUSTATE_OFFLINE) 5651 5655 supdrvGipMpEventOnline(pGip, idCpu); 5652 5656 } 5653 5657 5654 5658 iCpu = pGip->aiCpuFromApicId[idApic]; 5655 5656 5659 if (RT_LIKELY(iCpu < pGip->cCpus)) 5657 5660 { … … 5659 5662 if (pGipCpu->idCpu == idCpu) 5660 5663 { 5661 5662 5664 /* 5663 5665 * Start update transaction. … … 5683 5685 } 5684 5686 } 5687
Note:
See TracChangeset
for help on using the changeset viewer.