Changeset 37354 in vbox for trunk/src/VBox/VMM/VMMAll

Timestamp:

Jun 7, 2011 3:05:32 PM (14 years ago)

Author:

vboxsync

Message:

PGM: Fixed locking issues in PGMR3PhysMMIORegister and PGMR3PhysMMIODeregister. Also addressed a harmless on in PGMR3PhysRomRegister (only used at init time, so no races). Fortified the code with assertions more lock assertion, replacing the incorrect PGMIsLocked() checks (we only care if the current thread is the lock owner). Cleaned up some ReturnStmt macros and adding more of them.

Location:

trunk/src/VBox/VMM/VMMAll

Files:

• PGMAll.cpp (modified) (26 diffs)
• PGMAllBth.h (modified) (6 diffs)
• PGMAllHandler.cpp (modified) (7 diffs)
• PGMAllPhys.cpp (modified) (44 diffs)
• PGMAllPool.cpp (modified) (24 diffs)
• PGMAllShw.h (modified) (2 diffs)

trunk/src/VBox/VMM/VMMAll/PGMAll.cpp

@@ -457 +457 @@
     if (fLockTaken)
     {
-        Assert(PGMIsLockOwner(pVM));
+        PGM_LOCK_ASSERT_OWNER(pVM);
         pgmUnlock(pVM);
     }
@@ -933 +933 @@
     int            rc;
 
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
 
     /* Allocate page directory if not present. */
@@ -1020 +1020 @@
     PVM             pVM   = pVCpu->CTX_SUFF(pVM);
 
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
 
     AssertReturn(pPdpt, VERR_PAGE_DIRECTORY_PTR_NOT_PRESENT);    /* can't happen */
@@ -1066 +1066 @@
     int            rc;
 
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
 
     /* Allocate page directory pointer table if not present. */
@@ -1160 +1160 @@
     PCX86PML4E      pPml4e = pgmShwGetLongModePML4EPtr(pVCpu, iPml4);
 
-    Assert(PGMIsLockOwner(PGMCPU2VM(pPGM)));
+    PGM_LOCK_ASSERT_OWNER(PGMCPU2VM(pPGM));
 
     AssertReturn(pPml4e, VERR_INTERNAL_ERROR);
@@ -1211 +1211 @@
 
     Assert(pVM->pgm.s.fNestedPaging);
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
 
     pPml4 = (PEPTPML4)PGMPOOL_PAGE_2_PTR_V2(pVM, pVCpu, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));
@@ -1289 +1289 @@
 int pgmShwSyncNestedPageLocked(PVMCPU pVCpu, RTGCPHYS GCPhysFault, uint32_t cPages, PGMMODE enmShwPagingMode)
 {
-    Assert(PGMIsLockOwner(pVCpu->CTX_SUFF(pVM)));
+    PGM_LOCK_ASSERT_OWNER(pVCpu->CTX_SUFF(pVM));
 
     int rc;
@@ -1341 +1341 @@
  *
  * @returns VBox status.
- * @param   pVCpu       VMCPU handle.
+ * @param   pVCpu       The current CPU.
  * @param   GCPtr       Guest Context virtual address of the page.
  * @param   pfFlags     Where to store the flags. These are X86_PTE_*, even for big pages.
@@ -1349 +1349 @@
 VMMDECL(int) PGMGstGetPage(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys)
 {
+    VMCPU_ASSERT_EMT(pVCpu);
     return PGM_GST_PFN(GetPage, pVCpu)(pVCpu, GCPtr, pfFlags, pGCPhys);
 }
@@ -1363 +1364 @@
 VMMDECL(bool) PGMGstIsPagePresent(PVMCPU pVCpu, RTGCPTR GCPtr)
 {
+    VMCPU_ASSERT_EMT(pVCpu);
     int rc = PGMGstGetPage(pVCpu, GCPtr, NULL, NULL);
     return RT_SUCCESS(rc);
@@ -1379 +1381 @@
 VMMDECL(int)  PGMGstSetPage(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags)
 {
+    VMCPU_ASSERT_EMT(pVCpu);
     return PGMGstModifyPage(pVCpu, GCPtr, cb, fFlags, 0);
 }
@@ -1399 +1402 @@
 {
     STAM_PROFILE_START(&pVCpu->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,GstModifyPage), a);
+    VMCPU_ASSERT_EMT(pVCpu);
 
     /*
@@ -1774 +1778 @@
 VMMDECL(int) PGMFlushTLB(PVMCPU pVCpu, uint64_t cr3, bool fGlobal)
 {
+    STAM_PROFILE_START(&pVCpu->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,FlushTLB), a);
     PVM pVM = pVCpu->CTX_SUFF(pVM);
 
-    STAM_PROFILE_START(&pVCpu->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,FlushTLB), a);
+    VMCPU_ASSERT_EMT(pVCpu);
 
     /*
@@ -1883 +1888 @@
     PVM pVM = pVCpu->CTX_SUFF(pVM);
 
+    VMCPU_ASSERT_EMT(pVCpu);
     LogFlow(("PGMUpdateCR3: cr3=%RX64 OldCr3=%RX64\n", cr3, pVCpu->pgm.s.GCPhysCR3));
 
@@ -1897 +1903 @@
     switch (pVCpu->pgm.s.enmGuestMode)
     {
-    case PGMMODE_PAE:
-    case PGMMODE_PAE_NX:
-        GCPhysCR3 = (RTGCPHYS)(cr3 & X86_CR3_PAE_PAGE_MASK);
-        break;
-    case PGMMODE_AMD64:
-    case PGMMODE_AMD64_NX:
-        GCPhysCR3 = (RTGCPHYS)(cr3 & X86_CR3_AMD64_PAGE_MASK);
-        break;
-    default:
-        GCPhysCR3 = (RTGCPHYS)(cr3 & X86_CR3_PAGE_MASK);
-        break;
-    }
-    if (pVCpu->pgm.s.GCPhysCR3 != GCPhysCR3)
-    {
-        pVCpu->pgm.s.GCPhysCR3 = GCPhysCR3;
-        rc = PGM_BTH_PFN(MapCR3, pVCpu)(pVCpu, GCPhysCR3);
-        AssertRCSuccess(rc); /* Assumes VINF_PGM_SYNC_CR3 doesn't apply to nested paging. */ /** @todo this isn't true for the mac, but we need hw to test/fix this. */
-    }
-    return rc;
-}
-
-
-/**
- * Synchronize the paging structures.
- *
- * This function is called in response to the VM_FF_PGM_SYNC_CR3 and
- * VM_FF_PGM_SYNC_CR3_NONGLOBAL. Those two force action flags are set
- * in several places, most importantly whenever the CR3 is loaded.
- *
- * @returns VBox status code.
- * @param   pVCpu       VMCPU handle.
- * @param   cr0         Guest context CR0 register
- * @param   cr3         Guest context CR3 register
- * @param   cr4         Guest context CR4 register
- * @param   fGlobal     Including global page directories or not
- */
-VMMDECL(int) PGMSyncCR3(PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal)
-{
-    PVM pVM = pVCpu->CTX_SUFF(pVM);
-    int rc;
-
-    /*
-     * The pool may have pending stuff and even require a return to ring-3 to
-     * clear the whole thing.
-     */
-    rc = pgmPoolSyncCR3(pVCpu);
-    if (rc != VINF_SUCCESS)
-        return rc;
-
-    /*
-     * We might be called when we shouldn't.
-     *
-     * The mode switching will ensure that the PD is resynced
-     * after every mode switch. So, if we find ourselves here
-     * when in protected or real mode we can safely disable the
-     * FF and return immediately.
-     */
-    if (pVCpu->pgm.s.enmGuestMode <= PGMMODE_PROTECTED)
-    {
-        Assert((cr0 & (X86_CR0_PG | X86_CR0_PE)) != (X86_CR0_PG | X86_CR0_PE));
-        Assert(!(pVCpu->pgm.s.fSyncFlags & PGM_SYNC_CLEAR_PGM_POOL));
-        VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
-        VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL);
-        return VINF_SUCCESS;
-    }
-
-    /* If global pages are not supported, then all flushes are global. */
-    if (!(cr4 & X86_CR4_PGE))
-        fGlobal = true;
-    LogFlow(("PGMSyncCR3: cr0=%RX64 cr3=%RX64 cr4=%RX64 fGlobal=%d[%d,%d]\n", cr0, cr3, cr4, fGlobal,
-             VMCPU_FF_ISSET(pVCpu, VMCPU_FF_PGM_SYNC_CR3), VMCPU_FF_ISSET(pVCpu, VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL)));
-
-    /*
-     * Check if we need to finish an aborted MapCR3 call (see PGMFlushTLB).
-     * This should be done before SyncCR3.
-     */
-    if (pVCpu->pgm.s.fSyncFlags & PGM_SYNC_MAP_CR3)
-    {
-        pVCpu->pgm.s.fSyncFlags &= ~PGM_SYNC_MAP_CR3;
-
-        RTGCPHYS GCPhysCR3Old = pVCpu->pgm.s.GCPhysCR3;
-        RTGCPHYS GCPhysCR3;
-        switch (pVCpu->pgm.s.enmGuestMode)
-        {
         case PGMMODE_PAE:
         case PGMMODE_PAE_NX:
@@ -1992 +1914 @@
             GCPhysCR3 = (RTGCPHYS)(cr3 & X86_CR3_PAGE_MASK);
             break;
+    }
+    if (pVCpu->pgm.s.GCPhysCR3 != GCPhysCR3)
+    {
+        pVCpu->pgm.s.GCPhysCR3 = GCPhysCR3;
+        rc = PGM_BTH_PFN(MapCR3, pVCpu)(pVCpu, GCPhysCR3);
+        AssertRCSuccess(rc); /* Assumes VINF_PGM_SYNC_CR3 doesn't apply to nested paging. */ /** @todo this isn't true for the mac, but we need hw to test/fix this. */
+    }
+    return rc;
+}
+
+
+/**
+ * Synchronize the paging structures.
+ *
+ * This function is called in response to the VM_FF_PGM_SYNC_CR3 and
+ * VM_FF_PGM_SYNC_CR3_NONGLOBAL. Those two force action flags are set
+ * in several places, most importantly whenever the CR3 is loaded.
+ *
+ * @returns VBox status code.
+ * @param   pVCpu       VMCPU handle.
+ * @param   cr0         Guest context CR0 register
+ * @param   cr3         Guest context CR3 register
+ * @param   cr4         Guest context CR4 register
+ * @param   fGlobal     Including global page directories or not
+ */
+VMMDECL(int) PGMSyncCR3(PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal)
+{
+    PVM pVM = pVCpu->CTX_SUFF(pVM);
+    int rc;
+
+    VMCPU_ASSERT_EMT(pVCpu);
+
+    /*
+     * The pool may have pending stuff and even require a return to ring-3 to
+     * clear the whole thing.
+     */
+    rc = pgmPoolSyncCR3(pVCpu);
+    if (rc != VINF_SUCCESS)
+        return rc;
+
+    /*
+     * We might be called when we shouldn't.
+     *
+     * The mode switching will ensure that the PD is resynced
+     * after every mode switch. So, if we find ourselves here
+     * when in protected or real mode we can safely disable the
+     * FF and return immediately.
+     */
+    if (pVCpu->pgm.s.enmGuestMode <= PGMMODE_PROTECTED)
+    {
+        Assert((cr0 & (X86_CR0_PG | X86_CR0_PE)) != (X86_CR0_PG | X86_CR0_PE));
+        Assert(!(pVCpu->pgm.s.fSyncFlags & PGM_SYNC_CLEAR_PGM_POOL));
+        VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_PGM_SYNC_CR3);
+        VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL);
+        return VINF_SUCCESS;
+    }
+
+    /* If global pages are not supported, then all flushes are global. */
+    if (!(cr4 & X86_CR4_PGE))
+        fGlobal = true;
+    LogFlow(("PGMSyncCR3: cr0=%RX64 cr3=%RX64 cr4=%RX64 fGlobal=%d[%d,%d]\n", cr0, cr3, cr4, fGlobal,
+             VMCPU_FF_ISSET(pVCpu, VMCPU_FF_PGM_SYNC_CR3), VMCPU_FF_ISSET(pVCpu, VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL)));
+
+    /*
+     * Check if we need to finish an aborted MapCR3 call (see PGMFlushTLB).
+     * This should be done before SyncCR3.
+     */
+    if (pVCpu->pgm.s.fSyncFlags & PGM_SYNC_MAP_CR3)
+    {
+        pVCpu->pgm.s.fSyncFlags &= ~PGM_SYNC_MAP_CR3;
+
+        RTGCPHYS GCPhysCR3Old = pVCpu->pgm.s.GCPhysCR3;
+        RTGCPHYS GCPhysCR3;
+        switch (pVCpu->pgm.s.enmGuestMode)
+        {
+            case PGMMODE_PAE:
+            case PGMMODE_PAE_NX:
+                GCPhysCR3 = (RTGCPHYS)(cr3 & X86_CR3_PAE_PAGE_MASK);
+                break;
+            case PGMMODE_AMD64:
+            case PGMMODE_AMD64_NX:
+                GCPhysCR3 = (RTGCPHYS)(cr3 & X86_CR3_AMD64_PAGE_MASK);
+                break;
+            default:
+                GCPhysCR3 = (RTGCPHYS)(cr3 & X86_CR3_PAGE_MASK);
+                break;
         }
 
@@ -1999 +2007 @@
             rc = PGM_BTH_PFN(MapCR3, pVCpu)(pVCpu, GCPhysCR3);
         }
+
         /* Make sure we check for pending pgm pool syncs as we clear VMCPU_FF_PGM_SYNC_CR3 later on! */
         if (    rc == VINF_PGM_SYNC_CR3
@@ -2077 +2086 @@
     PGMMODE enmGuestMode;
 
+    VMCPU_ASSERT_EMT(pVCpu);
+
     /*
      * Calc the new guest mode.
@@ -2149 +2160 @@
     return pVCpu->pgm.s.enmShadowMode;
 }
+
 
 /**
@@ -2220 +2232 @@
 VMM_INT_DECL(void) PGMNotifyNxeChanged(PVMCPU pVCpu, bool fNxe)
 {
+    VMCPU_ASSERT_EMT(pVCpu);
     Log(("PGMNotifyNxeChanged: fNxe=%RTbool\n", fNxe));
+
     pVCpu->pgm.s.fNoExecuteEnabled = fNxe;
     if (fNxe)
@@ -2278 +2292 @@
 }
 
-/**
- * Check if the PGM lock is currently taken.
- *
- * @returns bool locked/not locked
- * @param   pVM         The VM to operate on.
- */
-VMMDECL(bool) PGMIsLocked(PVM pVM)
-{
-    return PDMCritSectIsOwned(&pVM->pgm.s.CritSect);
-}
-
 
 /**
@@ -2305 +2308 @@
  * Enable or disable large page usage
  *
+ * @returns VBox status code.
  * @param   pVM             The VM to operate on.
  * @param   fUseLargePages  Use/not use large pages
  */
-VMMDECL(void) PGMSetLargePageUsage(PVM pVM, bool fUseLargePages)
-{
+VMMDECL(int) PGMSetLargePageUsage(PVM pVM, bool fUseLargePages)
+{
+    VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
+
     pVM->fUseLargePages = fUseLargePages;
-}
+    return VINF_SUCCESS;
+}
+
 
 /**
@@ -2406 +2414 @@
         /* The single char state stuff. */
         static const char s_achPageStates[4]    = { 'Z', 'A', 'W', 'S' };
-        szTmp[cch++] = s_achPageStates[PGM_PAGE_GET_STATE(pPage)];
+        szTmp[cch++] = s_achPageStates[PGM_PAGE_GET_STATE_NA(pPage)];
 
 #define IS_PART_INCLUDED(lvl) ( !(fFlags & RTSTR_F_PRECISION) || cchPrecision == (lvl) || cchPrecision >= (lvl)+10 )
@@ -2421 +2429 @@
             szTmp[cch++] = ':';
             static const char s_achPageTypes[8][4]  = { "INV", "RAM", "MI2", "M2A", "SHA", "ROM", "MIO", "BAD" };
-            szTmp[cch++] = s_achPageTypes[PGM_PAGE_GET_TYPE(pPage)][0];
-            szTmp[cch++] = s_achPageTypes[PGM_PAGE_GET_TYPE(pPage)][1];
-            szTmp[cch++] = s_achPageTypes[PGM_PAGE_GET_TYPE(pPage)][2];
+            szTmp[cch++] = s_achPageTypes[PGM_PAGE_GET_TYPE_NA(pPage)][0];
+            szTmp[cch++] = s_achPageTypes[PGM_PAGE_GET_TYPE_NA(pPage)][1];
+            szTmp[cch++] = s_achPageTypes[PGM_PAGE_GET_TYPE_NA(pPage)][2];
         }
 
@@ -2430 +2438 @@
         {
             szTmp[cch++] = ':';
-            cch += RTStrFormatNumber(&szTmp[cch], PGM_PAGE_GET_HCPHYS(pPage), 16, 12, 0, RTSTR_F_ZEROPAD | RTSTR_F_64BIT);
+            cch += RTStrFormatNumber(&szTmp[cch], PGM_PAGE_GET_HCPHYS_NA(pPage), 16, 12, 0, RTSTR_F_ZEROPAD | RTSTR_F_64BIT);
         }
 
@@ -2443 +2451 @@
             szTmp[cch++] = ':';
             static const char s_achRefs[4] = { '-', 'U', '!', 'L' };
-            szTmp[cch++] = s_achRefs[PGM_PAGE_GET_TD_CREFS(pPage)];
-            cch += RTStrFormatNumber(&szTmp[cch], PGM_PAGE_GET_TD_IDX(pPage), 16, 4, 0, RTSTR_F_ZEROPAD | RTSTR_F_16BIT);
+            szTmp[cch++] = s_achRefs[PGM_PAGE_GET_TD_CREFS_NA(pPage)];
+            cch += RTStrFormatNumber(&szTmp[cch], PGM_PAGE_GET_TD_IDX_NA(pPage), 16, 4, 0, RTSTR_F_ZEROPAD | RTSTR_F_16BIT);
         }
 #undef IS_PART_INCLUDED

trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

@@ -1120 +1120 @@
     PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
 
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
 
     LogFlow(("InvalidatePage %RGv\n", GCPtrPage));
@@ -1481 +1481 @@
         u16 = PGMPOOL_TD_MAKE(1, pShwPage->idx);
         /* Save the page table index. */
-        PGM_PAGE_SET_PTE_INDEX(pPage, iPTDst);
+        PGM_PAGE_SET_PTE_INDEX(pVM, pPage, iPTDst);
     }
     else
@@ -1488 +1488 @@
     /* write back */
     Log2(("SyncPageWorkerTrackAddRef: u16=%#x->%#x  iPTDst=%#x\n", u16, PGM_PAGE_GET_TRACKING(pPage), iPTDst));
-    PGM_PAGE_SET_TRACKING(pPage, u16);
+    PGM_PAGE_SET_TRACKING(pVM, pPage, u16);
 
     /* update statistics. */
@@ -1806 +1806 @@
     LogFlow(("SyncPage: GCPtrPage=%RGv cPages=%u uErr=%#x\n", GCPtrPage, cPages, uErr));
 
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
 
 #if    (   PGM_GST_TYPE == PGM_TYPE_32BIT  \
@@ -2354 +2354 @@
     PPGMPOOL    pPool = pVM->pgm.s.CTX_SUFF(pPool);
 
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
 
     /*
@@ -2545 +2545 @@
     LogFlow(("SyncPT: GCPtrPage=%RGv\n", GCPtrPage));
 
-    Assert(PGMIsLocked(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
 
 #if (   PGM_GST_TYPE == PGM_TYPE_32BIT \

trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp

@@ -435 +435 @@
      * Make it an MMIO/Zero page.
      */
-    PGM_PAGE_SET_HCPHYS(pPage, pVM->pgm.s.HCPhysZeroPg);
-    PGM_PAGE_SET_TYPE(pPage, PGMPAGETYPE_MMIO);
-    PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ZERO);
-    PGM_PAGE_SET_PAGEID(pPage, NIL_GMM_PAGEID);
+    PGM_PAGE_SET_HCPHYS(pVM, pPage, pVM->pgm.s.HCPhysZeroPg);
+    PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_MMIO);
+    PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ZERO);
+    PGM_PAGE_SET_PAGEID(pVM, pPage, NIL_GMM_PAGEID);
     PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_ALL);
 
     /* Flush its TLB entry. */
-    PGMPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
+    pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
 
     /*
@@ -1094 +1094 @@
             LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RGp (%R[pgmpage])\n",
                      GCPhysPage, pPage, GCPhysPageRemap, pPageRemap ));
-            PGM_PAGE_SET_HCPHYS(pPage, PGM_PAGE_GET_HCPHYS(pPageRemap));
-            PGM_PAGE_SET_TYPE(pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
-            PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
-            PGM_PAGE_SET_PAGEID(pPage, PGM_PAGE_GET_PAGEID(pPageRemap));
+            PGM_PAGE_SET_HCPHYS(pVM, pPage, PGM_PAGE_GET_HCPHYS(pPageRemap));
+            PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
+            PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
+            PGM_PAGE_SET_PAGEID(pVM, pPage, PGM_PAGE_GET_PAGEID(pPageRemap));
             PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
             pCur->cAliasedPages++;
@@ -1103 +1103 @@
 
             /* Flush its TLB entry. */
-            PGMPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
+            pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
 
             LogFlow(("PGMHandlerPhysicalPageAlias: => %R[pgmpage]\n", pPage));
@@ -1195 +1195 @@
             LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RHp\n",
                      GCPhysPage, pPage, HCPhysPageRemap));
-            PGM_PAGE_SET_HCPHYS(pPage, HCPhysPageRemap);
-            PGM_PAGE_SET_TYPE(pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
-            PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
+            PGM_PAGE_SET_HCPHYS(pVM, pPage, HCPhysPageRemap);
+            PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
+            PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
             /** @todo hack alert
              *  This needs to be done properly. Currently we get away with it as the recompiler directly calls
              *  IOM read and write functions. Access through PGMPhysRead/Write will crash the process.
              */
-            PGM_PAGE_SET_PAGEID(pPage, NIL_GMM_PAGEID);
+            PGM_PAGE_SET_PAGEID(pVM, pPage, NIL_GMM_PAGEID);
             PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
             pCur->cAliasedPages++;
@@ -1208 +1208 @@
 
             /* Flush its TLB entry. */
-            PGMPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
+            pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
 
             LogFlow(("PGMHandlerPhysicalPageAliasHC: => %R[pgmpage]\n", pPage));
@@ -1412 +1412 @@
     PVM             pVM = (PVM)pvUser;
 
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
+
     /*
      * Iterate the pages and apply the new state.
@@ -1678 +1679 @@
     State.pVM = pVM;
 
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
 
     /*

trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp

@@ -397 +397 @@
  * @param   pVM     The VM handle.
  */
-VMMDECL(void) PGMPhysInvalidatePageMapTLB(PVM pVM)
+void pgmPhysInvalidatePageMapTLB(PVM pVM)
 {
     pgmLock(pVM);
     STAM_COUNTER_INC(&pVM->pgm.s.CTX_SUFF(pStats)->StatPageMapTlbFlushes);
+
     /* Clear the shared R0/R3 TLB completely. */
     for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.PhysTlbHC.aEntries); i++)
@@ -409 +410 @@
         pVM->pgm.s.PhysTlbHC.aEntries[i].pv = 0;
     }
+
     /** @todo clear the RC TLB whenever we add it. */
+
     pgmUnlock(pVM);
 }
+
 
 /**
@@ -419 +423 @@
  * @param   GCPhys  GCPhys entry to flush
  */
-VMMDECL(void) PGMPhysInvalidatePageMapTLBEntry(PVM pVM, RTGCPHYS GCPhys)
-{
-    Assert(PGMIsLocked(pVM));
+void pgmPhysInvalidatePageMapTLBEntry(PVM pVM, RTGCPHYS GCPhys)
+{
+    PGM_LOCK_ASSERT_OWNER(pVM);
 
     STAM_COUNTER_INC(&pVM->pgm.s.CTX_SUFF(pStats)->StatPageMapTlbFlushEntry);
-    /* Clear the shared R0/R3 TLB entry. */
+
 #ifdef IN_RC
     unsigned idx = PGM_PAGER3MAPTLB_IDX(GCPhys);
@@ -432 +436 @@
     pVM->pgm.s.PhysTlbHC.aEntries[idx].pv = 0;
 #else
+    /* Clear the shared R0/R3 TLB entry. */
     PPGMPAGEMAPTLBE pTlbe = &pVM->pgm.s.CTXSUFF(PhysTlb).aEntries[PGM_PAGEMAPTLB_IDX(GCPhys)];
     pTlbe->GCPhys = NIL_RTGCPHYS;
@@ -438 +443 @@
     pTlbe->pv     = 0;
 #endif
-    /* @todo clear the RC TLB whenever we add it. */
+
+    /** @todo clear the RC TLB whenever we add it. */
 }
 
@@ -557 +563 @@
      * Prereqs.
      */
-    Assert(PGMIsLocked(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
     AssertMsg(PGM_PAGE_IS_ZERO(pPage) || PGM_PAGE_IS_SHARED(pPage), ("%R[pgmpage] %RGp\n", pPage, GCPhys));
     Assert(!PGM_PAGE_IS_MMIO(pPage));
@@ -580 +586 @@
         }
         /* Mark the base as type page table, so we don't check over and over again. */
-        PGM_PAGE_SET_PDE_TYPE(pBasePage, PGM_PAGE_PDE_TYPE_PT);
+        PGM_PAGE_SET_PDE_TYPE(pVM, pBasePage, PGM_PAGE_PDE_TYPE_PT);
 
         /* fall back to 4KB pages. */
@@ -606 +612 @@
     }
     /* re-assert preconditions since pgmPhysEnsureHandyPage may do a context switch. */
-    Assert(PGMIsLocked(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
     AssertMsg(PGM_PAGE_IS_ZERO(pPage) || PGM_PAGE_IS_SHARED(pPage), ("%R[pgmpage] %RGp\n", pPage, GCPhys));
     Assert(!PGM_PAGE_IS_MMIO(pPage));
@@ -654 +660 @@
      */
     pVM->pgm.s.cPrivatePages++;
-    PGM_PAGE_SET_HCPHYS(pPage, HCPhys);
-    PGM_PAGE_SET_PAGEID(pPage, pVM->pgm.s.aHandyPages[iHandyPage].idPage);
-    PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
-    PGM_PAGE_SET_PDE_TYPE(pPage, PGM_PAGE_PDE_TYPE_PT);
-    PGMPhysInvalidatePageMapTLBEntry(pVM, GCPhys);
+    PGM_PAGE_SET_HCPHYS(pVM, pPage, HCPhys);
+    PGM_PAGE_SET_PAGEID(pVM, pPage, pVM->pgm.s.aHandyPages[iHandyPage].idPage);
+    PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
+    PGM_PAGE_SET_PDE_TYPE(pVM, pPage, PGM_PAGE_PDE_TYPE_PT);
+    pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhys);
 
     /* Copy the shared page contents to the replacement page. */
@@ -706 +712 @@
      * Prereqs.
      */
-    Assert(PGMIsLocked(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
     Assert(PGMIsUsingLargePages(pVM));
 
@@ -744 +750 @@
                 /* Failed. Mark as requiring a PT so we don't check the whole thing again in the future. */
                 STAM_REL_COUNTER_INC(&pVM->pgm.s.StatLargePageRefused);
-                PGM_PAGE_SET_PDE_TYPE(pFirstPage, PGM_PAGE_PDE_TYPE_PT);
+                PGM_PAGE_SET_PDE_TYPE(pVM, pFirstPage, PGM_PAGE_PDE_TYPE_PT);
                 return VERR_PGM_INVALID_LARGE_PAGE_RANGE;
             }
@@ -826 +832 @@
     if (i == _2M/PAGE_SIZE)
     {
-        PGM_PAGE_SET_PDE_TYPE(pLargePage, PGM_PAGE_PDE_TYPE_PDE);
+        PGM_PAGE_SET_PDE_TYPE(pVM, pLargePage, PGM_PAGE_PDE_TYPE_PDE);
         pVM->pgm.s.cLargePagesDisabled--;
         Log(("pgmPhysRecheckLargePage: page %RGp can be reused!\n", GCPhys - _2M));
@@ -850 +856 @@
 {
     Assert(PGM_PAGE_GET_STATE(pPage) == PGM_PAGE_STATE_WRITE_MONITORED);
-    PGM_PAGE_SET_WRITTEN_TO(pPage);
-    PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
+    PGM_PAGE_SET_WRITTEN_TO(pVM, pPage);
+    PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
     Assert(pVM->pgm.s.cMonitoredPages > 0);
     pVM->pgm.s.cMonitoredPages--;
@@ -874 +880 @@
 int pgmPhysPageMakeWritable(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
 {
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
     switch (PGM_PAGE_GET_STATE(pPage))
     {
@@ -923 +929 @@
      * Validation.
      */
-    Assert(PGMIsLocked(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
     AssertReturn(HCPhys && !(HCPhys & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER);
     const uint32_t idChunk = idPage >> GMM_CHUNKID_SHIFT;
@@ -999 +1005 @@
 static int pgmPhysPageMapCommon(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, PPPGMPAGEMAP ppMap, void **ppv)
 {
-    Assert(PGMIsLocked(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
 
 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
@@ -1199 +1205 @@
 int pgmPhysPageLoadIntoTlb(PVM pVM, RTGCPHYS GCPhys)
 {
-    Assert(PGMIsLocked(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
 
     /*
@@ -1230 +1236 @@
 int pgmPhysPageLoadIntoTlbWithPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
 {
-    Assert(PGMIsLocked(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
     STAM_COUNTER_INC(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,PageMapTlbMisses));
 
@@ -1252 +1258 @@
     else
     {
-        Assert(PGM_PAGE_GET_HCPHYS(pPage) == pVM->pgm.s.HCPhysZeroPg);
+        AssertMsg(PGM_PAGE_GET_HCPHYS(pPage) == pVM->pgm.s.HCPhysZeroPg, ("%RGp/%R[pgmpage]\n", GCPhys, pPage));
         pTlbe->pMap = NULL;
         pTlbe->pv = pVM->pgm.s.CTXALLSUFF(pvZeroPg);
@@ -1291 +1297 @@
     int rc;
     AssertReturn(pPage, VERR_INTERNAL_ERROR);
-    Assert(PGMIsLocked(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
 
     /*
@@ -1347 +1353 @@
 {
     AssertReturn(pPage, VERR_INTERNAL_ERROR);
-    Assert(PGMIsLocked(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
     Assert(PGM_PAGE_GET_HCPHYS(pPage) != 0);
 
@@ -1728 +1734 @@
         if (PGM_PAGE_GET_STATE(pPage) == PGM_PAGE_STATE_WRITE_MONITORED)
         {
-            PGM_PAGE_SET_WRITTEN_TO(pPage);
-            PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
+            PGM_PAGE_SET_WRITTEN_TO(pVM, pPage);
+            PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
             Assert(pVM->pgm.s.cMonitoredPages > 0);
             pVM->pgm.s.cMonitoredPages--;
@@ -1955 +1961 @@
         Log5(("pgmPhysReadHandler: GCPhys=%RGp cb=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cb, pPage, R3STRING(pPhys->pszDesc) ));
         STAM_PROFILE_START(&pPhys->Stat, h);
-        Assert(PGMIsLockOwner(pVM));
+        PGM_LOCK_ASSERT_OWNER(pVM);
         /* Release the PGM lock as MMIO handlers take the IOM lock. (deadlock prevention) */
         pgmUnlock(pVM);
@@ -2199 +2205 @@
 
                 STAM_PROFILE_START(&pCur->Stat, h);
-                Assert(PGMIsLockOwner(pVM));
+                PGM_LOCK_ASSERT_OWNER(pVM);
                 /* Release the PGM lock as MMIO handlers take the IOM lock. (deadlock prevention) */
                 pgmUnlock(pVM);
@@ -2411 +2417 @@
             Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cbRange, pPage, R3STRING(pPhys->pszDesc) ));
             STAM_PROFILE_START(&pPhys->Stat, h);
-            Assert(PGMIsLockOwner(pVM));
+            PGM_LOCK_ASSERT_OWNER(pVM);
             /* Release the PGM lock as MMIO handlers take the IOM lock. (deadlock prevention) */
             pgmUnlock(pVM);
@@ -2480 +2486 @@
 
             STAM_PROFILE_START(&pPhys->Stat, h);
-            Assert(PGMIsLockOwner(pVM));
+            PGM_LOCK_ASSERT_OWNER(pVM);
             /* Release the PGM lock as MMIO handlers take the IOM lock. (deadlock prevention) */
             pgmUnlock(pVM);
@@ -2806 +2812 @@
  *
  * @returns VBox status.
- * @param   pVCpu       The VMCPU handle.
+ * @param   pVCpu       Handle to the current virtual CPU.
  * @param   pvDst       The destination address.
  * @param   GCPtrSrc    The source address (GC pointer).
@@ -2814 +2820 @@
 {
     PVM pVM = pVCpu->CTX_SUFF(pVM);
+    VMCPU_ASSERT_EMT(pVCpu);
 
     /*
@@ -2896 +2903 @@
  *
  * @returns VBox status.
- * @param   pVCpu       The VMCPU handle.
+ * @param   pVCpu       Handle to the current virtual CPU.
  * @param   GCPtrDst    The destination address (GC pointer).
  * @param   pvSrc       The source address.
@@ -2904 +2911 @@
 {
     PVM pVM = pVCpu->CTX_SUFF(pVM);
+    VMCPU_ASSERT_EMT(pVCpu);
 
     /*
@@ -2975 +2983 @@
  *
  * @returns VBox status.
- * @param   pVCpu       The VMCPU handle.
+ * @param   pVCpu       Handle to the current virtual CPU.
  * @param   GCPtrDst    The destination address (GC pointer).
  * @param   pvSrc       The source address.
@@ -2983 +2991 @@
 {
     PVM pVM = pVCpu->CTX_SUFF(pVM);
+    VMCPU_ASSERT_EMT(pVCpu);
 
     /*
@@ -3054 +3063 @@
  *
  * @returns VBox status.
- * @param   pVCpu       The VMCPU handle.
+ * @param   pVCpu       Handle to the current virtual CPU.
  * @param   pvDst       The destination address.
  * @param   GCPtrSrc    The source address (GC pointer).
@@ -3066 +3075 @@
     int         rc;
     PVM         pVM = pVCpu->CTX_SUFF(pVM);
+    VMCPU_ASSERT_EMT(pVCpu);
 
     /*
@@ -3136 +3146 @@
  * @retval  VERR_PGM_PHYS_WR_HIT_HANDLER in R0 and GC, NEVER in R3.
  *
- * @param   pVCpu       The VMCPU handle.
+ * @param   pVCpu       Handle to the current virtual CPU.
  * @param   GCPtrDst    The destination address (GC pointer).
  * @param   pvSrc       The source address.
@@ -3147 +3157 @@
     int         rc;
     PVM         pVM = pVCpu->CTX_SUFF(pVM);
+    VMCPU_ASSERT_EMT(pVCpu);
 
     /*
@@ -3229 +3240 @@
  * @retval  VINF_TRPM_XCPT_DISPATCHED if an exception was raised and dispatched.
  *
- * @param   pVCpu       The VMCPU handle.
+ * @param   pVCpu       Handle to the current virtual CPU.
  * @param   pCtxCore    The context core.
  * @param   pvDst       Where to put the bytes we've read.
@@ -3242 +3253 @@
     PVM pVM = pVCpu->CTX_SUFF(pVM);
     Assert(cb <= PAGE_SIZE);
+    VMCPU_ASSERT_EMT(pVCpu);
 
 /** @todo r=bird: This isn't perfect!
@@ -3392 +3404 @@
  * @retval  VINF_TRPM_XCPT_DISPATCHED if an exception was raised and dispatched.
  *
- * @param   pVCpu       The VMCPU handle.
+ * @param   pVCpu       Handle to the current virtual CPU.
  * @param   pCtxCore    The context core.
  * @param   pvDst       Where to put the bytes we've read.
@@ -3409 +3421 @@
  *          unmap mappings done by the caller. Be careful!
  */
-VMMDECL(int) PGMPhysInterpretedReadNoHandlers(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb, bool fRaiseTrap)
+VMMDECL(int) PGMPhysInterpretedReadNoHandlers(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb,
+                                              bool fRaiseTrap)
 {
     PVM pVM = pVCpu->CTX_SUFF(pVM);
     Assert(cb <= PAGE_SIZE);
+    VMCPU_ASSERT_EMT(pVCpu);
 
     /*
@@ -3584 +3598 @@
  * @retval  VINF_TRPM_XCPT_DISPATCHED if an exception was raised and dispatched.
  *
- * @param   pVCpu       The VMCPU handle.
+ * @param   pVCpu       Handle to the current virtual CPU.
  * @param   pCtxCore    The context core.
  * @param   GCPtrDst    The destination address.
@@ -3600 +3614 @@
  *          unmap mappings done by the caller. Be careful!
  */
-VMMDECL(int) PGMPhysInterpretedWriteNoHandlers(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb, bool fRaiseTrap)
+VMMDECL(int) PGMPhysInterpretedWriteNoHandlers(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, const void *pvSrc,
+                                               size_t cb, bool fRaiseTrap)
 {
     Assert(cb <= PAGE_SIZE);
     PVM pVM = pVCpu->CTX_SUFF(pVM);
+    VMCPU_ASSERT_EMT(pVCpu);
 
     /*
@@ -3778 +3794 @@
 }
 
-/**
- * Return the page type of the specified physical address
- *
+
+/**
+ * Return the page type of the specified physical address.
+ *
+ * @returns The page type.
  * @param   pVM             VM Handle.
  * @param   GCPhys          Guest physical address
@@ -3786 +3804 @@
 VMMDECL(PGMPAGETYPE) PGMPhysGetPageType(PVM pVM, RTGCPHYS GCPhys)
 {
-    PPGMPAGE pPage;
-
-    pPage = pgmPhysGetPage(pVM, GCPhys);
-    if (pPage)
-        return (PGMPAGETYPE)PGM_PAGE_GET_TYPE(pPage);
-
-    return PGMPAGETYPE_INVALID;
-}
-
+    pgmLock(pVM);
+    PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhys);
+    PGMPAGETYPE enmPgType = pPage ? (PGMPAGETYPE)PGM_PAGE_GET_TYPE(pPage) : PGMPAGETYPE_INVALID;
+    pgmUnlock(pVM);
+
+    return enmPgType;
+}
+

trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

@@ -1717 +1717 @@
     unsigned idxFree;
 
-    Assert(PGMIsLocked(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
     AssertCompile(RT_ELEMENTS(pPool->aDirtyPages) == 8 || RT_ELEMENTS(pPool->aDirtyPages) == 16);
     Assert(!pPage->fDirty);
@@ -1791 +1791 @@
 {
     PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
-    Assert(PGMIsLocked(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
     if (!pPool->cDirtyPages)
         return false;
@@ -1820 +1820 @@
 {
     PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
-    Assert(PGMIsLocked(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
     Assert(pPool->cDirtyPages <= RT_ELEMENTS(pPool->aDirtyPages));
 
@@ -1859 +1859 @@
 {
     PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
-    Assert(PGMIsLocked(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
     Assert(pPool->cDirtyPages <= RT_ELEMENTS(pPool->aDirtyPages));
 
@@ -1880 +1880 @@
 {
     PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
-    Assert(PGMIsLocked(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
     Assert(pPool->cDirtyPages <= RT_ELEMENTS(pPool->aDirtyPages));
     unsigned idxDirtyPage = RT_ELEMENTS(pPool->aDirtyPages);
@@ -3355 +3355 @@
     bool fKeptPTEs = pgmPoolTrackFlushGCPhysPTInt(pVM, pPhysPage, fFlushPTEs, iShw, PGM_PAGE_GET_PTE_INDEX(pPhysPage));
     if (!fKeptPTEs)
-        PGM_PAGE_SET_TRACKING(pPhysPage, 0);
+        PGM_PAGE_SET_TRACKING(pVM, pPhysPage, 0);
     STAM_PROFILE_STOP(&pPool->StatTrackFlushGCPhysPT, f);
 }
@@ -3370 +3370 @@
 static void pgmPoolTrackFlushGCPhysPTs(PVM pVM, PPGMPAGE pPhysPage, bool fFlushPTEs, uint16_t iPhysExt)
 {
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
     PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
     bool     fKeepList = false;
@@ -3407 +3407 @@
         pPool->iPhysExtFreeHead = iPhysExtStart;
         /* Invalidate the tracking data. */
-        PGM_PAGE_SET_TRACKING(pPhysPage, 0);
+        PGM_PAGE_SET_TRACKING(pVM, pPhysPage, 0);
     }
 
@@ -3462 +3462 @@
         {
             /* Mark the large page as disabled as we need to break it up to change a single page in the 2 MB range. */
-            PGM_PAGE_SET_PDE_TYPE(pLargePage, PGM_PAGE_PDE_TYPE_PDE_DISABLED);
+            PGM_PAGE_SET_PDE_TYPE(pVM, pLargePage, PGM_PAGE_PDE_TYPE_PDE_DISABLED);
             pVM->pgm.s.cLargePagesDisabled++;
 
@@ -3666 +3666 @@
     }
 
-    PGM_PAGE_SET_TRACKING(pPhysPage, 0);
+    PGM_PAGE_SET_TRACKING(pVM, pPhysPage, 0);
     STAM_PROFILE_STOP(&pPool->StatTrackFlushGCPhysPTsSlow, s);
 
@@ -3852 +3852 @@
 PPGMPOOLPHYSEXT pgmPoolTrackPhysExtAlloc(PVM pVM, uint16_t *piPhysExt)
 {
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
     PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
     uint16_t iPhysExt = pPool->iPhysExtFreeHead;
@@ -3876 +3876 @@
 void pgmPoolTrackPhysExtFree(PVM pVM, uint16_t iPhysExt)
 {
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
     PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
     Assert(iPhysExt < pPool->cMaxPhysExts);
@@ -3898 +3898 @@
 void pgmPoolTrackPhysExtFreeList(PVM pVM, uint16_t iPhysExt)
 {
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
     PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
 
@@ -3935 +3935 @@
 static uint16_t pgmPoolTrackPhysExtInsert(PVM pVM, uint16_t iPhysExt, uint16_t iShwPT, uint16_t iPte)
 {
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
     PPGMPOOL        pPool = pVM->pgm.s.CTX_SUFF(pPool);
     PPGMPOOLPHYSEXT paPhysExts = pPool->CTX_SUFF(paPhysExts);
@@ -4069 +4069 @@
 void pgmPoolTrackPhysExtDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PPGMPAGE pPhysPage, uint16_t iPte)
 {
+    PVM            pVM = pPool->CTX_SUFF(pVM);
     const unsigned cRefs = PGM_PAGE_GET_TD_CREFS(pPhysPage);
     AssertFatalMsg(cRefs == PGMPOOL_TD_CREFS_PHYSEXT, ("cRefs=%d pPhysPage=%R[pgmpage] pPage=%p:{.idx=%d}\n", cRefs, pPhysPage, pPage, pPage->idx));
@@ -4075 +4076 @@
     if (iPhysExt != PGMPOOL_TD_IDX_OVERFLOWED)
     {
-        PVM pVM = pPool->CTX_SUFF(pVM);
         pgmLock(pVM);
 
@@ -4111 +4111 @@
                         pgmPoolTrackPhysExtFree(pVM, iPhysExt);
                         Log2(("pgmPoolTrackPhysExtDerefGCPhys: pPhysPage=%R[pgmpage] idx=%d lonely\n", pPhysPage, pPage->idx));
-                        PGM_PAGE_SET_TRACKING(pPhysPage, 0);
+                        PGM_PAGE_SET_TRACKING(pVM, pPhysPage, 0);
                     }
                     else if (iPhysExtPrev == NIL_PGMPOOL_PHYSEXT_INDEX)
@@ -4117 +4117 @@
                         /* head */
                         Log2(("pgmPoolTrackPhysExtDerefGCPhys: pPhysPage=%R[pgmpage] idx=%d head\n", pPhysPage, pPage->idx));
-                        PGM_PAGE_SET_TRACKING(pPhysPage, PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, iPhysExtNext));
+                        PGM_PAGE_SET_TRACKING(pVM, pPhysPage, PGMPOOL_TD_MAKE(PGMPOOL_TD_CREFS_PHYSEXT, iPhysExtNext));
                         pgmPoolTrackPhysExtFree(pVM, iPhysExt);
                     }
@@ -4163 +4163 @@
      * Lookup the page and check if it checks out before derefing it.
      */
-    PPGMPAGE pPhysPage = pgmPhysGetPage(pPool->CTX_SUFF(pVM), GCPhys);
+    PVM      pVM       = pPool->CTX_SUFF(pVM);
+    PPGMPAGE pPhysPage = pgmPhysGetPage(pVM, GCPhys);
     if (pPhysPage)
     {
@@ -4205 +4206 @@
      */
     RTHCPHYS HCPhysHinted;
-    PPGMPAGE pPhysPage = pgmPhysGetPage(pPool->CTX_SUFF(pVM), GCPhysHint);
+    PVM      pVM       = pPool->CTX_SUFF(pVM);
+    PPGMPAGE pPhysPage = pgmPhysGetPage(pVM, GCPhysHint);
     if (pPhysPage)
     {
@@ -5094 +5096 @@
 {
     PVM pVM = pPool->CTX_SUFF(pVM);
-
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
 
     /*
@@ -5117 +5118 @@
 {
     PVM pVM = pPool->CTX_SUFF(pVM);
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
     return (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, HCPhys & X86_PTE_PAE_PG_MASK);
 }
@@ -5237 +5238 @@
     PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
 
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
     STAM_PROFILE_START(&pPool->StatR3Reset, a);
     LogFlow(("pgmR3PoolReset:\n"));
@@ -5321 +5322 @@
         unsigned iPage = pRam->cb >> PAGE_SHIFT;
         while (iPage-- > 0)
-            PGM_PAGE_SET_TRACKING(&pRam->aPages[iPage], 0);
+            PGM_PAGE_SET_TRACKING(pVM, &pRam->aPages[iPage], 0);
     }
 

trunk/src/VBox/VMM/VMMAll/PGMAllShw.h

@@ -202 +202 @@
     PVM pVM = pVCpu->CTX_SUFF(pVM);
 
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
 
     /*
@@ -365 +365 @@
     int rc;
 
-    Assert(PGMIsLockOwner(pVM));
+    PGM_LOCK_ASSERT_OWNER(pVM);
+
     /*
      * Walk page tables and pages till we're done.