Changeset 37526 in vbox for trunk/src/VBox
- Timestamp:
- Jun 17, 2011 10:17:38 AM (14 years ago)
- Location:
- trunk/src/VBox/Devices/PC
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/PC/DevACPI.cpp
r37519 r37526 2010 2010 if (RT_FAILURE(rc)) 2011 2011 return rc; 2012 TMTimerLock(pThis->pPmTimerR3, VERR_IGNORED); 2012 2013 acpiPmTimerReset(pThis, TMTimerGet(pThis->pPmTimerR3)); 2014 TMTimerUnlock(pThis->pPmTimerR3); 2013 2015 } 2014 2016 return rc; … … 2742 2744 ACPIState *pThis = PDMINS_2_DATA(pDevIns, ACPIState *); 2743 2745 2746 TMTimerLock(pThis->pPmTimerR3, VERR_IGNORED); 2744 2747 pThis->pm1a_en = 0; 2745 2748 pThis->pm1a_sts = 0; … … 2752 2755 pThis->gpe0_sts = 0; 2753 2756 pThis->uSleepState = 0; 2757 TMTimerUnlock(pThis->pPmTimerR3); 2754 2758 2755 2759 /** @todo Should we really reset PM base? */ … … 3062 3066 * Create the PM timer. 3063 3067 */ 3068 PTMTIMER pTimer; 3064 3069 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, acpiPmTimer, &pThis->dev, 3065 TMTIMER_FLAGS_NO_CRIT_SECT, "ACPI PM Timer", &pThis->pPmTimerR3); 3066 if (RT_FAILURE(rc)) 3067 { 3068 AssertMsgFailed(("pfnTMTimerCreate -> %Rrc\n", rc)); 3069 return rc; 3070 } 3071 3072 pThis->pPmTimerR0 = TMTimerR0Ptr(pThis->pPmTimerR3); 3073 pThis->pPmTimerRC = TMTimerRCPtr(pThis->pPmTimerR3); 3074 pThis->u64PmTimerInitial = TMTimerGet(pThis->pPmTimerR3); 3070 TMTIMER_FLAGS_NO_CRIT_SECT, "ACPI PM Timer", &pTimer); 3071 AssertRCReturn(rc, rc); 3072 pThis->pPmTimerR3 = pTimer; 3073 pThis->pPmTimerR0 = TMTimerR0Ptr(pTimer); 3074 pThis->pPmTimerRC = TMTimerRCPtr(pTimer); 3075 3076 rc = TMTimerLock(pTimer, VERR_IGNORED); 3077 AssertRCReturn(rc, rc); 3078 pThis->u64PmTimerInitial = TMTimerGet(pTimer); 3075 3079 acpiPmTimerReset(pThis, pThis->u64PmTimerInitial); 3080 TMTimerUnlock(pTimer); 3076 3081 3077 3082 /* -
trunk/src/VBox/Devices/PC/DevAPIC.cpp
r37481 r37526 1959 1959 { 1960 1960 APICDeviceInfo *pDev = PDMINS_2_DATA(pDevIns, APICDeviceInfo *); 1961 APIC_LOCK_VOID(pDev, VERR_INTERNAL_ERROR); 1961 TMTimerLock(pDev->paLapicsR3[0].pTimerR3, VERR_IGNORED); 1962 APIC_LOCK_VOID(pDev, VERR_IGNORED); 1962 1963 1963 1964 /* Reset all APICs. */ … … 1984 1985 1985 1986 APIC_UNLOCK(pDev); 1987 TMTimerUnlock(pDev->paLapicsR3[0].pTimerR3); 1986 1988 } 1987 1989 -
trunk/src/VBox/Devices/PC/DevHPET.cpp
r37510 r37526 1253 1253 LogFlow(("hpetReset:\n")); 1254 1254 1255 pThis->u64HpetConfig = 0; 1255 /* 1256 * The timers first. 1257 */ 1258 TMTimerLock(pThis->aTimers[0].pTimerR3, VERR_IGNORED); 1256 1259 for (unsigned i = 0; i < HPET_NUM_TIMERS; i++) 1257 1260 { … … 1275 1278 pHpetTimer->u64Cmp = hpetInvalidValue(pHpetTimer); 1276 1279 } 1280 TMTimerUnlock(pThis->aTimers[0].pTimerR3); 1281 1282 /* 1283 * The HPET state. 1284 */ 1285 pThis->u64HpetConfig = 0; 1277 1286 pThis->u64HpetCounter = 0; 1278 1287 pThis->u64HpetOffset = 0; … … 1290 1299 pThis->u64Capabilities |= ((uint64_t)(pThis->fIch9 ? HPET_CLK_PERIOD_ICH9 : HPET_CLK_PERIOD) << 32); 1291 1300 1292 /* Notify PIT/RTC devices */ 1301 /* 1302 * Notify the PIT/RTC devices. 1303 */ 1293 1304 if (pThis->pHpetHlpR3) 1294 1305 pThis->pHpetHlpR3->pfnSetLegacyMode(pDevIns, false /*fActive*/); -
trunk/src/VBox/Devices/PC/DevPit-i8254.cpp
r37515 r37526 977 977 LogRel(("PIT: mode=%d count=%#x (%u) - %d.%02d Hz (ch=%d) (restore)\n", 978 978 s->mode, s->count, s->count, PIT_FREQ / s->count, (PIT_FREQ * 100 / s->count) % 100, i)); 979 PDMCritSectEnter(&pThis->CritSect, VERR_IGNORED); 979 980 TMTimerSetFrequencyHint(s->CTX_SUFF(pTimer), PIT_FREQ / s->count); 981 PDMCritSectLeave(&pThis->CritSect); 980 982 } 981 983 pThis->channels[i].cRelLogEntries = 0; -
trunk/src/VBox/Devices/PC/DevRTC.cpp
r37514 r37526 1058 1058 1059 1059 /* 1060 * Create timers , arm them, register I/O Ports and save state.1060 * Create timers. 1061 1061 */ 1062 PTMTIMER pTimer; 1063 /* Periodic timer. */ 1062 1064 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, rtcTimerPeriodic, pThis, 1063 1065 TMTIMER_FLAGS_DEFAULT_CRIT_SECT, "MC146818 RTC/CMOS - Periodic", 1064 &pT his->pPeriodicTimerR3);1066 &pTimer); 1065 1067 if (RT_FAILURE(rc)) 1066 1068 return rc; 1067 pThis->pPeriodicTimerR0 = TMTimerR0Ptr(pThis->pPeriodicTimerR3); 1068 pThis->pPeriodicTimerRC = TMTimerRCPtr(pThis->pPeriodicTimerR3); 1069 1069 pThis->pPeriodicTimerR3 = pTimer; 1070 pThis->pPeriodicTimerR0 = TMTimerR0Ptr(pTimer); 1071 pThis->pPeriodicTimerRC = TMTimerRCPtr(pTimer); 1072 1073 /* Seconds timer. */ 1070 1074 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, rtcTimerSecond, pThis, 1071 1075 TMTIMER_FLAGS_DEFAULT_CRIT_SECT, "MC146818 RTC/CMOS - Second", 1072 &pT his->pSecondTimerR3);1076 &pTimer); 1073 1077 if (RT_FAILURE(rc)) 1074 1078 return rc; 1075 pThis->pSecondTimerR0 = TMTimerR0Ptr(pThis->pSecondTimerR3); 1076 pThis->pSecondTimerRC = TMTimerRCPtr(pThis->pSecondTimerR3); 1077 1079 pThis->pSecondTimerR3 = pTimer; 1080 pThis->pSecondTimerR0 = TMTimerR0Ptr(pTimer); 1081 pThis->pSecondTimerRC = TMTimerRCPtr(pTimer); 1082 1083 /* The second2 timer, this is always active. */ 1078 1084 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, rtcTimerSecond2, pThis, 1079 1085 TMTIMER_FLAGS_DEFAULT_CRIT_SECT, "MC146818 RTC/CMOS - Second2", 1080 &pT his->pSecondTimer2R3);1086 &pTimer); 1081 1087 if (RT_FAILURE(rc)) 1082 1088 return rc; 1083 pThis->pSecondTimer2R0 = TMTimerR0Ptr(pThis->pSecondTimer2R3); 1084 pThis->pSecondTimer2RC = TMTimerRCPtr(pThis->pSecondTimer2R3); 1085 pThis->next_second_time = TMTimerGet(pThis->CTX_SUFF(pSecondTimer2)) 1086 + (TMTimerGetFreq(pThis->CTX_SUFF(pSecondTimer2)) * 99) / 100; 1087 rc = TMTimerSet(pThis->CTX_SUFF(pSecondTimer2), pThis->next_second_time); 1088 if (RT_FAILURE(rc)) 1089 return rc; 1090 1091 1089 pThis->pSecondTimer2R3 = pTimer; 1090 pThis->pSecondTimer2R0 = TMTimerR0Ptr(pTimer); 1091 pThis->pSecondTimer2RC = TMTimerRCPtr(pTimer); 1092 pThis->next_second_time = TMTimerGet(pTimer) 1093 + (TMTimerGetFreq(pTimer) * 99) / 100; 1094 rc = TMTimerLock(pTimer, VERR_IGNORED); 1095 AssertRCReturn(rc, rc); 1096 rc = TMTimerSet(pTimer, pThis->next_second_time); 1097 TMTimerUnlock(pTimer); 1098 AssertRCReturn(rc, rc); 1099 1100 /* 1101 * Register I/O ports. 1102 */ 1092 1103 rc = PDMDevHlpIOPortRegister(pDevIns, pThis->IOPortBase, 4, NULL, 1093 1104 rtcIOPortWrite, rtcIOPortRead, NULL, NULL, "MC146818 RTC/CMOS"); … … 1109 1120 } 1110 1121 1122 /* 1123 * Register the saved state. 1124 */ 1111 1125 rc = PDMDevHlpSSMRegister3(pDevIns, RTC_SAVED_STATE_VERSION, sizeof(*pThis), rtcLiveExec, rtcSaveExec, rtcLoadExec); 1112 1126 if (RT_FAILURE(rc))
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