Changeset 37536 in vbox for trunk/src/VBox
- Timestamp:
- Jun 17, 2011 12:41:53 PM (14 years ago)
- File:
-
- 1 edited
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- Unmodified
- Added
- Removed
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trunk/src/VBox/Devices/PC/DevHPET.cpp
r37534 r37536 107 107 #define HPET_TN_INT_ROUTE_CAP_SHIFT 32 108 108 #define HPET_TN_CFG_BITS_READONLY_OR_RESERVED 0xffff80b1U 109 110 /** Extract the timer count from the capabilities. 111 * @todo Check if the mask is correct. */ 112 #define HPET_CAP_GET_TIMERS(a_u64) ( ((a_u64) >> 8) & 0xf ) 109 113 110 114 /** The version of the saved state. */ … … 428 432 Assert(PDMCritSectIsOwner(&pThis->csLock)); 429 433 430 if (iTimerNo >= HPET_ NUM_TIMERS)434 if (iTimerNo >= HPET_CAP_GET_TIMERS(pThis->u64Capabilities)) 431 435 { 432 436 static unsigned s_cOccurences = 0; … … 496 500 Assert(!PDMCritSectIsOwner(&pThis->csLock) || TMTimerIsLockOwner(pThis->aTimers[0].CTX_SUFF(pTimer))); 497 501 498 if (iTimerNo >= HPET_ NUM_TIMERS)502 if (iTimerNo >= HPET_CAP_GET_TIMERS(pThis->u64Capabilities)) 499 503 { 500 504 LogRel(("HPET: using timer above configured range: %d\n", iTimerNo)); … … 753 757 pThis->u64HpetConfig = hpetUpdateMasked(u32NewValue, iOldValue, HPET_CFG_WRITE_MASK); 754 758 759 uint32_t const cTimers = HPET_CAP_GET_TIMERS(pThis->u64Capabilities); 755 760 if (hpetBitJustSet(iOldValue, u32NewValue, HPET_CFG_ENABLE)) 756 761 { … … 759 764 pThis->u64HpetOffset = hpetTicksToNs(pThis, pThis->u64HpetCounter) 760 765 - TMTimerGet(pThis->aTimers[0].CTX_SUFF(pTimer)); 761 for (uint32_t i = 0; i < HPET_NUM_TIMERS; i++)766 for (uint32_t i = 0; i < cTimers; i++) 762 767 if (pThis->aTimers[i].u64Cmp != hpetInvalidValue(&pThis->aTimers[i])) 763 768 hpetProgramTimer(&pThis->aTimers[i]); … … 767 772 /* Halt main counter and disable interrupt generation. */ 768 773 pThis->u64HpetCounter = hpetGetTicks(pThis); 769 for (uint32_t i = 0; i < HPET_NUM_TIMERS; i++)774 for (uint32_t i = 0; i < cTimers; i++) 770 775 TMTimerStop(pThis->aTimers[i].CTX_SUFF(pTimer)); 771 776 } … … 1115 1120 pThis->u64HpetOffset, pThis->u64HpetCounter, RT_HI_U32(pThis->u64Capabilities), 1116 1121 !!(pThis->u64HpetConfig & HPET_CFG_LEGACY) ? "on " : "off", 1117 (unsigned)((pThis->u64Capabilities >> 8) & 0x1f));1122 HPET_CAP_GET_TIMERS(pThis->u64Capabilities)); 1118 1123 pHlp->pfnPrintf(pHlp, 1119 1124 "Timers:\n"); 1120 for (unsigned i = 0; i < HPET_NUM_TIMERS; i++)1125 for (unsigned i = 0; i < RT_ELEMENTS(pThis->aTimers); i++) 1121 1126 { 1122 1127 pHlp->pfnPrintf(pHlp, " %d: comparator=%016RX64 period(hidden)=%016RX64 cfg=%016RX64\n", … … 1139 1144 HpetState *pThis = PDMINS_2_DATA(pDevIns, HpetState *); 1140 1145 1141 SSMR3PutU8(pSSM, HPET_ NUM_TIMERS);1146 SSMR3PutU8(pSSM, HPET_CAP_GET_TIMERS(pThis->u64Capabilities)); 1142 1147 1143 1148 return VINF_SSM_DONT_CALL_AGAIN; … … 1160 1165 * The state. 1161 1166 */ 1162 for (uint32_t iTimer = 0; iTimer < HPET_NUM_TIMERS; iTimer++) 1167 uint32_t const cTimers = HPET_CAP_GET_TIMERS(pThis->u64Capabilities); 1168 for (uint32_t iTimer = 0; iTimer < cTimers; iTimer++) 1163 1169 { 1164 1170 HpetTimer *pHpetTimer = &pThis->aTimers[iTimer]; … … 1200 1206 int rc = SSMR3GetU8(pSSM, &cTimers); 1201 1207 AssertRCReturn(rc, rc); 1202 if (cTimers != HPET_NUM_TIMERS)1203 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch - wrong number oftimers: saved=%#x config=%#x"),1204 cTimers, HPET_NUM_TIMERS);1208 if (cTimers > RT_ELEMENTS(pThis->aTimers)) 1209 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch - too many timers: saved=%#x config=%#x"), 1210 cTimers, RT_ELEMENTS(pThis->aTimers)); 1205 1211 1206 1212 if (uPass != SSM_PASS_FINAL) … … 1210 1216 * The state. 1211 1217 */ 1212 for (uint32_t iTimer = 0; iTimer < HPET_NUM_TIMERS; iTimer++)1218 for (uint32_t iTimer = 0; iTimer < cTimers; iTimer++) 1213 1219 { 1214 1220 HpetTimer *pHpetTimer = &pThis->aTimers[iTimer]; … … 1222 1228 1223 1229 SSMR3GetU64(pSSM, &pThis->u64HpetOffset); 1224 SSMR3GetU64(pSSM, &pThis->u64Capabilities); 1230 uint64_t u64Capabilities; 1231 SSMR3GetU64(pSSM, &u64Capabilities); 1225 1232 SSMR3GetU64(pSSM, &pThis->u64HpetConfig); 1226 1233 SSMR3GetU64(pSSM, &pThis->u64Isr); … … 1228 1235 if (RT_FAILURE(rc)) 1229 1236 return rc; 1237 if (HPET_CAP_GET_TIMERS(u64Capabilities) != cTimers) 1238 return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Capabilities does not match timer count: cTimers=%#x caps=%#x"), 1239 cTimers, HPET_CAP_GET_TIMERS(u64Capabilities)); 1240 pThis->u64Capabilities = u64Capabilities; 1230 1241 1231 1242 /* … … 1233 1244 */ 1234 1245 PDMCritSectEnter(&pThis->csLock, VERR_IGNORED); 1235 for (uint32_t iTimer = 0; iTimer < HPET_NUM_TIMERS; iTimer++)1246 for (uint32_t iTimer = 0; iTimer < cTimers; iTimer++) 1236 1247 { 1237 1248 HpetTimer *pHpetTimer = &pThis->aTimers[iTimer]; … … 1286 1297 */ 1287 1298 TMTimerLock(pThis->aTimers[0].pTimerR3, VERR_IGNORED); 1288 for (unsigned i = 0; i < HPET_NUM_TIMERS; i++)1299 for (unsigned i = 0; i < RT_ELEMENTS(pThis->aTimers); i++) 1289 1300 { 1290 1301 HpetTimer *pHpetTimer = &pThis->aTimers[i]; … … 1323 1334 Actually ICH9 has 4 timers, but to avoid breaking 1324 1335 saved state we'll stick with 3 so far. */ /** @todo fix this ICH9 timer count bug. */ 1336 /** @todo what about the '-1' bit?? Linux thinks it has 4 timers. */ 1325 1337 | 1 /* REV_ID - Revision, must not be 0 */ 1326 1338 ; … … 1383 1395 AssertRCReturn(rc, rc); 1384 1396 1385 /* Init the HPET timers . */1386 for (unsigned i = 0; i < HPET_NUM_TIMERS; i++)1397 /* Init the HPET timers (init all regardless of how many we expose). */ 1398 for (unsigned i = 0; i < RT_ELEMENTS(pThis->aTimers); i++) 1387 1399 { 1388 1400 HpetTimer *pHpetTimer = &pThis->aTimers[i];
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